MCC'2024- Execution of r027-smll-171620168900492

About the Execution of LoLA for BART-PT-050

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
16206.871	137284.00	323430.00	864.80	[undef]	Cannot compute

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r027-smll-1716201
Waiting for the VM to be ready (probing ssh)
...................................................
=============================
Generated by BenchKit 2-5568
Executing tool lola
Input is BART-PT-050, examination is LTLFireabi
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r027-smll-171620168900492
===================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 97M
-rw-r--r-- 1 mcc users 2.6M Apr 13 01:31 CTLCardina
-rw-r--r-- 1 mcc users 9.1M Apr 13 01:31 CTLCardina
-rw-r--r-- 1 mcc users 3.5M Apr 12 22:08 CTLFireabi
-rw-r--r-- 1 mcc users 12M Apr 12 22:08 CTLFireabi
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPro
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPro
-rw-r--r-- 1 mcc users 1.2M Apr 22 14:29 LTLCardina
-rw-r--r-- 1 mcc users 3.0M Apr 22 14:29 LTLCardina
-rw-r--r-- 1 mcc users 1.9M Apr 22 14:29 LTLFireabi
-rw-r--r-- 1 mcc users 4.7M Apr 22 14:29 LTLFireabi
-rw-r--r-- 1 mcc users 6.3M Apr 13 08:06 Reachabili
-rw-r--r-- 1 mcc users 22M Apr 13 08:05 Reachabili
-rw-r--r-- 1 mcc users 4.8M Apr 13 03:56 Reachabili
-rw-r--r-- 1 mcc users 15M Apr 13 03:56 Reachabili
-rw-r--r-- 1 mcc users 141K Apr 22 14:29 UpperBound
-rw-r--r-- 1 mcc users 283K Apr 22 14:29 UpperBound
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 12M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result
FORMULA_NAME BART-PT-050-LTLFireability-00
FORMULA_NAME BART-PT-050-LTLFireability-01
FORMULA_NAME BART-PT-050-LTLFireability-02
FORMULA_NAME BART-PT-050-LTLFireability-03
FORMULA_NAME BART-PT-050-LTLFireability-04
FORMULA_NAME BART-PT-050-LTLFireability-05
FORMULA_NAME BART-PT-050-LTLFireability-06
FORMULA_NAME BART-PT-050-LTLFireability-07
FORMULA_NAME BART-PT-050-LTLFireability-08
FORMULA_NAME BART-PT-050-LTLFireability-09
FORMULA_NAME BART-PT-050-LTLFireability-10
FORMULA_NAME BART-PT-050-LTLFireability-11
FORMULA_NAME BART-PT-050-LTLFireability-12
FORMULA_NAME BART-PT-050-LTLFireability-13
FORMULA_NAME BART-PT-050-LTLFireability-14
FORMULA_NAME BART-PT-050-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717176140707

BK_STOP 1717176277991

--------------------
content from stderr:

[[35mlola[0m][I] LoLA will run for 3600
[[35mlola[0m][W] [1m[33munknown unit in
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--p
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition
[[35mlola[0m][I] closed [1m[34mnet[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--x
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m
[[35mlola[0m][I] Rule S: 0 transitions
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 72 (type
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 72 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-050-LTLFireability-00:
[[35mlola[0m][.] BART-PT-050-LTLFireability-01:
[[35mlola[0m][.] BART-PT-050-LTLFireability-02:
[[35mlola[0m][.] BART-PT-050-LTLFireability-03:
[[35mlola[0m][.] BART-PT-050-LTLFireability-04:
[[35mlola[0m][.] BART-PT-050-LTLFireability-05:
[[35mlola[0m][.] BART-PT-050-LTLFireability-06:
[[35mlola[0m][.] BART-PT-050-LTLFireability-07:
[[35mlola[0m][.] BART-PT-050-LTLFireability-08:
[[35mlola[0m][.] BART-PT-050-LTLFireability-09:
[[35mlola[0m][.] BART-PT-050-LTLFireability-10:
[[35mlola[0m][.] BART-PT-050-LTLFireability-11:
[[35mlola[0m][.] BART-PT-050-LTLFireability-12:
[[35mlola[0m][.] BART-PT-050-LTLFireability-13:
[[35mlola[0m][.] BART-PT-050-LTLFireability-14:
[[35mlola[0m][.] BART-PT-050-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 21 secs.
[[35mlola[0m][.] # running tasks: 0 of
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-050-LTLFireability-00:
[[35mlola[0m][.] BART-PT-050-LTLFireability-01:
[[35mlola[0m][.] BART-PT-050-LTLFireability-02:
[[35mlola[0m][.] BART-PT-050-LTLFireability-03:
[[35mlola[0m][.] BART-PT-050-LTLFireability-04:
[[35mlola[0m][.] BART-PT-050-LTLFireability-05:
[[35mlola[0m][.] BART-PT-050-LTLFireability-06:
[[35mlola[0m][.] BART-PT-050-LTLFireability-07:
[[35mlola[0m][.] BART-PT-050-LTLFireability-08:
[[35mlola[0m][.] BART-PT-050-LTLFireability-09:
[[35mlola[0m][.] BART-PT-050-LTLFireability-10:
[[35mlola[0m][.] BART-PT-050-LTLFireability-11:
[[35mlola[0m][.] BART-PT-050-LTLFireability-12:
[[35mlola[0m][.] BART-PT-050-LTLFireability-13:
[[35mlola[0m][.] BART-PT-050-LTLFireability-14:
[[35mlola[0m][.] BART-PT-050-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 26 secs.
[[35mlola[0m][.] # running tasks: 0 of
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-050-LTLFireability-00:
[[35mlola[0m][.] BART-PT-050-LTLFireability-01:
[[35mlola[0m][.] BART-PT-050-LTLFireability-02:
[[35mlola[0m][.] BART-PT-050-LTLFireability-03:
[[35mlola[0m][.] BART-PT-050-LTLFireability-04:
[[35mlola[0m][.] BART-PT-050-LTLFireability-05:
[[35mlola[0m][.] BART-PT-050-LTLFireability-06:
[[35mlola[0m][.] BART-PT-050-LTLFireability-07:
[[35mlola[0m][.] BART-PT-050-LTLFireability-08:
[[35mlola[0m][.] BART-PT-050-LTLFireability-09:
[[35mlola[0m][.] BART-PT-050-LTLFireability-10:
[[35mlola[0m][.] BART-PT-050-LTLFireability-11:
[[35mlola[0m][.] BART-PT-050-LTLFireability-12:
[[35mlola[0m][.] BART-PT-050-LTLFireability-13:
[[35mlola[0m][.] BART-PT-050-LTLFireability-14:
[[35mlola[0m][.] BART-PT-050-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 31 secs.
[[35mlola[0m][.] # running tasks: 0 of
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-050-LTLFireability-00:
[[35mlola[0m][.] BART-PT-050-LTLFireability-01:
[[35mlola[0m][.] BART-PT-050-LTLFireability-02:
[[35mlola[0m][.] BART-PT-050-LTLFireability-03:
[[35mlola[0m][.] BART-PT-050-LTLFireability-04:
[[35mlola[0m][.] BART-PT-050-LTLFireability-05:
[[35mlola[0m][.] BART-PT-050-LTLFireability-06:
[[35mlola[0m][.] BART-PT-050-LTLFireability-07:
[[35mlola[0m][.] BART-PT-050-LTLFireability-08:
[[35mlola[0m][.] BART-PT-050-LTLFireability-09:
[[35mlola[0m][.] BART-PT-050-LTLFireability-10:
[[35mlola[0m][.] BART-PT-050-LTLFireability-11:
[[35mlola[0m][.] BART-PT-050-LTLFireability-12:
[[35mlola[0m][.] BART-PT-050-LTLFireability-13:
[[35mlola[0m][.] BART-PT-050-LTLFireability-14:
[[35mlola[0m][.] BART-PT-050-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 36 secs.
[[35mlola[0m][.] # running tasks: 0 of
[[35mlola[0m][I] LAUNCH task # 51 (type
[[35mlola[0m][I] time limit : 161 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 51 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mBART-PT-050-LTLFireability-12:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-050-LTLFireability-00:
[[35mlola[0m][.] BART-PT-050-LTLFireability-01:
[[35mlola[0m][.] BART-PT-050-LTLFireability-02:
[[35mlola[0m][.] BART-PT-050-LTLFireability-03:
[[35mlola[0m][.] BART-PT-050-LTLFireability-04:
[[35mlola[0m][.] BART-PT-050-LTLFireability-05:
[[35mlola[0m][.] BART-PT-050-LTLFireability-06:
[[35mlola[0m][.] BART-PT-050-LTLFireability-07:
[[35mlola[0m][.] BART-PT-050-LTLFireability-08:
[[35mlola[0m][.] BART-PT-050-LTLFireability-09:
[[35mlola[0m][.] BART-PT-050-LTLFireability-10:
[[35mlola[0m][.] BART-PT-050-LTLFireability-11:
[[35mlola[0m][.] BART-PT-050-LTLFireability-13:
[[35mlola[0m][.] BART-PT-050-LTLFireability-14:
[[35mlola[0m][.] BART-PT-050-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 41 secs.
[[35mlola[0m][.] # running tasks: 0 of
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mBART-PT-050-LTLFireability-12:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-050-LTLFireability-00:
[[35mlola[0m][.] BART-PT-050-LTLFireability-01:
[[35mlola[0m][.] BART-PT-050-LTLFireability-02:
[[35mlola[0m][.] BART-PT-050-LTLFireability-03:
[[35mlola[0m][.] BART-PT-050-LTLFireability-04:
[[35mlola[0m][.] BART-PT-050-LTLFireability-05:
[[35mlola[0m][.] BART-PT-050-LTLFireability-06:
[[35mlola[0m][.] BART-PT-050-LTLFireability-07:
[[35mlola[0m][.] BART-PT-050-LTLFireability-08:
[[35mlola[0m][.] BART-PT-050-LTLFireability-09:
[[35mlola[0m][.] BART-PT-050-LTLFireability-10:
[[35mlola[0m][.] BART-PT-050-LTLFireability-11:
[[35mlola[0m][.] BART-PT-050-LTLFireability-13:
[[35mlola[0m][.] BART-PT-050-LTLFireability-14:
[[35mlola[0m][.] BART-PT-050-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 46 secs.
[[35mlola[0m][.] # running tasks: 0 of
[*** LOG ERROR #0001 ***] [2024-05-31 17:23:08]
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mBART-PT-050-LTLFireability-12:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-050-LTLFireability-00:
[[35mlola[0m][.] BART-PT-050-LTLFireability-01:
[[35mlola[0m][.] BART-PT-050-LTLFireability-02:
[[35mlola[0m][.] BART-PT-050-LTLFireability-03:
[[35mlola[0m][.] BART-PT-050-LTLFireability-04:
[[35mlola[0m][.] BART-PT-050-LTLFireability-05:
[[35mlola[0m][.] BART-PT-050-LTLFireability-06:
[[35mlola[0m][.] BART-PT-050-LTLFireability-07:
[[35mlola[0m][.] BART-PT-050-LTLFireability-08:
[[35mlola[0m][.] BART-PT-050-LTLFireability-09:
[[35mlola[0m][.] BART-PT-050-LTLFireability-10:
[[35mlola[0m][.] BART-PT-050-LTLFireability-11:
[[35mlola[0m][.] BART-PT-050-LTLFireability-13:
[[35mlola[0m][.] BART-PT-050-LTLFireability-14:
[[35mlola[0m][.] BART-PT-050-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 51 secs.
[[35mlola[0m][.] # running tasks: 0 of
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mBART-PT-050-LTLFireability-12:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-050-LTLFireability-00:
[[35mlola[0m][.] BART-PT-050-LTLFireability-01:
[[35mlola[0m][.] BART-PT-050-LTLFireability-02:
[[35mlola[0m][.] BART-PT-050-LTLFireability-03:
[[35mlola[0m][.] BART-PT-050-LTLFireability-04:
[[35mlola[0m][.] BART-PT-050-LTLFireability-05:
[[35mlola[0m][.] BART-PT-050-LTLFireability-06:
[[35mlola[0m][.] BART-PT-050-LTLFireability-07:
[[35mlola[0m][.] BART-PT-050-LTLFireability-08:
[[35mlola[0m][.] BART-PT-050-LTLFireability-09:
[[35mlola[0m][.] BART-PT-050-LTLFireability-10:
[[35mlola[0m][.] BART-PT-050-LTLFireability-11:
[[35mlola[0m][.] BART-PT-050-LTLFireability-13:
[[35mlola[0m][.] BART-PT-050-LTLFireability-14:
[[35mlola[0m][.] BART-PT-050-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 56 secs.
[[35mlola[0m][.] # running tasks: 0 of
[[35mlola[0m][I] LAUNCH task # 64 (type
[[35mlola[0m][I] time limit : 177 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 64 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mBART-PT-050-LTLFireability-12:
[[35mlola[0m][.] [1m[31mBART-PT-050-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-050-LTLFireability-00:
[[35mlola[0m][.] BART-PT-050-LTLFireability-01:
[[35mlola[0m][.] BART-PT-050-LTLFireability-02:
[[35mlola[0m][.] BART-PT-050-LTLFireability-03:
[[35mlola[0m][.] BART-PT-050-LTLFireability-04:
[[35mlola[0m][.] BART-PT-050-LTLFireability-05:
[[35mlola[0m][.] BART-PT-050-LTLFireability-06:
[[35mlola[0m][.] BART-PT-050-LTLFireability-07:
[[35mlola[0m][.] BART-PT-050-LTLFireability-08:
[[35mlola[0m][.] BART-PT-050-LTLFireability-09:
[[35mlola[0m][.] BART-PT-050-LTLFireability-10:
[[35mlola[0m][.] BART-PT-050-LTLFireability-11:
[[35mlola[0m][.] BART-PT-050-LTLFireability-14:
[[35mlola[0m][.] BART-PT-050-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 61 secs.
[[35mlola[0m][.] # running tasks: 0 of
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mBART-PT-050-LTLFireability-12:
[[35mlola[0m][.] [1m[31mBART-PT-050-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-050-LTLFireability-00:
[[35mlola[0m][.] BART-PT-050-LTLFireability-01:
[[35mlola[0m][.] BART-PT-050-LTLFireability-02:
[[35mlola[0m][.] BART-PT-050-LTLFireability-03:
[[35mlola[0m][.] BART-PT-050-LTLFireability-04:
[[35mlola[0m][.] BART-PT-050-LTLFireability-05:
[[35mlola[0m][.] BART-PT-050-LTLFireability-06:
[[35mlola[0m][.] BART-PT-050-LTLFireability-07:
[[35mlola[0m][.] BART-PT-050-LTLFireability-08:
[[35mlola[0m][.] BART-PT-050-LTLFireability-09:
[[35mlola[0m][.] BART-PT-050-LTLFireability-10:
[[35mlola[0m][.] BART-PT-050-LTLFireability-11:
[[35mlola[0m][.] BART-PT-050-LTLFireability-14:
[[35mlola[0m][.] BART-PT-050-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 66 secs.
[[35mlola[0m][.] # running tasks: 0 of
[[35mlola[0m][I] LAUNCH task # 40 (type
[[35mlola[0m][I] time limit : 207 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 40 (type
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mBART-PT-050-LTLFireability-09:
[[35mlola[0m][.] [1m[31mBART-PT-050-LTLFireability-12:
[[35mlola[0m][.] [1m[31mBART-PT-050-LTLFireability-13:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-050-LTLFireability-00:
[[35mlola[0m][.] BART-PT-050-LTLFireability-01:
[[35mlola[0m][.] BART-PT-050-LTLFireability-02:
[[35mlola[0m][.] BART-PT-050-LTLFireability-03:
[[35mlola[0m][.] BART-PT-050-LTLFireability-04:
[[35mlola[0m][.] BART-PT-050-LTLFireability-05:
[[35mlola[0m][.] BART-PT-050-LTLFireability-06:
[[35mlola[0m][.] BART-PT-050-LTLFireability-07:
[[35mlola[0m][.] BART-PT-050-LTLFireability-08:
[[35mlola[0m][.] BART-PT-050-LTLFireability-10:
[[35mlola[0m][.] BART-PT-050-LTLFireability-11:
[[35mlola[0m][.] BART-PT-050-LTLFireability-14:
[[35mlola[0m][.] BART-PT-050-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 71 secs.
[[35mlola[0m][.] # running tasks: 0 of
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mBART-PT-050-LTLFireability-09:
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68900492.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16 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======================================== lity ================== lity.txt lity.xml lity.txt lity.xml pertiesDefinition.xml pertiesVerdict.xml lity.txt lity.xml lity.txt lity.xml tyCardinality.txt tyCardinality.xml tyFireability.txt tyFireability.xml s.txt s.xml (invocation template) vector(from text file) seconds at most ([1m[36m--timelimit[0m) memory specification: using default[0m from [4m[34mmodel.pnml[0m nmlnet[0m) net file [4m[34mmodel.pnml[0m mlformula[0m) from [4m[34mLTLFireability.xml[0m removed,0 places removed SKEL/SRCH) for 13 BART-PT-050-LTLFireability-03 SKEL/SRCH) for BART-PT-050-LTLFireability-03 560 560 0 1 CATEGORY VALUE PRODUCED BY[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 0 0 0 0 CONJ 0 0 0 0 0 0 0 0 F 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 CONJ 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 CONJ 0 0 0 0 0 0 0 0 CONJ 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 1 0 0 0 F 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 CONJ 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 CONJ 0 0 0 0 0 0 0 0 CONJ 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 CONJ 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 LTL 0 0 0 0 0 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 CONJ 0 0 0 0 3 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 4. Visible: 16 EXCL) for 48 BART-PT-050-LTLFireability-12 EXCL) for BART-PT-050-LTLFireability-12 3 4 0 1 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 4. Visible: 16 [status_logger] string pointer is null CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 4. Visible: 16 EXCL) for 55 BART-PT-050-LTLFireability-13 EXCL) for BART-PT-050-LTLFireability-13 116 116 1 1 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 4. Visible: 16 EXCL) for 35 BART-PT-050-LTLFireability-09 EXCL) for BART-PT-050-LTLFireability-09 217 217 0 1 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 4. Visible: 16 EXCL) for 45 BART-PT-050-LTLFireability-11 EXCL) for BART-PT-050-LTLFireability-11 217 217 0 1 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m LTL false LTL model checker[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m LTL false LTL model checker[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 4. Visible: 16 EXCL) for 42 BART-PT-050-LTLFireability-10 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m LTL false LTL model checker[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 BART-PT-050-LTLFireability-10 20559 m, 4111 m/sec, 57033 t fired, . Pages in use: 1 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m LTL false LTL model checker[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 2/2000 BART-PT-050-LTLFireability-10 50907 m, 6069 m/sec, 156750 t fired, . Pages in use: 2 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m LTL false LTL model checker[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 2/2000 BART-PT-050-LTLFireability-10 78059 m, 5430 m/sec, 249601 t fired, . Pages in use: 2 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m LTL false LTL model checker[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 3/2000 BART-PT-050-LTLFireability-10 104891 m, 5366 m/sec, 345800 t fired, . Pages in use: 3 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m LTL false LTL model checker[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 3/2000 BART-PT-050-LTLFireability-10 131948 m, 5411 m/sec, 448643 t fired, . Pages in use: 3 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m LTL false LTL model checker[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 3/2000 BART-PT-050-LTLFireability-10 156675 m, 4945 m/sec, 538824 t fired, . Pages in use: 3 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m LTL false LTL model checker[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 4/2000 BART-PT-050-LTLFireability-10 182522 m, 5169 m/sec, 639513 t fired, . Pages in use: 4 4. Visible: 16 CATEGORY VALUE PRODUCED BY[0m CONJ false LTL model checker[0m LTL false LTL model checker[0m CONJ false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 1 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 2 0 0 0 F 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 4/2000 BART-PT-050-LTLFireability-10 208346 m, 5164 m/sec, 746159 t fired, . Pages in use: 4 4. Visible: 16 $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-PT-050"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is BART-PT-050, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r027-smll-171620168900492"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BART-PT-050.tgz
mv BART-PT-050 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;