MCC'2024- Execution of r027-smll-171620168800458

About the Execution of LoLA for BART-PT-010

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
16206.892	1040977.00	1747573.00	3786.30	??FF?????TF?T???	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r027-smll-171620168800458.qcow2',
Waiting for the VM to be ready (probing ssh)
........................................................
==================================
Generated by BenchKit 2-5568
Executing tool lola
Input is BART-PT-010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r027-smll-171620168800458
========================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 29M
-rw-r--r-- 1 mcc users 1020K Apr 12 22:22 CTLCardinality
-rw-r--r-- 1 mcc users 3.7M Apr 12 22:22 CTLCardinality
-rw-r--r-- 1 mcc users 356K Apr 12 21:48 CTLFireability
-rw-r--r-- 1 mcc users 1.2M Apr 12 21:48 CTLFireability
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropert
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropert
-rw-r--r-- 1 mcc users 377K Apr 22 14:29 LTLCardinality
-rw-r--r-- 1 mcc users 1.1M Apr 22 14:29 LTLCardinality
-rw-r--r-- 1 mcc users 386K Apr 22 14:29 LTLFireability
-rw-r--r-- 1 mcc users 1010K Apr 22 14:29 LTLFireability
-rw-r--r-- 1 mcc users 2.1M Apr 12 23:23 ReachabilityCa
-rw-r--r-- 1 mcc users 7.4M Apr 12 23:23 ReachabilityCa
-rw-r--r-- 1 mcc users 1.9M Apr 12 22:48 ReachabilityFi
-rw-r--r-- 1 mcc users 6.1M Apr 12 22:48 ReachabilityFi
-rw-r--r-- 1 mcc users 84K Apr 22 14:29 UpperBounds.tx
-rw-r--r-- 1 mcc users 172K Apr 22 14:29 UpperBounds.xm
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 2.4M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from
FORMULA_NAME BART-PT-010-CTLFireability-2024-00
FORMULA_NAME BART-PT-010-CTLFireability-2024-01
FORMULA_NAME BART-PT-010-CTLFireability-2024-02
FORMULA_NAME BART-PT-010-CTLFireability-2024-03
FORMULA_NAME BART-PT-010-CTLFireability-2024-04
FORMULA_NAME BART-PT-010-CTLFireability-2024-05
FORMULA_NAME BART-PT-010-CTLFireability-2024-06
FORMULA_NAME BART-PT-010-CTLFireability-2024-07
FORMULA_NAME BART-PT-010-CTLFireability-2024-08
FORMULA_NAME BART-PT-010-CTLFireability-2024-09
FORMULA_NAME BART-PT-010-CTLFireability-2024-10
FORMULA_NAME BART-PT-010-CTLFireability-2024-11
FORMULA_NAME BART-PT-010-CTLFireability-2024-12
FORMULA_NAME BART-PT-010-CTLFireability-2024-13
FORMULA_NAME BART-PT-010-CTLFireability-2024-14
FORMULA_NAME BART-PT-010-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717166327792

FORMULA BART-PT-010-CTLFireability-2024-12
FORMULA BART-PT-010-CTLFireability-2024-09
FORMULA BART-PT-010-CTLFireability-2024-10
FORMULA BART-PT-010-CTLFireability-2024-03
FORMULA BART-PT-010-CTLFireability-2024-02

BK_STOP 1717167368769

--------------------
content from stderr:

[[35mlola[0m][I] LoLA will run for 3600 seconds
[[35mlola[0m][W] [1m[33munknown unit in memory
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlne
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition
[[35mlola[0m][I] closed [1m[34mnet[0m file
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlfor
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m
[[35mlola[0m][I] LAUNCH task # 54 (type SKEL/FNDP)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 55 (type SKEL/EQUN)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 56 (type SKEL/SRCH)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 56 (type SKEL/SRCH)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][W] CANCELED task # 54 (type FNDP)
[[35mlola[0m][W] CANCELED task # 55 (type EQUN)
[[35mlola[0m][I] FINISHED task # 54 (type SKEL/FNDP)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] Rule S: 0 transitions removed,0
[[35mlola[0m][I] LAUNCH task # 61 (type SKEL/EQUN)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 59 (type SKEL/SRCH)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 59 (type SKEL/SRCH)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][W] CANCELED task # 61 (type EQUN)
[[35mlola[0m][I] FINISHED task # 55 (type SKEL/EQUN)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 61 (type SKEL/EQUN)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 63 (type SKEL/FNDP)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 64 (type SKEL/EQUN)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 65 (type SKEL/SRCH)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 65 (type SKEL/SRCH)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][W] CANCELED task # 63 (type FNDP)
[[35mlola[0m][W] CANCELED task # 64 (type EQUN)
[[35mlola[0m][I] FINISHED task # 63 (type SKEL/FNDP)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] FINISHED task # 64 (type SKEL/EQUN)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 68 (type EXCL)
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 66 (type FNDP)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 67 (type EQUN)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 69 (type FNDP)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 68 (type EXCL)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][W] CANCELED task # 66 (type FNDP)
[[35mlola[0m][W] CANCELED task # 67 (type EQUN)
[[35mlola[0m][I] LAUNCH task # 71 (type EXCL)
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 70 (type EQUN)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 66 (type FNDP)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] FINISHED task # 71 (type EXCL)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][W] CANCELED task # 69 (type FNDP)
[[35mlola[0m][W] CANCELED task # 70 (type EQUN)
[[35mlola[0m][I] FINISHED task # 69 (type FNDP)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[32mBART-PT-010-CTLFireability-2024-12:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-00:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-01:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-02:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-03:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-04:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-05:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-06:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-07:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-08:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-09:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-10:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-11:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-13:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-14:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 7 secs.
[[35mlola[0m][.] # running tasks: 0 of 4. Visible:
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL)
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 67 (type EQUN)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 70 (type EQUN)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 32 (type EXCL)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL)
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 35 (type EXCL)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][I] LAUNCH task # 73 (type EXCL)
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 75 (type EQUN)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 73 (type EXCL)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings :
[[35mlola[0m][I] fired transitions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][W] CANCELED task # 75 (type EQUN)
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL)
[[35mlola[0m][I] time limit : 326 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 75 (type EQUN)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 77 (type FNDP)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 78 (type EQUN)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 77 (type FNDP)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions :
[[35mlola[0m][I] time used :
[[35mlola[0m][I] memory pages used :
[[35mlola[0m][W] CANCELED task # 78 (type EQUN)
[[35mlola[0m][I] FINISHED task # 78 (type EQUN)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mBART-PT-010-CTLFireability-2024-02:
[[35mlola[0m][.] [1m[31mBART-PT-010-CTLFireability-2024-03:
[[35mlola[0m][.] [1m[32mBART-PT-010-CTLFireability-2024-09:
[[35mlola[0m][.] [1m[31mBART-PT-010-CTLFireability-2024-10:
[[35mlola[0m][.] [1m[32mBART-PT-010-CTLFireability-2024-12:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-00:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-01:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-04:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-05:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-06:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-07:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-08:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-11:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-13:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-14:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 50 CTL EXCL 1/326
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 12 secs.
[[35mlola[0m][.] # running tasks: 1 of 4. Visible:
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mBART-PT-010-CTLFireability-2024-02:
[[35mlola[0m][.] [1m[31mBART-PT-010-CTLFireability-2024-03:
[[35mlola[0m][.] [1m[32mBART-PT-010-CTLFireability-2024-09:
[[35mlola[0m][.] [1m[31mBART-PT-010-CTLFireability-2024-10:
[[35mlola[0m][.] [1m[32mBART-PT-010-CTLFireability-2024-12:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-00:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-01:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-04:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-05:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-06:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-07:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-08:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-11:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-13:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-14:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 50 CTL EXCL 6/326
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 17 secs.
[[35mlola[0m][.] # running tasks: 1 of 4. Visible:
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mBART-PT-010-CTLFireability-2024-02:
[[35mlola[0m][.] [1m[31mBART-PT-010-CTLFireability-2024-03:
[[35mlola[0m][.] [1m[32mBART-PT-010-CTLFireability-2024-09:
[[35mlola[0m][.] [1m[31mBART-PT-010-CTLFireability-2024-10:
[[35mlola[0m][.] [1m[32mBART-PT-010-CTLFireability-2024-12:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-00:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-01:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-04:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-05:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-06:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-07:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-08:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-11:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-13:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-14:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 50 CTL EXCL 11/326
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 22 secs.
[[35mlola[0m][.] # running tasks: 1 of 4. Visible:
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mBART-PT-010-CTLFireability-2024-02:
[[35mlola[0m][.] [1m[31mBART-PT-010-CTLFireability-2024-03:
[[35mlola[0m][.] [1m[32mBART-PT-010-CTLFireability-2024-09:
[[35mlola[0m][.] [1m[31mBART-PT-010-CTLFireability-2024-10:
[[35mlola[0m][.] [1m[32mBART-PT-010-CTLFireability-2024-12:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-00:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-01:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-04:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-05:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-06:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-07:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-08:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-11:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-13:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-14:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE
[[35mlola[0m][.] 50 CTL EXCL 16/326
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 27 secs.
[[35mlola[0m][.] # running tasks: 1 of 4. Visible:
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mBART-PT-010-CTLFireability-2024-02:
[[35mlola[0m][.] [1m[31mBART-PT-010-CTLFireability-2024-03:
[[35mlola[0m][.] [1m[32mBART-PT-010-CTLFireability-2024-09:
[[35mlola[0m][.] [1m[31mBART-PT-010-CTLFireability-2024-10:
[[35mlola[0m][.] [1m[32mBART-PT-010-CTLFireability-2024-12:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-00:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-01:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-04:
[[35mlola[0m][.] BART-PT-010-CTLFireability-2024-05:
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=================================== ============= .txt .xml .txt .xml iesDefinition.xml iesVerdict.xml .txt .xml .txt .xml rdinality.txt rdinality.xml reability.txt reability.xml t l (invocation template) text file) TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT at most ([1m[36m--timelimit[0m) specification: using default[0m [4m[34mmodel.pnml[0m t[0m) net [4m[34mmodel.pnml[0m mula[0m) from [4m[34mCTLFireability.xml[0m for 6 BART-PT-010-CTLFireability-2024-02 for 6 BART-PT-010-CTLFireability-2024-02 for 6 BART-PT-010-CTLFireability-2024-02 for BART-PT-010-CTLFireability-2024-02 3 2 0 1 for BART-PT-010-CTLFireability-2024-02 (obsolete) for BART-PT-010-CTLFireability-2024-02 (obsolete) for BART-PT-010-CTLFireability-2024-02 1 0 0 places removed for 9 BART-PT-010-CTLFireability-2024-03 for 9 BART-PT-010-CTLFireability-2024-03 for BART-PT-010-CTLFireability-2024-03 3 2 0 1 for BART-PT-010-CTLFireability-2024-03 (obsolete) for BART-PT-010-CTLFireability-2024-02 for BART-PT-010-CTLFireability-2024-03 for 27 BART-PT-010-CTLFireability-2024-09 for 27 BART-PT-010-CTLFireability-2024-09 for 27 BART-PT-010-CTLFireability-2024-09 for BART-PT-010-CTLFireability-2024-09 2 1 0 1 for BART-PT-010-CTLFireability-2024-09 (obsolete) for BART-PT-010-CTLFireability-2024-09 (obsolete) for BART-PT-010-CTLFireability-2024-09 1 1 0 for BART-PT-010-CTLFireability-2024-09 for 40 BART-PT-010-CTLFireability-2024-12 for 40 BART-PT-010-CTLFireability-2024-12 for 40 BART-PT-010-CTLFireability-2024-12 for 27 BART-PT-010-CTLFireability-2024-09 for BART-PT-010-CTLFireability-2024-12 5 4 1 1 for BART-PT-010-CTLFireability-2024-12 (obsolete) for BART-PT-010-CTLFireability-2024-12 (obsolete) for 27 BART-PT-010-CTLFireability-2024-09 for 27 BART-PT-010-CTLFireability-2024-09 for BART-PT-010-CTLFireability-2024-12 1 1 0 for BART-PT-010-CTLFireability-2024-09 2 1 0 1 for BART-PT-010-CTLFireability-2024-09 (obsolete) for BART-PT-010-CTLFireability-2024-09 (obsolete) for BART-PT-010-CTLFireability-2024-09 1 1 0 CATEGORY VALUE PRODUCED BY[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 AG 0 0 0 0 3 0 0 0 AXAG 0 0 0 0 2 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 1 0 0 0 6 0 0 1 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 1 16 for 27 BART-PT-010-CTLFireability-2024-09 for BART-PT-010-CTLFireability-2024-12 for BART-PT-010-CTLFireability-2024-09 for BART-PT-010-CTLFireability-2024-09 976 1175 1 1 for 34 BART-PT-010-CTLFireability-2024-10 for BART-PT-010-CTLFireability-2024-10 11633 12352 1 1 for 9 BART-PT-010-CTLFireability-2024-03 for 9 BART-PT-010-CTLFireability-2024-03 for BART-PT-010-CTLFireability-2024-03 3 2 0 1 for BART-PT-010-CTLFireability-2024-03 (obsolete) for 49 BART-PT-010-CTLFireability-2024-15 for BART-PT-010-CTLFireability-2024-03 for 6 BART-PT-010-CTLFireability-2024-02 for 6 BART-PT-010-CTLFireability-2024-02 for BART-PT-010-CTLFireability-2024-02 1 0 0 for BART-PT-010-CTLFireability-2024-02 (obsolete) for BART-PT-010-CTLFireability-2024-02 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 1/2000 BART-PT-010-CTLFireability-2024-15 45548 m, 9109 m/sec, 214745 t fired, . Pages in use: 1 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 2/2000 BART-PT-010-CTLFireability-2024-15 240283 m, 38947 m/sec, 1166002 t fired, . Pages in use: 2 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 4/2000 BART-PT-010-CTLFireability-2024-15 430302 m, 38003 m/sec, 2106124 t fired, . Pages in use: 4 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 5/2000 BART-PT-010-CTLFireability-2024-15 616930 m, 37325 m/sec, 3044088 t fired, . Pages in use: 5 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 6/2000 BART-PT-010-CTLFireability-2024-15 802073 m, 37028 m/sec, 3974894 t fired, . Pages in use: 6 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 8/2000 BART-PT-010-CTLFireability-2024-15 985429 m, 36671 m/sec, 4900375 t fired, . Pages in use: 8 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 9/2000 BART-PT-010-CTLFireability-2024-15 1172197 m, 37353 m/sec, 5844393 t fired, . Pages in use: 9 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 11/2000 BART-PT-010-CTLFireability-2024-15 1350807 m, 35722 m/sec, 6779484 t fired, . Pages in use: 11 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 12/2000 BART-PT-010-CTLFireability-2024-15 1527346 m, 35307 m/sec, 7701802 t fired, . Pages in use: 12 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 13/2000 BART-PT-010-CTLFireability-2024-15 1707652 m, 36061 m/sec, 8624861 t fired, . Pages in use: 13 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 15/2000 BART-PT-010-CTLFireability-2024-15 1885760 m, 35621 m/sec, 9539079 t fired, . Pages in use: 15 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 16/2000 BART-PT-010-CTLFireability-2024-15 2064391 m, 35726 m/sec, 10459960 t fired, . Pages in use: 16 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 17/2000 BART-PT-010-CTLFireability-2024-15 2240464 m, 35214 m/sec, 11374667 t fired, . Pages in use: 17 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 18/2000 BART-PT-010-CTLFireability-2024-15 2416589 m, 35225 m/sec, 12299737 t fired, . Pages in use: 18 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 20/2000 BART-PT-010-CTLFireability-2024-15 2590874 m, 34857 m/sec, 13217614 t fired, . Pages in use: 20 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 21/2000 BART-PT-010-CTLFireability-2024-15 2763827 m, 34590 m/sec, 14126512 t fired, . Pages in use: 21 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 22/2000 BART-PT-010-CTLFireability-2024-15 2937557 m, 34746 m/sec, 15032426 t fired, . Pages in use: 22 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 24/2000 BART-PT-010-CTLFireability-2024-15 3121741 m, 36836 m/sec, 15948739 t fired, . Pages in use: 24 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 25/2000 BART-PT-010-CTLFireability-2024-15 3294545 m, 34560 m/sec, 16848130 t fired, . Pages in use: 25 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 26/2000 BART-PT-010-CTLFireability-2024-15 3463145 m, 33720 m/sec, 17745874 t fired, . Pages in use: 26 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 28/2000 BART-PT-010-CTLFireability-2024-15 3635398 m, 34450 m/sec, 18640251 t fired, . Pages in use: 28 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 29/2000 BART-PT-010-CTLFireability-2024-15 3810393 m, 34999 m/sec, 19537282 t fired, . Pages in use: 29 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 30/2000 BART-PT-010-CTLFireability-2024-15 3980458 m, 34013 m/sec, 20418118 t fired, . Pages in use: 30 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 31/2000 BART-PT-010-CTLFireability-2024-15 4151331 m, 34174 m/sec, 21307682 t fired, . Pages in use: 31 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 32/2000 BART-PT-010-CTLFireability-2024-15 4322368 m, 34207 m/sec, 22195918 t fired, . Pages in use: 32 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 34/2000 BART-PT-010-CTLFireability-2024-15 4492634 m, 34053 m/sec, 23094182 t fired, . Pages in use: 34 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 35/2000 BART-PT-010-CTLFireability-2024-15 4660375 m, 33548 m/sec, 23969958 t fired, . Pages in use: 35 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 36/2000 BART-PT-010-CTLFireability-2024-15 4826850 m, 33295 m/sec, 24853269 t fired, . Pages in use: 36 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 38/2000 BART-PT-010-CTLFireability-2024-15 4996954 m, 34020 m/sec, 25735631 t fired, . Pages in use: 38 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 39/2000 BART-PT-010-CTLFireability-2024-15 5163196 m, 33248 m/sec, 26624096 t fired, . Pages in use: 39 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 40/2000 BART-PT-010-CTLFireability-2024-15 5332478 m, 33856 m/sec, 27517480 t fired, . Pages in use: 40 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 41/2000 BART-PT-010-CTLFireability-2024-15 5494132 m, 32330 m/sec, 28392347 t fired, . Pages in use: 41 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 43/2000 BART-PT-010-CTLFireability-2024-15 5658593 m, 32892 m/sec, 29272219 t fired, . Pages in use: 43 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 44/2000 BART-PT-010-CTLFireability-2024-15 5829409 m, 34163 m/sec, 30156933 t fired, . Pages in use: 44 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 45/2000 BART-PT-010-CTLFireability-2024-15 5993753 m, 32868 m/sec, 31032402 t fired, . Pages in use: 45 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 46/2000 BART-PT-010-CTLFireability-2024-15 6166934 m, 34636 m/sec, 31916865 t fired, . Pages in use: 46 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 47/2000 BART-PT-010-CTLFireability-2024-15 6337595 m, 34132 m/sec, 32793942 t fired, . Pages in use: 47 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 49/2000 BART-PT-010-CTLFireability-2024-15 6500688 m, 32618 m/sec, 33659572 t fired, . Pages in use: 49 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 50/2000 BART-PT-010-CTLFireability-2024-15 6667561 m, 33374 m/sec, 34532881 t fired, . Pages in use: 50 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 51/2000 BART-PT-010-CTLFireability-2024-15 6828610 m, 32209 m/sec, 35395680 t fired, . Pages in use: 51 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 52/2000 BART-PT-010-CTLFireability-2024-15 6994516 m, 33181 m/sec, 36256484 t fired, . Pages in use: 52 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 53/2000 BART-PT-010-CTLFireability-2024-15 7155432 m, 32183 m/sec, 37121673 t fired, . Pages in use: 53 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 55/2000 BART-PT-010-CTLFireability-2024-15 7322469 m, 33407 m/sec, 37993854 t fired, . Pages in use: 55 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 56/2000 BART-PT-010-CTLFireability-2024-15 7482646 m, 32035 m/sec, 38858348 t fired, . Pages in use: 56 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 57/2000 BART-PT-010-CTLFireability-2024-15 7651178 m, 33706 m/sec, 39726107 t fired, . Pages in use: 57 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 58/2000 BART-PT-010-CTLFireability-2024-15 7811870 m, 32138 m/sec, 40583376 t fired, . Pages in use: 58 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 60/2000 BART-PT-010-CTLFireability-2024-15 7974386 m, 32503 m/sec, 41445675 t fired, . Pages in use: 60 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 61/2000 BART-PT-010-CTLFireability-2024-15 8140907 m, 33304 m/sec, 42317751 t fired, . Pages in use: 61 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 62/2000 BART-PT-010-CTLFireability-2024-15 8299630 m, 31744 m/sec, 43172000 t fired, . Pages in use: 62 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 63/2000 BART-PT-010-CTLFireability-2024-15 8468976 m, 33869 m/sec, 44048583 t fired, . Pages in use: 63 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 64/2000 BART-PT-010-CTLFireability-2024-15 8642350 m, 34674 m/sec, 44933787 t fired, . Pages in use: 64 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 65/2000 BART-PT-010-CTLFireability-2024-15 8817791 m, 35088 m/sec, 45819190 t fired, . Pages in use: 65 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 67/2000 BART-PT-010-CTLFireability-2024-15 8985489 m, 33539 m/sec, 46689342 t fired, . Pages in use: 67 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 68/2000 BART-PT-010-CTLFireability-2024-15 9156506 m, 34203 m/sec, 47567252 t fired, . Pages in use: 68 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 69/2000 BART-PT-010-CTLFireability-2024-15 9322859 m, 33270 m/sec, 48439403 t fired, . Pages in use: 69 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 70/2000 BART-PT-010-CTLFireability-2024-15 9493030 m, 34034 m/sec, 49309012 t fired, . Pages in use: 70 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 71/2000 BART-PT-010-CTLFireability-2024-15 9656231 m, 32640 m/sec, 50162418 t fired, . Pages in use: 71 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 72/2000 BART-PT-010-CTLFireability-2024-15 9819167 m, 32587 m/sec, 51013286 t fired, . Pages in use: 72 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 73/2000 BART-PT-010-CTLFireability-2024-15 9980912 m, 32349 m/sec, 51861853 t fired, . Pages in use: 73 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 75/2000 BART-PT-010-CTLFireability-2024-15 10139432 m, 31704 m/sec, 52705164 t fired, . Pages in use: 75 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 76/2000 BART-PT-010-CTLFireability-2024-15 10296110 m, 31335 m/sec, 53551129 t fired, . Pages in use: 76 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 77/2000 BART-PT-010-CTLFireability-2024-15 10457150 m, 32208 m/sec, 54405412 t fired, . Pages in use: 77 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 78/2000 BART-PT-010-CTLFireability-2024-15 10617018 m, 31973 m/sec, 55261152 t fired, . Pages in use: 78 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 79/2000 BART-PT-010-CTLFireability-2024-15 10777394 m, 32075 m/sec, 56113851 t fired, . Pages in use: 79 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 80/2000 BART-PT-010-CTLFireability-2024-15 10943181 m, 33157 m/sec, 56963780 t fired, . Pages in use: 80 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 82/2000 BART-PT-010-CTLFireability-2024-15 11120863 m, 35536 m/sec, 57848966 t fired, . Pages in use: 82 16 for BART-PT-010-CTLFireability-2024-15 (local timeout) CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 1 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 83 16 for 37 BART-PT-010-CTLFireability-2024-11 for 49 BART-PT-010-CTLFireability-2024-15 for BART-PT-010-CTLFireability-2024-11 371 370 0 1 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 2/5 BART-PT-010-CTLFireability-2024-15 186703 m, -2186832 m/sec, 903654 t fired, . Pages in use: 86 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 3/5 BART-PT-010-CTLFireability-2024-15 371793 m, 37018 m/sec, 1814241 t fired, . Pages in use: 89 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 5/5 BART-PT-010-CTLFireability-2024-15 554118 m, 36465 m/sec, 2728186 t fired, . Pages in use: 92 16 for BART-PT-010-CTLFireability-2024-15 (memory limit exceeded) CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 93 16 for 24 BART-PT-010-CTLFireability-2024-08 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 3/2000 BART-PT-010-CTLFireability-2024-08 311061 m, 62212 m/sec, 831683 t fired, . Pages in use: 93 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 5/2000 BART-PT-010-CTLFireability-2024-08 606854 m, 59158 m/sec, 1635093 t fired, . Pages in use: 95 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 7/2000 BART-PT-010-CTLFireability-2024-08 899482 m, 58525 m/sec, 2437266 t fired, . Pages in use: 98 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 9/2000 BART-PT-010-CTLFireability-2024-08 1184095 m, 56922 m/sec, 3222711 t fired, . Pages in use: 101 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 11/2000 BART-PT-010-CTLFireability-2024-08 1477662 m, 58713 m/sec, 4027561 t fired, . Pages in use: 104 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 13/2000 BART-PT-010-CTLFireability-2024-08 1757129 m, 55893 m/sec, 4837455 t fired, . Pages in use: 108 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 15/2000 BART-PT-010-CTLFireability-2024-08 2039559 m, 56486 m/sec, 5631133 t fired, . Pages in use: 111 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 17/2000 BART-PT-010-CTLFireability-2024-08 2321368 m, 56361 m/sec, 6417151 t fired, . Pages in use: 114 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 19/2000 BART-PT-010-CTLFireability-2024-08 2594797 m, 54685 m/sec, 7219066 t fired, . Pages in use: 117 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 21/2000 BART-PT-010-CTLFireability-2024-08 2864553 m, 53951 m/sec, 8005679 t fired, . Pages in use: 120 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 23/2000 BART-PT-010-CTLFireability-2024-08 3123404 m, 51770 m/sec, 8787942 t fired, . Pages in use: 123 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 25/2000 BART-PT-010-CTLFireability-2024-08 3382729 m, 51865 m/sec, 9564388 t fired, . Pages in use: 126 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 27/2000 BART-PT-010-CTLFireability-2024-08 3635538 m, 50561 m/sec, 10335399 t fired, . Pages in use: 129 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 29/2000 BART-PT-010-CTLFireability-2024-08 3897573 m, 52407 m/sec, 11096864 t fired, . Pages in use: 132 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 31/2000 BART-PT-010-CTLFireability-2024-08 4159928 m, 52471 m/sec, 11846008 t fired, . Pages in use: 136 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 33/2000 BART-PT-010-CTLFireability-2024-08 4411118 m, 50238 m/sec, 12611326 t fired, . Pages in use: 139 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 35/2000 BART-PT-010-CTLFireability-2024-08 4666747 m, 51125 m/sec, 13370735 t fired, . Pages in use: 142 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 37/2000 BART-PT-010-CTLFireability-2024-08 4926034 m, 51857 m/sec, 14138780 t fired, . Pages in use: 145 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 39/2000 BART-PT-010-CTLFireability-2024-08 5178821 m, 50557 m/sec, 14891507 t fired, . Pages in use: 148 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 40/2000 BART-PT-010-CTLFireability-2024-08 5440267 m, 52289 m/sec, 15644033 t fired, . Pages in use: 150 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 42/2000 BART-PT-010-CTLFireability-2024-08 5695196 m, 50985 m/sec, 16388015 t fired, . Pages in use: 153 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 44/2000 BART-PT-010-CTLFireability-2024-08 5944116 m, 49784 m/sec, 17133301 t fired, . Pages in use: 156 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 46/2000 BART-PT-010-CTLFireability-2024-08 6185440 m, 48264 m/sec, 17863700 t fired, . Pages in use: 160 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 48/2000 BART-PT-010-CTLFireability-2024-08 6429129 m, 48737 m/sec, 18597526 t fired, . Pages in use: 163 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 50/2000 BART-PT-010-CTLFireability-2024-08 6678770 m, 49928 m/sec, 19325614 t fired, . Pages in use: 166 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 51/2000 BART-PT-010-CTLFireability-2024-08 6925818 m, 49409 m/sec, 20054830 t fired, . Pages in use: 168 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 53/2000 BART-PT-010-CTLFireability-2024-08 7174987 m, 49833 m/sec, 20790133 t fired, . Pages in use: 171 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 55/2000 BART-PT-010-CTLFireability-2024-08 7414715 m, 47945 m/sec, 21520179 t fired, . Pages in use: 174 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 57/2000 BART-PT-010-CTLFireability-2024-08 7664799 m, 50016 m/sec, 22239401 t fired, . Pages in use: 177 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 58/2000 BART-PT-010-CTLFireability-2024-08 7912509 m, 49542 m/sec, 22949552 t fired, . Pages in use: 179 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 60/2000 BART-PT-010-CTLFireability-2024-08 8175331 m, 52564 m/sec, 23690019 t fired, . Pages in use: 182 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 62/2000 BART-PT-010-CTLFireability-2024-08 8425022 m, 49938 m/sec, 24430053 t fired, . Pages in use: 185 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 64/2000 BART-PT-010-CTLFireability-2024-08 8682801 m, 51555 m/sec, 25168292 t fired, . Pages in use: 188 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 66/2000 BART-PT-010-CTLFireability-2024-08 8927804 m, 49000 m/sec, 25877530 t fired, . Pages in use: 191 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 67/2000 BART-PT-010-CTLFireability-2024-08 9171052 m, 48649 m/sec, 26574637 t fired, . Pages in use: 193 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 69/2000 BART-PT-010-CTLFireability-2024-08 9411252 m, 48040 m/sec, 27269668 t fired, . Pages in use: 197 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 71/2000 BART-PT-010-CTLFireability-2024-08 9668170 m, 51383 m/sec, 27986483 t fired, . Pages in use: 200 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 73/2000 BART-PT-010-CTLFireability-2024-08 9932075 m, 52781 m/sec, 28718616 t fired, . Pages in use: 203 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 74/2000 BART-PT-010-CTLFireability-2024-08 10175808 m, 48746 m/sec, 29428038 t fired, . Pages in use: 205 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 76/2000 BART-PT-010-CTLFireability-2024-08 10454767 m, 55791 m/sec, 30194375 t fired, . Pages in use: 208 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 78/2000 BART-PT-010-CTLFireability-2024-08 10721589 m, 53364 m/sec, 30921058 t fired, . Pages in use: 211 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 80/2000 BART-PT-010-CTLFireability-2024-08 10974037 m, 50489 m/sec, 31637213 t fired, . Pages in use: 214 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 82/2000 BART-PT-010-CTLFireability-2024-08 11209727 m, 47138 m/sec, 32333900 t fired, . Pages in use: 217 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 83/2000 BART-PT-010-CTLFireability-2024-08 11444629 m, 46980 m/sec, 33038876 t fired, . Pages in use: 219 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 85/2000 BART-PT-010-CTLFireability-2024-08 11683246 m, 47723 m/sec, 33756896 t fired, . Pages in use: 222 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 87/2000 BART-PT-010-CTLFireability-2024-08 11920079 m, 47366 m/sec, 34460923 t fired, . Pages in use: 225 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 89/2000 BART-PT-010-CTLFireability-2024-08 12155005 m, 46985 m/sec, 35160561 t fired, . Pages in use: 228 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 90/2000 BART-PT-010-CTLFireability-2024-08 12395938 m, 48186 m/sec, 35879323 t fired, . Pages in use: 230 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 92/2000 BART-PT-010-CTLFireability-2024-08 12625718 m, 45956 m/sec, 36575048 t fired, . Pages in use: 233 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 94/2000 BART-PT-010-CTLFireability-2024-08 12857217 m, 46299 m/sec, 37273193 t fired, . Pages in use: 236 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 95/2000 BART-PT-010-CTLFireability-2024-08 13087281 m, 46012 m/sec, 37974544 t fired, . Pages in use: 238 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 97/2000 BART-PT-010-CTLFireability-2024-08 13323124 m, 47168 m/sec, 38668440 t fired, . Pages in use: 241 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 99/2000 BART-PT-010-CTLFireability-2024-08 13548440 m, 45063 m/sec, 39364505 t fired, . Pages in use: 244 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 100/2000 BART-PT-010-CTLFireability-2024-08 13780201 m, 46352 m/sec, 40045849 t fired, . Pages in use: 246 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 102/2000 BART-PT-010-CTLFireability-2024-08 14009537 m, 45867 m/sec, 40737633 t fired, . Pages in use: 250 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 103/2000 BART-PT-010-CTLFireability-2024-08 14235053 m, 45103 m/sec, 41434288 t fired, . Pages in use: 252 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 105/2000 BART-PT-010-CTLFireability-2024-08 14477277 m, 48444 m/sec, 42136962 t fired, . Pages in use: 255 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 107/2000 BART-PT-010-CTLFireability-2024-08 14705060 m, 45556 m/sec, 42832747 t fired, . Pages in use: 258 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 109/2000 BART-PT-010-CTLFireability-2024-08 14934341 m, 45856 m/sec, 43540959 t fired, . Pages in use: 261 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 110/2000 BART-PT-010-CTLFireability-2024-08 15162588 m, 45649 m/sec, 44216665 t fired, . Pages in use: 263 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 112/2000 BART-PT-010-CTLFireability-2024-08 15386864 m, 44855 m/sec, 44895817 t fired, . Pages in use: 266 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 113/2000 BART-PT-010-CTLFireability-2024-08 15610687 m, 44764 m/sec, 45577200 t fired, . Pages in use: 268 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 115/2000 BART-PT-010-CTLFireability-2024-08 15842027 m, 46268 m/sec, 46265428 t fired, . Pages in use: 271 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 116/2000 BART-PT-010-CTLFireability-2024-08 16073679 m, 46330 m/sec, 46943494 t fired, . Pages in use: 273 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 118/2000 BART-PT-010-CTLFireability-2024-08 16297788 m, 44821 m/sec, 47634838 t fired, . Pages in use: 276 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 120/2000 BART-PT-010-CTLFireability-2024-08 16534226 m, 47287 m/sec, 48334253 t fired, . Pages in use: 279 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 121/2000 BART-PT-010-CTLFireability-2024-08 16760331 m, 45221 m/sec, 49020285 t fired, . Pages in use: 281 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 123/2000 BART-PT-010-CTLFireability-2024-08 16987098 m, 45353 m/sec, 49693819 t fired, . Pages in use: 284 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 124/2000 BART-PT-010-CTLFireability-2024-08 17217263 m, 46033 m/sec, 50370486 t fired, . Pages in use: 286 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 126/2000 BART-PT-010-CTLFireability-2024-08 17464493 m, 49446 m/sec, 51062577 t fired, . Pages in use: 289 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 128/2000 BART-PT-010-CTLFireability-2024-08 17691661 m, 45433 m/sec, 51744625 t fired, . Pages in use: 292 16 for BART-PT-010-CTLFireability-2024-08 (local timeout) CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 1 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 294 16 for 21 BART-PT-010-CTLFireability-2024-07 for 24 BART-PT-010-CTLFireability-2024-08 for BART-PT-010-CTLFireability-2024-07 360 719 0 1 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 3/5 BART-PT-010-CTLFireability-2024-08 305636 m, -3477205 m/sec, 817651 t fired, . Pages in use: 298 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 5/5 BART-PT-010-CTLFireability-2024-08 603033 m, 59479 m/sec, 1625615 t fired, . Pages in use: 301 16 for BART-PT-010-CTLFireability-2024-08 (memory limit exceeded) CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m Pages in use: 301 16 for 18 BART-PT-010-CTLFireability-2024-06 for BART-PT-010-CTLFireability-2024-06 3 2 0 1 for 15 BART-PT-010-CTLFireability-2024-05 for BART-PT-010-CTLFireability-2024-05 274 330 0 1 for 12 BART-PT-010-CTLFireability-2024-04 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 2/2000 BART-PT-010-CTLFireability-2024-04 180151 m, 36030 m/sec, 330375 t fired, . Pages in use: 301 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 3/2000 BART-PT-010-CTLFireability-2024-04 356146 m, 35199 m/sec, 666903 t fired, . Pages in use: 302 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 4/2000 BART-PT-010-CTLFireability-2024-04 527260 m, 34222 m/sec, 1009667 t fired, . Pages in use: 304 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 5/2000 BART-PT-010-CTLFireability-2024-04 696253 m, 33798 m/sec, 1349290 t fired, . Pages in use: 306 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 6/2000 BART-PT-010-CTLFireability-2024-04 862576 m, 33264 m/sec, 1697316 t fired, . Pages in use: 308 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 8/2000 BART-PT-010-CTLFireability-2024-04 1033010 m, 34086 m/sec, 2035353 t fired, . Pages in use: 311 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 9/2000 BART-PT-010-CTLFireability-2024-04 1201590 m, 33716 m/sec, 2390279 t fired, . Pages in use: 313 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 10/2000 BART-PT-010-CTLFireability-2024-04 1365448 m, 32771 m/sec, 2760397 t fired, . Pages in use: 315 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 12/2000 BART-PT-010-CTLFireability-2024-04 1527783 m, 32467 m/sec, 3120517 t fired, . Pages in use: 318 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 13/2000 BART-PT-010-CTLFireability-2024-04 1692418 m, 32927 m/sec, 3467760 t fired, . Pages in use: 320 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 14/2000 BART-PT-010-CTLFireability-2024-04 1855658 m, 32648 m/sec, 3815815 t fired, . Pages in use: 322 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 15/2000 BART-PT-010-CTLFireability-2024-04 2018602 m, 32588 m/sec, 4166428 t fired, . Pages in use: 324 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 16/2000 BART-PT-010-CTLFireability-2024-04 2179454 m, 32170 m/sec, 4519420 t fired, . Pages in use: 326 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 17/2000 BART-PT-010-CTLFireability-2024-04 2342475 m, 32604 m/sec, 4878977 t fired, . Pages in use: 328 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 19/2000 BART-PT-010-CTLFireability-2024-04 2502530 m, 32011 m/sec, 5247546 t fired, . Pages in use: 331 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 20/2000 BART-PT-010-CTLFireability-2024-04 2662726 m, 32039 m/sec, 5612691 t fired, . Pages in use: 333 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 21/2000 BART-PT-010-CTLFireability-2024-04 2821958 m, 31846 m/sec, 5959170 t fired, . Pages in use: 335 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 22/2000 BART-PT-010-CTLFireability-2024-04 2979448 m, 31498 m/sec, 6312283 t fired, . Pages in use: 337 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 23/2000 BART-PT-010-CTLFireability-2024-04 3151382 m, 34386 m/sec, 6636852 t fired, . Pages in use: 339 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 25/2000 BART-PT-010-CTLFireability-2024-04 3308109 m, 31345 m/sec, 6993649 t fired, . Pages in use: 343 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 26/2000 BART-PT-010-CTLFireability-2024-04 3464678 m, 31313 m/sec, 7359666 t fired, . Pages in use: 345 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 27/2000 BART-PT-010-CTLFireability-2024-04 3623469 m, 31758 m/sec, 7712433 t fired, . Pages in use: 347 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 28/2000 BART-PT-010-CTLFireability-2024-04 3787772 m, 32860 m/sec, 8056980 t fired, . Pages in use: 349 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 29/2000 BART-PT-010-CTLFireability-2024-04 3947271 m, 31899 m/sec, 8402479 t fired, . Pages in use: 351 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 30/2000 BART-PT-010-CTLFireability-2024-04 4105462 m, 31638 m/sec, 8753739 t fired, . Pages in use: 353 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 32/2000 BART-PT-010-CTLFireability-2024-04 4264861 m, 31879 m/sec, 9101428 t fired, . Pages in use: 356 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 33/2000 BART-PT-010-CTLFireability-2024-04 4420998 m, 31227 m/sec, 9455242 t fired, . Pages in use: 358 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 34/2000 BART-PT-010-CTLFireability-2024-04 4579864 m, 31773 m/sec, 9806406 t fired, . Pages in use: 360 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 35/2000 BART-PT-010-CTLFireability-2024-04 4735616 m, 31150 m/sec, 10158928 t fired, . Pages in use: 362 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 36/2000 BART-PT-010-CTLFireability-2024-04 4890682 m, 31013 m/sec, 10519705 t fired, . Pages in use: 364 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 37/2000 BART-PT-010-CTLFireability-2024-04 5050516 m, 31966 m/sec, 10865081 t fired, . Pages in use: 366 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 39/2000 BART-PT-010-CTLFireability-2024-04 5201987 m, 30294 m/sec, 11231265 t fired, . Pages in use: 369 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 40/2000 BART-PT-010-CTLFireability-2024-04 5360357 m, 31674 m/sec, 11590212 t fired, . Pages in use: 371 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 41/2000 BART-PT-010-CTLFireability-2024-04 5512042 m, 30337 m/sec, 11954847 t fired, . Pages in use: 373 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 42/2000 BART-PT-010-CTLFireability-2024-04 5667295 m, 31050 m/sec, 12312868 t fired, . Pages in use: 375 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 44/2000 BART-PT-010-CTLFireability-2024-04 5825823 m, 31705 m/sec, 12660655 t fired, . Pages in use: 378 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 45/2000 BART-PT-010-CTLFireability-2024-04 5978017 m, 30438 m/sec, 13021391 t fired, . Pages in use: 380 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 46/2000 BART-PT-010-CTLFireability-2024-04 6137795 m, 31955 m/sec, 13357197 t fired, . Pages in use: 382 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 47/2000 BART-PT-010-CTLFireability-2024-04 6297062 m, 31853 m/sec, 13691127 t fired, . Pages in use: 384 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 48/2000 BART-PT-010-CTLFireability-2024-04 6447790 m, 30145 m/sec, 14036134 t fired, . Pages in use: 386 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 49/2000 BART-PT-010-CTLFireability-2024-04 6600232 m, 30488 m/sec, 14385459 t fired, . Pages in use: 388 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 50/2000 BART-PT-010-CTLFireability-2024-04 6752621 m, 30477 m/sec, 14732134 t fired, . Pages in use: 390 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 51/2000 BART-PT-010-CTLFireability-2024-04 6909643 m, 31404 m/sec, 15072400 t fired, . Pages in use: 392 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 52/2000 BART-PT-010-CTLFireability-2024-04 7060935 m, 30258 m/sec, 15425360 t fired, . Pages in use: 393 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 54/2000 BART-PT-010-CTLFireability-2024-04 7212254 m, 30263 m/sec, 15782282 t fired, . Pages in use: 396 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 55/2000 BART-PT-010-CTLFireability-2024-04 7362654 m, 30080 m/sec, 16123762 t fired, . Pages in use: 398 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 56/2000 BART-PT-010-CTLFireability-2024-04 7510885 m, 29646 m/sec, 16474088 t fired, . Pages in use: 400 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 57/2000 BART-PT-010-CTLFireability-2024-04 7667298 m, 31282 m/sec, 16807211 t fired, . Pages in use: 402 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 58/2000 BART-PT-010-CTLFireability-2024-04 7813902 m, 29320 m/sec, 17154799 t fired, . Pages in use: 404 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 59/2000 BART-PT-010-CTLFireability-2024-04 7964052 m, 30030 m/sec, 17500401 t fired, . Pages in use: 406 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 60/2000 BART-PT-010-CTLFireability-2024-04 8117138 m, 30617 m/sec, 17844627 t fired, . Pages in use: 408 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 62/2000 BART-PT-010-CTLFireability-2024-04 8268153 m, 30203 m/sec, 18195928 t fired, . Pages in use: 411 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 63/2000 BART-PT-010-CTLFireability-2024-04 8421471 m, 30663 m/sec, 18545022 t fired, . Pages in use: 413 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 64/2000 BART-PT-010-CTLFireability-2024-04 8581122 m, 31930 m/sec, 18873929 t fired, . Pages in use: 415 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 65/2000 BART-PT-010-CTLFireability-2024-04 8740585 m, 31892 m/sec, 19214136 t fired, . Pages in use: 417 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 66/2000 BART-PT-010-CTLFireability-2024-04 8903119 m, 32506 m/sec, 19545277 t fired, . Pages in use: 419 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 67/2000 BART-PT-010-CTLFireability-2024-04 9056302 m, 30636 m/sec, 19886421 t fired, . Pages in use: 421 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 68/2000 BART-PT-010-CTLFireability-2024-04 9214398 m, 31619 m/sec, 20226413 t fired, . Pages in use: 423 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 69/2000 BART-PT-010-CTLFireability-2024-04 9366661 m, 30452 m/sec, 20564693 t fired, . Pages in use: 425 16 CATEGORY VALUE PRODUCED BY[0m AG false findpath[0m AXAG false state space /EXEF[0m CTL false CTL model checker[0m CTL true CTL model checker[0m CTL false CTL model checker[0m CONJ true CONJ[0m CTL false CTL model checker[0m CTL true CTL model checker[0m EF true state space[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m 70/2000 BART-PT-010-CTLFireability-2024-04 9487798 m, 24227 m/sec, 20819712 t fired, . Pages in use: 427 16 $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-PT-010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is BART-PT-010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r027-smll-171620168800458"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BART-PT-010.tgz
mv BART-PT-010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;