About the Execution of LoLA for BART-COL-050
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16208.363 | 1113094.00 | 1193169.00 | 4278.50 | ????????F??????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r027-smll-171620168700425.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is BART-COL-050, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r027-smll-171620168700425
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 764K
-rw-r--r-- 1 mcc users 9.5K Apr 13 01:28 CTLCardinality.txt
-rw-r--r-- 1 mcc users 96K Apr 13 01:28 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Apr 12 22:06 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Apr 12 22:06 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Apr 22 14:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 18K Apr 13 08:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 162K Apr 13 08:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 13 03:53 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 81K Apr 13 03:53 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 213K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BART-COL-050-CTLCardinality-2024-00
FORMULA_NAME BART-COL-050-CTLCardinality-2024-01
FORMULA_NAME BART-COL-050-CTLCardinality-2024-02
FORMULA_NAME BART-COL-050-CTLCardinality-2024-03
FORMULA_NAME BART-COL-050-CTLCardinality-2024-04
FORMULA_NAME BART-COL-050-CTLCardinality-2024-05
FORMULA_NAME BART-COL-050-CTLCardinality-2024-06
FORMULA_NAME BART-COL-050-CTLCardinality-2024-07
FORMULA_NAME BART-COL-050-CTLCardinality-2024-08
FORMULA_NAME BART-COL-050-CTLCardinality-2024-09
FORMULA_NAME BART-COL-050-CTLCardinality-2024-10
FORMULA_NAME BART-COL-050-CTLCardinality-2024-11
FORMULA_NAME BART-COL-050-CTLCardinality-2024-12
FORMULA_NAME BART-COL-050-CTLCardinality-2024-13
FORMULA_NAME BART-COL-050-CTLCardinality-2024-14
FORMULA_NAME BART-COL-050-CTLCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717159827278
FORMULA BART-COL-050-CTLCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717160940372
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 30 (type SKEL/CNST) for 28 BART-COL-050-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 30 (type SKEL/CNST) for BART-COL-050-CTLCardinality-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] Places: 22673, Transitions: 16150
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-08: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-00: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-05: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-14: CONJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-15: CTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-05: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-14: CONJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-15: CTL 0 0 0 0 0 0 0 0
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[[35mlola[0m][W] findlow criterion violated for transition 0
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-05: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-14: CONJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-15: CTL 0 0 0 0 0 0 0 0
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-05: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-14: CONJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-15: CTL 0 0 0 0 0 0 0 0
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-05: DISJ 0 0 0 0 2 0 0 0
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-14: CONJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-15: CTL 0 0 0 0 0 0 0 0
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-14: CONJ 0 0 0 0 1 0 0 0
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[[35mlola[0m][W] findlow criterion violated for transition 1
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-05: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-14: CONJ 1 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-15: CTL 1 0 0 0 0 0 0 0
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-14: CONJ 1 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-15: CTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-08: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.]
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-05: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-14: CONJ 1 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-15: CTL 1 0 0 0 0 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][I] LAUNCH task # 56 (type SKEL/SRCH) for 46 BART-COL-050-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 57 (type SKEL/SRCH) for 53 BART-COL-050-CTLCardinality-2024-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 57 (type SKEL/SRCH) for BART-COL-050-CTLCardinality-2024-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-08: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-15: CTL false skeleton: CTL model checker[0m
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-05: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-14: CONJ 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][I] FINISHED task # 56 (type SKEL/SRCH) for BART-COL-050-CTLCardinality-2024-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type CNST) for 3 BART-COL-050-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 13 (type CNST) for 12 BART-COL-050-CTLCardinality-2024-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 23 (type CNST) for 22 BART-COL-050-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 4 (type CNST) for BART-COL-050-CTLCardinality-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 13 (type CNST) for BART-COL-050-CTLCardinality-2024-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 23 (type CNST) for BART-COL-050-CTLCardinality-2024-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 26 (type CNST) for 25 BART-COL-050-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 35 (type CNST) for 34 BART-COL-050-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 0 sec
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[[35mlola[0m][I] FINISHED task # 26 (type CNST) for BART-COL-050-CTLCardinality-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 41 (type CNST) for 40 BART-COL-050-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 0 sec
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[[35mlola[0m][I] FINISHED task # 35 (type CNST) for BART-COL-050-CTLCardinality-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 44 (type CNST) for 43 BART-COL-050-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 0 sec
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[[35mlola[0m][I] FINISHED task # 41 (type CNST) for BART-COL-050-CTLCardinality-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 44 (type CNST) for BART-COL-050-CTLCardinality-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] Rule S: 6050 transitions removed,15801 places removed
[*** LOG ERROR #0001 ***] [2024-05-31 12:51:22] [status_logger] string pointer is null
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-01: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-04: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-06: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-08: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-050-CTLCardinality-2024-10: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-12: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-050-CTLCardinality-2024-13: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-14: CONJ false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-15: CTL false skeleton: CTL model checker[0m
[[35mlola[0m][.]
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-05: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-01: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-04: CTL false preprocessing[0m
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[[35mlola[0m][.] [1m[32mBART-COL-050-CTLCardinality-2024-10: CTL true preprocessing[0m
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[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-14: CONJ false skeleton: LTL model checker[0m
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-05: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-08: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-050-CTLCardinality-2024-10: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-12: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-050-CTLCardinality-2024-13: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-14: CONJ false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-15: CTL false skeleton: CTL model checker[0m
[[35mlola[0m][.]
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-05: DISJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 BART-COL-050-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 504 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for BART-COL-050-CTLCardinality-2024-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 3
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 37 BART-COL-050-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 588 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-01: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-04: CTL false preprocessing[0m
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[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-08: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-050-CTLCardinality-2024-10: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-12: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-050-CTLCardinality-2024-13: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-14: CONJ false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-15: CTL false skeleton: CTL model checker[0m
[[35mlola[0m][.]
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[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-05: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-050-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for BART-COL-050-CTLCardinality-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 73
[[35mlola[0m][I] fired transitions : 73
[[35mlola[0m][I] time used : 2
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 20 (type EXCL) for 15 BART-COL-050-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 705 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 20 (type EXCL) for BART-COL-050-CTLCardinality-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 BART-COL-050-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 1176 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-01: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-04: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-050-CTLCardinality-2024-05: DISJ true CTL model checker[0m
[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-06: CTL false preprocessing[0m
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[[35mlola[0m][.] [1m[31mBART-COL-050-CTLCardinality-2024-08: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-050-CTLCardinality-2024-10: CTL true preprocessing[0m
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 406 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-COL-050"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is BART-COL-050, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r027-smll-171620168700425"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BART-COL-050.tgz
mv BART-COL-050 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;