About the Execution of LoLA for BART-COL-010
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16208.004 | 515939.00 | 548991.00 | 2094.60 | ????????T?F????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r027-smll-171620168700393.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is BART-COL-010, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r027-smll-171620168700393
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 656K
-rw-r--r-- 1 mcc users 8.5K Apr 12 22:21 CTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Apr 12 22:21 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Apr 12 21:47 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Apr 12 21:47 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Apr 22 14:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 12 23:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 115K Apr 12 23:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.9K Apr 12 22:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 77K Apr 12 22:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 189K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BART-COL-010-CTLCardinality-2024-00
FORMULA_NAME BART-COL-010-CTLCardinality-2024-01
FORMULA_NAME BART-COL-010-CTLCardinality-2024-02
FORMULA_NAME BART-COL-010-CTLCardinality-2024-03
FORMULA_NAME BART-COL-010-CTLCardinality-2024-04
FORMULA_NAME BART-COL-010-CTLCardinality-2024-05
FORMULA_NAME BART-COL-010-CTLCardinality-2024-06
FORMULA_NAME BART-COL-010-CTLCardinality-2024-07
FORMULA_NAME BART-COL-010-CTLCardinality-2024-08
FORMULA_NAME BART-COL-010-CTLCardinality-2024-09
FORMULA_NAME BART-COL-010-CTLCardinality-2024-10
FORMULA_NAME BART-COL-010-CTLCardinality-2024-11
FORMULA_NAME BART-COL-010-CTLCardinality-2024-12
FORMULA_NAME BART-COL-010-CTLCardinality-2024-13
FORMULA_NAME BART-COL-010-CTLCardinality-2024-14
FORMULA_NAME BART-COL-010-CTLCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717151188376
FORMULA BART-COL-010-CTLCardinality-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BART-COL-010-CTLCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717151704315
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] LAUNCH task # 26 (type SKEL/CNST) for 24 BART-COL-010-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 32 (type SKEL/CNST) for 30 BART-COL-010-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 32 (type SKEL/CNST) for BART-COL-010-CTLCardinality-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 26 (type SKEL/CNST) for BART-COL-010-CTLCardinality-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] Places: 12833, Transitions: 3230
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-15: AGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-15: AGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 BART-COL-010-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for BART-COL-010-CTLCardinality-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 13 (type CNST) for 12 BART-COL-010-CTLCardinality-2024-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 16 (type CNST) for 15 BART-COL-010-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 13 (type CNST) for BART-COL-010-CTLCardinality-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 16 (type CNST) for BART-COL-010-CTLCardinality-2024-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 19 (type CNST) for 18 BART-COL-010-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 19 (type CNST) for BART-COL-010-CTLCardinality-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 22 (type CNST) for 21 BART-COL-010-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 22 (type CNST) for BART-COL-010-CTLCardinality-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 28 (type CNST) for 27 BART-COL-010-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 28 (type CNST) for BART-COL-010-CTLCardinality-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 36 (type CNST) for 33 BART-COL-010-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 36 (type CNST) for BART-COL-010-CTLCardinality-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 47 (type CNST) for 46 BART-COL-010-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 47 (type CNST) for BART-COL-010-CTLCardinality-2024-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 50 (type CNST) for 49 BART-COL-010-CTLCardinality-2024-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 50 (type CNST) for BART-COL-010-CTLCardinality-2024-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] Rule S: 1210 transitions removed,11241 places removed
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 BART-COL-010-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 598 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for BART-COL-010-CTLCardinality-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 86
[[35mlola[0m][I] fired transitions : 86
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 40 BART-COL-010-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 717 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][W] findlow criterion violated for transition 0
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 3/717 3/2000 BART-COL-010-CTLCardinality-2024-12 163005 m, 32601 m/sec, 209706 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 8/717 7/2000 BART-COL-010-CTLCardinality-2024-12 442084 m, 55815 m/sec, 574391 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] findlow criterion violated for transition 4
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 13/717 11/2000 BART-COL-010-CTLCardinality-2024-12 722986 m, 56180 m/sec, 936640 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] findlow criterion violated for transition 1
[[35mlola[0m][W] findlow criterion violated for 3 clusters
[[35mlola[0m][I] Time for checking findlow: 29
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 18/717 14/2000 BART-COL-010-CTLCardinality-2024-12 998358 m, 55074 m/sec, 1297772 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 23/717 16/2000 BART-COL-010-CTLCardinality-2024-12 1289546 m, 58237 m/sec, 1678581 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 28/717 18/2000 BART-COL-010-CTLCardinality-2024-12 1578384 m, 57767 m/sec, 2061553 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 33/717 20/2000 BART-COL-010-CTLCardinality-2024-12 1869466 m, 58216 m/sec, 2440437 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 38/717 23/2000 BART-COL-010-CTLCardinality-2024-12 2159622 m, 58031 m/sec, 2819747 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 43/717 26/2000 BART-COL-010-CTLCardinality-2024-12 2449789 m, 58033 m/sec, 3204385 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 48/717 28/2000 BART-COL-010-CTLCardinality-2024-12 2738274 m, 57697 m/sec, 3582113 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 53/717 30/2000 BART-COL-010-CTLCardinality-2024-12 3028414 m, 58028 m/sec, 3958077 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 58/717 32/2000 BART-COL-010-CTLCardinality-2024-12 3316637 m, 57644 m/sec, 4334922 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 63/717 35/2000 BART-COL-010-CTLCardinality-2024-12 3607405 m, 58153 m/sec, 4713501 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 68/717 38/2000 BART-COL-010-CTLCardinality-2024-12 3894777 m, 57474 m/sec, 5092668 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 73/717 40/2000 BART-COL-010-CTLCardinality-2024-12 4179775 m, 56999 m/sec, 5468467 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 78/717 42/2000 BART-COL-010-CTLCardinality-2024-12 4468629 m, 57770 m/sec, 5842890 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 42
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 83/717 43/2000 BART-COL-010-CTLCardinality-2024-12 4754786 m, 57231 m/sec, 6214567 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 88/717 46/2000 BART-COL-010-CTLCardinality-2024-12 5041774 m, 57397 m/sec, 6593339 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 46
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 93/717 48/2000 BART-COL-010-CTLCardinality-2024-12 5328564 m, 57358 m/sec, 6973612 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 98/717 51/2000 BART-COL-010-CTLCardinality-2024-12 5614506 m, 57188 m/sec, 7349388 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 103/717 53/2000 BART-COL-010-CTLCardinality-2024-12 5900384 m, 57175 m/sec, 7727104 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 53
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 108/717 55/2000 BART-COL-010-CTLCardinality-2024-12 6181771 m, 56277 m/sec, 8097111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 113/717 57/2000 BART-COL-010-CTLCardinality-2024-12 6466786 m, 57003 m/sec, 8471373 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 57
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 118/717 59/2000 BART-COL-010-CTLCardinality-2024-12 6749615 m, 56565 m/sec, 8851271 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 59
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 123/717 61/2000 BART-COL-010-CTLCardinality-2024-12 7031043 m, 56285 m/sec, 9228857 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 128/717 63/2000 BART-COL-010-CTLCardinality-2024-12 7317831 m, 57357 m/sec, 9602429 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 133/717 66/2000 BART-COL-010-CTLCardinality-2024-12 7601363 m, 56706 m/sec, 9976641 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 66
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 138/717 69/2000 BART-COL-010-CTLCardinality-2024-12 7883851 m, 56497 m/sec, 10357450 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 69
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 143/717 72/2000 BART-COL-010-CTLCardinality-2024-12 8173461 m, 57922 m/sec, 10733435 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 148/717 75/2000 BART-COL-010-CTLCardinality-2024-12 8463180 m, 57943 m/sec, 11111695 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 153/717 77/2000 BART-COL-010-CTLCardinality-2024-12 8749372 m, 57238 m/sec, 11486529 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 77
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 158/717 78/2000 BART-COL-010-CTLCardinality-2024-12 9037739 m, 57673 m/sec, 11862276 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 163/717 80/2000 BART-COL-010-CTLCardinality-2024-12 9322768 m, 57005 m/sec, 12236497 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 168/717 83/2000 BART-COL-010-CTLCardinality-2024-12 9612627 m, 57971 m/sec, 12612828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 83
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 173/717 85/2000 BART-COL-010-CTLCardinality-2024-12 9900418 m, 57558 m/sec, 12986578 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 85
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 178/717 87/2000 BART-COL-010-CTLCardinality-2024-12 10185279 m, 56972 m/sec, 13359726 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 190 secs. Pages in use: 87
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 183/717 89/2000 BART-COL-010-CTLCardinality-2024-12 10468097 m, 56563 m/sec, 13738432 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 195 secs. Pages in use: 89
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 188/717 92/2000 BART-COL-010-CTLCardinality-2024-12 10755371 m, 57454 m/sec, 14116475 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 200 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 193/717 95/2000 BART-COL-010-CTLCardinality-2024-12 11040103 m, 56946 m/sec, 14489369 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 205 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 198/717 98/2000 BART-COL-010-CTLCardinality-2024-12 11327526 m, 57484 m/sec, 14861694 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 210 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 203/717 99/2000 BART-COL-010-CTLCardinality-2024-12 11610563 m, 56607 m/sec, 15231017 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 215 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 208/717 101/2000 BART-COL-010-CTLCardinality-2024-12 11888445 m, 55576 m/sec, 15602376 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 220 secs. Pages in use: 101
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 213/717 102/2000 BART-COL-010-CTLCardinality-2024-12 12172570 m, 56825 m/sec, 15973604 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 225 secs. Pages in use: 102
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 218/717 105/2000 BART-COL-010-CTLCardinality-2024-12 12459962 m, 57478 m/sec, 16349488 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 230 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 223/717 107/2000 BART-COL-010-CTLCardinality-2024-12 12746026 m, 57212 m/sec, 16723329 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 235 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 228/717 109/2000 BART-COL-010-CTLCardinality-2024-12 13026353 m, 56065 m/sec, 17091831 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 240 secs. Pages in use: 109
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 233/717 111/2000 BART-COL-010-CTLCardinality-2024-12 13310134 m, 56756 m/sec, 17466610 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 245 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 238/717 113/2000 BART-COL-010-CTLCardinality-2024-12 13593230 m, 56619 m/sec, 17842616 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 250 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 243/717 115/2000 BART-COL-010-CTLCardinality-2024-12 13872387 m, 55831 m/sec, 18220644 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 255 secs. Pages in use: 115
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 248/717 117/2000 BART-COL-010-CTLCardinality-2024-12 14153918 m, 56306 m/sec, 18596866 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 260 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 253/717 120/2000 BART-COL-010-CTLCardinality-2024-12 14434452 m, 56106 m/sec, 18967338 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 265 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 258/717 121/2000 BART-COL-010-CTLCardinality-2024-12 14712477 m, 55605 m/sec, 19339377 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 270 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 263/717 123/2000 BART-COL-010-CTLCardinality-2024-12 14993307 m, 56166 m/sec, 19710619 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 275 secs. Pages in use: 123
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 268/717 127/2000 BART-COL-010-CTLCardinality-2024-12 15280075 m, 57353 m/sec, 20088421 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 280 secs. Pages in use: 127
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 273/717 130/2000 BART-COL-010-CTLCardinality-2024-12 15567426 m, 57470 m/sec, 20467130 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 285 secs. Pages in use: 130
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 278/717 132/2000 BART-COL-010-CTLCardinality-2024-12 15855096 m, 57534 m/sec, 20843548 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 290 secs. Pages in use: 132
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 283/717 134/2000 BART-COL-010-CTLCardinality-2024-12 16140140 m, 57008 m/sec, 21220476 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 295 secs. Pages in use: 134
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 288/717 137/2000 BART-COL-010-CTLCardinality-2024-12 16428766 m, 57725 m/sec, 21596602 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 300 secs. Pages in use: 137
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 293/717 139/2000 BART-COL-010-CTLCardinality-2024-12 16714435 m, 57133 m/sec, 21971482 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 305 secs. Pages in use: 139
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 298/717 142/2000 BART-COL-010-CTLCardinality-2024-12 16999791 m, 57071 m/sec, 22350097 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 310 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 303/717 143/2000 BART-COL-010-CTLCardinality-2024-12 17286885 m, 57418 m/sec, 22722802 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 315 secs. Pages in use: 143
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 308/717 145/2000 BART-COL-010-CTLCardinality-2024-12 17571103 m, 56843 m/sec, 23094925 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 320 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 313/717 148/2000 BART-COL-010-CTLCardinality-2024-12 17858476 m, 57474 m/sec, 23468407 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 325 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 318/717 151/2000 BART-COL-010-CTLCardinality-2024-12 18146759 m, 57656 m/sec, 23843472 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 323/717 153/2000 BART-COL-010-CTLCardinality-2024-12 18428822 m, 56412 m/sec, 24217407 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 153
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 328/717 155/2000 BART-COL-010-CTLCardinality-2024-12 18713216 m, 56878 m/sec, 24589172 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 155
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 333/717 157/2000 BART-COL-010-CTLCardinality-2024-12 18999505 m, 57257 m/sec, 24961782 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 338/717 158/2000 BART-COL-010-CTLCardinality-2024-12 19281980 m, 56495 m/sec, 25331945 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 158
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 343/717 160/2000 BART-COL-010-CTLCardinality-2024-12 19569012 m, 57406 m/sec, 25702476 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 160
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 348/717 162/2000 BART-COL-010-CTLCardinality-2024-12 19853151 m, 56827 m/sec, 26077875 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 353/717 164/2000 BART-COL-010-CTLCardinality-2024-12 20135527 m, 56475 m/sec, 26448268 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 164
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 358/717 166/2000 BART-COL-010-CTLCardinality-2024-12 20415534 m, 56001 m/sec, 26822685 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 363/717 169/2000 BART-COL-010-CTLCardinality-2024-12 20697065 m, 56306 m/sec, 27193939 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 169
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 368/717 170/2000 BART-COL-010-CTLCardinality-2024-12 20977673 m, 56121 m/sec, 27563454 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 373/717 172/2000 BART-COL-010-CTLCardinality-2024-12 21258810 m, 56227 m/sec, 27930074 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 172
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 378/717 174/2000 BART-COL-010-CTLCardinality-2024-12 21541188 m, 56475 m/sec, 28303873 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 174
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 383/717 176/2000 BART-COL-010-CTLCardinality-2024-12 21820975 m, 55957 m/sec, 28674163 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 176
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 388/717 178/2000 BART-COL-010-CTLCardinality-2024-12 22102565 m, 56318 m/sec, 29043368 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 393/717 180/2000 BART-COL-010-CTLCardinality-2024-12 22383193 m, 56125 m/sec, 29412300 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 180
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 398/717 182/2000 BART-COL-010-CTLCardinality-2024-12 22665065 m, 56374 m/sec, 29785548 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 182
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 403/717 184/2000 BART-COL-010-CTLCardinality-2024-12 22945526 m, 56092 m/sec, 30158932 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 184
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 408/717 186/2000 BART-COL-010-CTLCardinality-2024-12 23223592 m, 55613 m/sec, 30528286 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 420 secs. Pages in use: 186
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 413/717 188/2000 BART-COL-010-CTLCardinality-2024-12 23500316 m, 55344 m/sec, 30904477 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 425 secs. Pages in use: 188
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 418/717 190/2000 BART-COL-010-CTLCardinality-2024-12 23780159 m, 55968 m/sec, 31276819 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 430 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 423/717 193/2000 BART-COL-010-CTLCardinality-2024-12 24065801 m, 57128 m/sec, 31651750 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 435 secs. Pages in use: 193
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 428/717 196/2000 BART-COL-010-CTLCardinality-2024-12 24349773 m, 56794 m/sec, 32021756 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 440 secs. Pages in use: 196
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 433/717 198/2000 BART-COL-010-CTLCardinality-2024-12 24633379 m, 56721 m/sec, 32396671 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 445 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 438/717 201/2000 BART-COL-010-CTLCardinality-2024-12 24918123 m, 56948 m/sec, 32770549 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 450 secs. Pages in use: 201
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 443/717 203/2000 BART-COL-010-CTLCardinality-2024-12 25203652 m, 57105 m/sec, 33142095 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 455 secs. Pages in use: 203
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 448/717 206/2000 BART-COL-010-CTLCardinality-2024-12 25486947 m, 56659 m/sec, 33516402 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 460 secs. Pages in use: 206
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 453/717 208/2000 BART-COL-010-CTLCardinality-2024-12 25772018 m, 57014 m/sec, 33889658 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 465 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 458/717 210/2000 BART-COL-010-CTLCardinality-2024-12 26057213 m, 57039 m/sec, 34261924 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 470 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 463/717 212/2000 BART-COL-010-CTLCardinality-2024-12 26343837 m, 57324 m/sec, 34636156 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 475 secs. Pages in use: 212
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 468/717 215/2000 BART-COL-010-CTLCardinality-2024-12 26631578 m, 57548 m/sec, 35010593 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 480 secs. Pages in use: 215
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 473/717 218/2000 BART-COL-010-CTLCardinality-2024-12 26914767 m, 56637 m/sec, 35384494 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 485 secs. Pages in use: 218
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 478/717 220/2000 BART-COL-010-CTLCardinality-2024-12 27198964 m, 56839 m/sec, 35757392 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 490 secs. Pages in use: 220
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 483/717 222/2000 BART-COL-010-CTLCardinality-2024-12 27485110 m, 57229 m/sec, 36128811 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 495 secs. Pages in use: 222
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 488/717 223/2000 BART-COL-010-CTLCardinality-2024-12 27769840 m, 56946 m/sec, 36500041 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 500 secs. Pages in use: 223
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 493/717 225/2000 BART-COL-010-CTLCardinality-2024-12 28050516 m, 56135 m/sec, 36868050 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 505 secs. Pages in use: 225
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-05: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-06: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-07: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-08: INITIAL true skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-09: CTL false preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-10: INITIAL false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[32mBART-COL-010-CTLCardinality-2024-14: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mBART-COL-010-CTLCardinality-2024-15: AGEF false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-11: DISJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] BART-COL-010-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 498/717 227/2000 BART-COL-010-CTLCardinality-2024-12 28296562 m, 49209 m/sec, 37189674 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 510 secs. Pages in use: 227
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 410 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-COL-010"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is BART-COL-010, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r027-smll-171620168700393"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BART-COL-010.tgz
mv BART-COL-010 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;