fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r021-smll-171620128000124
Last Updated
July 7, 2024

About the Execution of 2023-gold for AirplaneLD-COL-0100

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2778.023 20331.00 49190.00 458.10 FTTFFFTTTTTTTFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r021-smll-171620128000124.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is AirplaneLD-COL-0100, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r021-smll-171620128000124
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 512K
-rw-r--r-- 1 mcc users 8.2K Apr 12 03:32 CTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Apr 12 03:32 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.4K Apr 12 03:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 35K Apr 12 03:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 12 03:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 114K Apr 12 03:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.5K Apr 12 03:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 80K Apr 12 03:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 52K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-00
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-01
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-02
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-03
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-04
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-05
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-06
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-07
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-08
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-09
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-10
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-11
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-12
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-13
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-14
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1716496861869

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-COL-0100
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-23 20:41:05] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-05-23 20:41:05] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-23 20:41:05] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-05-23 20:41:05] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-05-23 20:41:06] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 886 ms
[2024-05-23 20:41:06] [INFO ] Detected 3 constant HL places corresponding to 302 PT places.
[2024-05-23 20:41:06] [INFO ] Imported 20 HL places and 15 HL transitions for a total of 719 PT places and 1212.0 transition bindings in 28 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 39 ms.
Working with output stream class java.io.PrintStream
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-05-23 20:41:06] [INFO ] Built PT skeleton of HLPN with 20 places and 15 transitions 56 arcs in 6 ms.
[2024-05-23 20:41:06] [INFO ] Skeletonized 15 HLPN properties in 3 ms.
Remains 15 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 17 stabilizing places and 15 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 17 transition count 15
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
[2024-05-23 20:41:06] [INFO ] Flatten gal took : 27 ms
[2024-05-23 20:41:06] [INFO ] Flatten gal took : 5 ms
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-00 FALSE TECHNIQUES CPN_APPROX
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-02 TRUE TECHNIQUES CPN_APPROX
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-14 FALSE TECHNIQUES CPN_APPROX
Symmetric sort wr.t. initial and guards and successors and join/free detected :Altitude
Symmetric sort wr.t. initial detected :Altitude
Transition t3_2 : guard parameter $A(Altitude:200) in guard (OR (GEQ $A 99) (EQ $A 199))introduces in Altitude(200) partition with 2 elements
Transition t3_1 : guard parameter $A(Altitude:200) in guard (AND (LT $A 99) (NEQ $A 199))introduces in Altitude(200) partition with 2 elements
Sort wr.t. initial and guards Altitude has partition 2
Applying symmetric unfolding of partitioned symmetric sort :Altitude domain size was 200 reducing to 2 values.
For transition t3_2:(OR (GEQ $A 99) (EQ $A 199)) -> (EQ $A 1)
For transition t3_1:(AND (LT $A 99) (NEQ $A 199)) -> (EQ $A 0)
Symmetric sort wr.t. initial and guards and successors and join/free detected :Speed
Symmetric sort wr.t. initial detected :Speed
Transition t5_2 : guard parameter $S(Speed:100) in guard (OR (LEQ $S 49) (EQ $S 99))introduces in Speed(100) partition with 2 elements
Transition t5_1 : guard parameter $S(Speed:100) in guard (AND (GT $S 49) (NEQ $S 99))introduces in Speed(100) partition with 2 elements
Transition t4_2 : guard parameter $S(Speed:100) in guard (OR (LEQ $S 49) (EQ $S 99))introduces in Speed(100) partition with 2 elements
Transition t4_1 : guard parameter $S(Speed:100) in guard (AND (GT $S 49) (NEQ $S 99))introduces in Speed(100) partition with 2 elements
Sort wr.t. initial and guards Speed has partition 2
Applying symmetric unfolding of partitioned symmetric sort :Speed domain size was 100 reducing to 2 values.
For transition t5_2:(OR (LEQ $S 49) (EQ $S 99)) -> (EQ $S 1)
For transition t5_1:(AND (GT $S 49) (NEQ $S 99)) -> (EQ $S 0)
For transition t4_2:(OR (LEQ $S 49) (EQ $S 99)) -> (EQ $S 1)
For transition t4_1:(AND (GT $S 49) (NEQ $S 99)) -> (EQ $S 0)
Symmetric sort wr.t. initial and guards and successors and join/free detected :Signal
Arc [19:1*[1]] contains constants of sort Signal
Transition t5_2 : constants on arcs in [[19:1*[1]]] introduces in Signal(2) partition with 1 elements that refines current partition to 2 subsets.
Symmetric sort wr.t. initial and guards and successors and join/free detected :Weight
Symmetric sort wr.t. initial detected :Weight
Transition t2_2 : guard parameter $W(Weight:2) in guard (EQ $W 1)introduces in Weight(2) partition with 2 elements
[2024-05-23 20:41:06] [INFO ] Unfolded HLPN to a Petri net with 29 places and 20 transitions 56 arcs in 27 ms.
[2024-05-23 20:41:06] [INFO ] Unfolded 15 HLPN properties in 1 ms.
Reduce places removed 6 places and 0 transitions.
Incomplete random walk after 10000 steps, including 1266 resets, run finished after 1026 ms. (steps per millisecond=9 ) properties (out of 12) seen :1
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-09 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 242 resets, run finished after 175 ms. (steps per millisecond=57 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 233 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 227 resets, run finished after 143 ms. (steps per millisecond=69 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 235 resets, run finished after 61 ms. (steps per millisecond=163 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 249 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 225 resets, run finished after 61 ms. (steps per millisecond=163 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 264 resets, run finished after 64 ms. (steps per millisecond=156 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 217 resets, run finished after 57 ms. (steps per millisecond=175 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 229 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 243 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 253 resets, run finished after 47 ms. (steps per millisecond=212 ) properties (out of 11) seen :0
Probably explored full state space saw : 485 states, properties seen :0
Probabilistic random walk after 2105 steps, saw 485 distinct states, run finished after 54 ms. (steps per millisecond=38 ) properties seen :0
Explored full state space saw : 485 states, properties seen :0
Exhaustive walk after 2105 steps, saw 485 distinct states, run finished after 15 ms. (steps per millisecond=140 ) properties seen :0
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-15 FALSE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-13 FALSE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-12 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-11 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-10 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-08 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-07 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-06 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-04 FALSE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-03 FALSE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-01 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 3305 ms.
starting LoLA
BK_INPUT AirplaneLD-COL-0100
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1716496882200

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH INITIAL
lola: LAUNCH task # 17 (type SKEL/CNST) for 15 AirplaneLD-COL-0100-ReachabilityCardinality-2024-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH task # 55 (type SKEL/FNDP) for 12 AirplaneLD-COL-0100-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SKEL/EQUN) for 12 AirplaneLD-COL-0100-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type SKEL/SRCH) for 12 AirplaneLD-COL-0100-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 17 (type SKEL/CNST) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-05
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 95 (type SKEL/SRCH) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-04
lola: result : false
lola: markings : 6
lola: fired transitions : 5
lola: time used : 1.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 55 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-04 (obsolete)
lola: CANCELED task # 72 (type EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-04 (obsolete)
lola: TR BINDINGS DONE
lola: Places: 719, Transitions: 808
lola: LAUNCH task # 103 (type SKEL/FNDP) for 42 AirplaneLD-COL-0100-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SKEL/EQUN) for 42 AirplaneLD-COL-0100-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type SKEL/SRCH) for 42 AirplaneLD-COL-0100-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 125 (type SKEL/SRCH) for 42 AirplaneLD-COL-0100-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 55 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-04
lola: result : unknown
lola: fired transitions : 1913
lola: tried executions : 958
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 124 (type SKEL/SRCH) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-14
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 103 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-14 (obsolete)
lola: CANCELED task # 122 (type EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-14 (obsolete)
lola: CANCELED task # 125 (type SRCH) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-14 (obsolete)
lola: LAUNCH task # 140 (type SKEL/FNDP) for 30 AirplaneLD-COL-0100-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 141 (type SKEL/EQUN) for 30 AirplaneLD-COL-0100-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 143 (type SKEL/SRCH) for 30 AirplaneLD-COL-0100-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 144 (type SKEL/SRCH) for 30 AirplaneLD-COL-0100-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 143 (type SKEL/SRCH) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-10
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 140 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 141 (type EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 144 (type SRCH) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-10 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 50 (type SKEL/FNDP) for 6 AirplaneLD-COL-0100-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 71 (type SKEL/EQUN) for 6 AirplaneLD-COL-0100-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 86 (type SKEL/FNDP) for 27 AirplaneLD-COL-0100-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: @ trans t2_1
lola: @ trans SampleRW
lola: @ trans getAlt
lola: LAUNCH task # 87 (type SKEL/EQUN) for 27 AirplaneLD-COL-0100-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 122 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-14
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-141.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-71.sara.
lola: FINISHED task # 86 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-09
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 87 (type EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-09 (obsolete)
lola: LAUNCH task # 148 (type SKEL/FNDP) for 24 AirplaneLD-COL-0100-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 156 (type SKEL/EQUN) for 24 AirplaneLD-COL-0100-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
lola: @ trans t3_2
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-87.sara.
lola: @ trans t4_1
sara: place or transition ordering is non-deterministic
lola: @ trans t1_2
lola: @ trans t1_1
lola: @ trans SpeedLW
lola: @ trans t5_2
lola: @ trans t5_1
lola: @ trans t2_2
lola: @ trans t3_1
lola: FINISHED task # 141 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-10
lola: result : unknown
lola: @ trans SampleLW

lola: @ trans SpeedRW
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-156.sara.
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: @ trans t4_2

lola: FINISHED task # 71 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-02
lola: result : false
lola: CANCELED task # 50 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-02 (obsolete)
lola: LAUNCH task # 78 (type SKEL/FNDP) for 36 AirplaneLD-COL-0100-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 79 (type SKEL/EQUN) for 36 AirplaneLD-COL-0100-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 156 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-08
lola: result : unknown
lola: LAUNCH task # 75 (type SKEL/FNDP) for 39 AirplaneLD-COL-0100-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 50 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-02
lola: result : unknown
lola: fired transitions : 20942
lola: tried executions : 20943
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 87 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-09
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-79.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 79 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-12
lola: result : false
lola: CANCELED task # 78 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-12 (obsolete)
lola: LAUNCH task # 53 (type SKEL/FNDP) for 3 AirplaneLD-COL-0100-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type SKEL/EQUN) for 3 AirplaneLD-COL-0100-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 78 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-12
lola: result : unknown
lola: fired transitions : 106483
lola: tried executions : 106484
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-72.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0100-ReachabilityCardinality-2024-02: AG true skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-2024-04: EF false skeleton: tandem / insertion
AirplaneLD-COL-0100-ReachabilityCardinality-2024-05: INITIAL false skeleton: preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-2024-10: AG true skeleton: tandem / insertion
AirplaneLD-COL-0100-ReachabilityCardinality-2024-12: AG true skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-2024-14: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0100-ReachabilityCardinality-2024-00: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-01: AG 0 3 2 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-03: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-06: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-08: AG 0 3 1 0 1 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-09: EF 0 0 0 0 2 0 0 3
AirplaneLD-COL-0100-ReachabilityCardinality-2024-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-13: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-15: EF 0 5 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 EF FNDP 5/327 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-2024-01 2502658 t fired, 1251330 attempts, .
75 EF FNDP 5/327 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-2024-13 2710391 t fired, 2710393 attempts, .
85 EF STEQ 5/327 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-2024-01 sara not yet started (preprocessing).
148 EF FNDP 5/327 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-2024-08 6509531 t fired, 6509532 attempts, .

Time elapsed: 6 secs. Pages in use: 1
# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150

lola: FINISHED task # 72 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-04
lola: result : false
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0100-ReachabilityCardinality-2024-02: AG true skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-2024-04: EF false skeleton: tandem / insertion
AirplaneLD-COL-0100-ReachabilityCardinality-2024-05: INITIAL false skeleton: preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-2024-10: AG true skeleton: tandem / insertion
AirplaneLD-COL-0100-ReachabilityCardinality-2024-12: AG true skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-2024-14: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0100-ReachabilityCardinality-2024-00: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-01: AG 0 3 2 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-03: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-06: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-08: AG 0 3 1 0 1 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-09: EF 0 0 0 0 2 0 0 3
AirplaneLD-COL-0100-ReachabilityCardinality-2024-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-13: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-2024-15: EF 0 5 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 EF FNDP 10/319 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-2024-01 5289655 t fired, 2644828 attempts, .
75 EF FNDP 10/319 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-2024-13 5642108 t fired, 5642109 attempts, .
85 EF STEQ 10/319 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-2024-01 sara not yet started (preprocessing).
148 EF FNDP 10/319 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-2024-08 13735890 t fired, 13735891 attempts, .

Time elapsed: 11 secs. Pages in use: 1
# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: LAUNCH INITIAL
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 1 (type CNST) for 0 AirplaneLD-COL-0100-ReachabilityCardinality-2024-00
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 10 (type CNST) for 9 AirplaneLD-COL-0100-ReachabilityCardinality-2024-03
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 1 (type CNST) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-00
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-85.sara.

lola: FINISHED task # 10 (type CNST) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-03
lola: result : false
lola: FINISHED task # 85 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-01
lola: result : false
lola: LAUNCH INITIAL
lola: LAUNCH task # 25 (type CNST) for 24 AirplaneLD-COL-0100-ReachabilityCardinality-2024-08
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: CANCELED task # 53 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-01 (obsolete)
lola: LAUNCH task # 81 (type SKEL/FNDP) for 45 AirplaneLD-COL-0100-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Rule S: 0 transitions removed,0 places removed
lola: FINISHED task # 53 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-01
lola: result : unknown
lola: fired transitions : 6381319
lola: tried executions : 3190661
lola: time used : 11.000000
lola: memory pages used : 0
lola: LAUNCH INITIAL
lola: LAUNCH task # 34 (type CNST) for 33 AirplaneLD-COL-0100-ReachabilityCardinality-2024-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 40 (type CNST) for 39 AirplaneLD-COL-0100-ReachabilityCardinality-2024-13
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 46 (type CNST) for 45 AirplaneLD-COL-0100-ReachabilityCardinality-2024-15
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 25 (type CNST) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-08
lola: result : true
lola: CANCELED task # 148 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-08 (obsolete)
lola: FINISHED task # 34 (type CNST) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-11
lola: result : true
lola: FINISHED task # 46 (type CNST) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-15
lola: result : false
lola: FINISHED task # 40 (type CNST) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-13
lola: result : false
lola: FINISHED task # 148 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-08
lola: result : unknown
lola: fired transitions : 16686925
lola: tried executions : 16686926
lola: time used : 11.000000
lola: memory pages used : 0
lola: CANCELED task # 75 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-13 (obsolete)
lola: CANCELED task # 81 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-15 (obsolete)
lola: LAUNCH task # 63 (type SKEL/FNDP) for 18 AirplaneLD-COL-0100-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/FNDP) for 21 AirplaneLD-COL-0100-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type SKEL/EQUN) for 21 AirplaneLD-COL-0100-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 73 (type SKEL/EQUN) for 18 AirplaneLD-COL-0100-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 75 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-13
lola: result : unknown
lola: fired transitions : 6774778
lola: tried executions : 6774779
lola: time used : 11.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-70.sara.

lola: planning for AirplaneLD-COL-0100-ReachabilityCardinality-2024-01 stopped (result already fixed).
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-73.sara.

lola: FINISHED task # 70 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-07
lola: result : false
lola: CANCELED task # 69 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-07 (obsolete)
lola: LAUNCH task # 119 (type SKEL/SRCH) for 18 AirplaneLD-COL-0100-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type SKEL/SRCH) for 18 AirplaneLD-COL-0100-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 69 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-07
lola: result : unknown
lola: fired transitions : 78019
lola: tried executions : 39011
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 120 (type SKEL/SRCH) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-06
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 119 (type SKEL/SRCH) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-06
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 63 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-06 (obsolete)
lola: CANCELED task # 73 (type EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-06 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 63 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-06
lola: result : unknown
lola: fired transitions : 144845
lola: tried executions : 72424
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: planning for AirplaneLD-COL-0100-ReachabilityCardinality-2024-06 stopped (result already fixed).
lola: LAUNCH task # 167 (type EXCL) for 27 AirplaneLD-COL-0100-ReachabilityCardinality-2024-09
lola: time limit : 3588 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 162 (type FNDP) for 27 AirplaneLD-COL-0100-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 163 (type EQUN) for 27 AirplaneLD-COL-0100-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 166 (type SRCH) for 27 AirplaneLD-COL-0100-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 73 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-06
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 166 (type SRCH) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-09
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 162 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-09 (obsolete)
lola: CANCELED task # 163 (type EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-09 (obsolete)
lola: CANCELED task # 167 (type EXCL) for AirplaneLD-COL-0100-ReachabilityCardinality-2024-09 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0100-ReachabilityCardinality-2024-00: EF false preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-2024-01: AG true skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-2024-02: AG true skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-2024-03: EF false preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-2024-04: EF false skeleton: tandem / insertion
AirplaneLD-COL-0100-ReachabilityCardinality-2024-05: INITIAL false skeleton: preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-2024-06: AG true skeleton: tandem / insertion
AirplaneLD-COL-0100-ReachabilityCardinality-2024-07: AG true skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-2024-08: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-2024-09: EF true tandem / insertion
AirplaneLD-COL-0100-ReachabilityCardinality-2024-10: AG true skeleton: tandem / insertion
AirplaneLD-COL-0100-ReachabilityCardinality-2024-11: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-2024-12: AG true skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-2024-13: EF false preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-2024-14: EF false skeleton: tandem / insertion
AirplaneLD-COL-0100-ReachabilityCardinality-2024-15: EF false preprocessing


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-0100"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is AirplaneLD-COL-0100, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r021-smll-171620128000124"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-0100.tgz
mv AirplaneLD-COL-0100 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;