Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r021-smll-171620127900109.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is AirplaneLD-COL-0010, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r021-smll-171620127900109
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 6.1K Apr 12 03:31 CTLCardinality.txt
-rw-r--r-- 1 mcc users 57K Apr 12 03:31 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.2K Apr 12 03:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 60K Apr 12 03:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 22 14:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 12 03:36 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 118K Apr 12 03:36 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Apr 12 03:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 66K Apr 12 03:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 22 14:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 40K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-00
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-01
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-02
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-03
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-04
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-05
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-06
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-07
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-08
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-09
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-10
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-11
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-12
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-13
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-14
FORMULA_NAME AirplaneLD-COL-0010-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1716496406208

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-COL-0010
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-23 20:33:29] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-05-23 20:33:29] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-23 20:33:29] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-05-23 20:33:30] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-05-23 20:33:30] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 759 ms
[2024-05-23 20:33:30] [INFO ] Detected 3 constant HL places corresponding to 32 PT places.
[2024-05-23 20:33:30] [INFO ] Imported 20 HL places and 15 HL transitions for a total of 89 PT places and 132.0 transition bindings in 28 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 49 ms.
Working with output stream class java.io.PrintStream
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-05-23 20:33:30] [INFO ] Built PT skeleton of HLPN with 20 places and 15 transitions 56 arcs in 7 ms.
[2024-05-23 20:33:30] [INFO ] Skeletonized 15 HLPN properties in 3 ms.
Remains 15 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 17 stabilizing places and 15 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 17 transition count 15
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
[2024-05-23 20:33:30] [INFO ] Flatten gal took : 22 ms
[2024-05-23 20:33:30] [INFO ] Flatten gal took : 5 ms
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-06 FALSE TECHNIQUES CPN_APPROX
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-10 TRUE TECHNIQUES CPN_APPROX
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-15 TRUE TECHNIQUES CPN_APPROX
Symmetric sort wr.t. initial and guards and successors and join/free detected :Altitude
Symmetric sort wr.t. initial detected :Altitude
Transition t3_2 : guard parameter $A(Altitude:20) in guard (OR (GEQ $A 9) (EQ $A 19))introduces in Altitude(20) partition with 2 elements
Transition t3_1 : guard parameter $A(Altitude:20) in guard (AND (LT $A 9) (NEQ $A 19))introduces in Altitude(20) partition with 2 elements
Sort wr.t. initial and guards Altitude has partition 2
Applying symmetric unfolding of partitioned symmetric sort :Altitude domain size was 20 reducing to 2 values.
For transition t3_2:(OR (GEQ $A 9) (EQ $A 19)) -> (EQ $A 1)
For transition t3_1:(AND (LT $A 9) (NEQ $A 19)) -> (EQ $A 0)
Symmetric sort wr.t. initial and guards and successors and join/free detected :Speed
Symmetric sort wr.t. initial detected :Speed
Transition t5_2 : guard parameter $S(Speed:10) in guard (OR (LEQ $S 4) (EQ $S 9))introduces in Speed(10) partition with 2 elements
Transition t5_1 : guard parameter $S(Speed:10) in guard (AND (GT $S 4) (NEQ $S 9))introduces in Speed(10) partition with 2 elements
Transition t4_2 : guard parameter $S(Speed:10) in guard (OR (LEQ $S 4) (EQ $S 9))introduces in Speed(10) partition with 2 elements
Transition t4_1 : guard parameter $S(Speed:10) in guard (AND (GT $S 4) (NEQ $S 9))introduces in Speed(10) partition with 2 elements
Sort wr.t. initial and guards Speed has partition 2
Applying symmetric unfolding of partitioned symmetric sort :Speed domain size was 10 reducing to 2 values.
For transition t5_2:(OR (LEQ $S 4) (EQ $S 9)) -> (EQ $S 1)
For transition t5_1:(AND (GT $S 4) (NEQ $S 9)) -> (EQ $S 0)
For transition t4_2:(OR (LEQ $S 4) (EQ $S 9)) -> (EQ $S 1)
For transition t4_1:(AND (GT $S 4) (NEQ $S 9)) -> (EQ $S 0)
Symmetric sort wr.t. initial and guards and successors and join/free detected :Signal
Arc [19:1*[1]] contains constants of sort Signal
Transition t5_2 : constants on arcs in [[19:1*[1]]] introduces in Signal(2) partition with 1 elements that refines current partition to 2 subsets.
Symmetric sort wr.t. initial and guards and successors and join/free detected :Weight
Symmetric sort wr.t. initial detected :Weight
Transition t2_2 : guard parameter $W(Weight:2) in guard (EQ $W 1)introduces in Weight(2) partition with 2 elements
[2024-05-23 20:33:30] [INFO ] Unfolded HLPN to a Petri net with 29 places and 20 transitions 56 arcs in 17 ms.
[2024-05-23 20:33:30] [INFO ] Unfolded 15 HLPN properties in 1 ms.
Reduce places removed 6 places and 0 transitions.
Incomplete random walk after 10000 steps, including 1263 resets, run finished after 1136 ms. (steps per millisecond=8 ) properties (out of 12) seen :2
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-12 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10000 steps, including 262 resets, run finished after 164 ms. (steps per millisecond=60 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 247 resets, run finished after 100 ms. (steps per millisecond=100 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 263 resets, run finished after 78 ms. (steps per millisecond=128 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 244 resets, run finished after 129 ms. (steps per millisecond=77 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 246 resets, run finished after 87 ms. (steps per millisecond=114 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 234 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 232 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 236 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 240 resets, run finished after 100 ms. (steps per millisecond=100 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 247 resets, run finished after 59 ms. (steps per millisecond=169 ) properties (out of 10) seen :0
Running SMT prover for 10 properties.
// Phase 1: matrix 20 rows 23 cols
[2024-05-23 20:33:32] [INFO ] Computed 3 invariants in 6 ms
[2024-05-23 20:33:33] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2024-05-23 20:33:33] [INFO ] [Real]Absence check using 2 positive and 1 generalized place invariants in 1 ms returned sat
[2024-05-23 20:33:33] [INFO ] After 242ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:9
[2024-05-23 20:33:33] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2024-05-23 20:33:33] [INFO ] [Nat]Absence check using 2 positive and 1 generalized place invariants in 1 ms returned sat
[2024-05-23 20:33:33] [INFO ] After 121ms SMT Verify possible using all constraints in natural domain returned unsat :10 sat :0
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-14 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-13 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-09 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-05 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-04 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-03 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-00 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 10 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 3727 ms.
starting LoLA
BK_INPUT AirplaneLD-COL-0010
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0010-ReachabilityCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1716496415052

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: TR BINDINGS
lola: LAUNCH INITIAL
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 5 (type SKEL/CNST) for 3 AirplaneLD-COL-0010-ReachabilityCardinality-2024-01
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 54 (type SKEL/FNDP) for 27 AirplaneLD-COL-0010-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type SKEL/EQUN) for 27 AirplaneLD-COL-0010-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SKEL/SRCH) for 27 AirplaneLD-COL-0010-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 5 (type SKEL/CNST) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-01
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: TR BINDINGS DONE
lola: Places: 89, Transitions: 88
lola: LAUNCH task # 58 (type SKEL/SRCH) for 27 AirplaneLD-COL-0010-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 57 (type SKEL/SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-09
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 58 (type SKEL/SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-09
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 54 (type FNDP) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-09 (obsolete)
lola: CANCELED task # 55 (type EQUN) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-09 (obsolete)
lola: LAUNCH task # 84 (type SKEL/FNDP) for 12 AirplaneLD-COL-0010-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type SKEL/EQUN) for 12 AirplaneLD-COL-0010-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 87 (type SKEL/SRCH) for 12 AirplaneLD-COL-0010-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 88 (type SKEL/SRCH) for 12 AirplaneLD-COL-0010-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 54 (type SKEL/FNDP) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-09
lola: result : unknown
lola: fired transitions : 14029
lola: tried executions : 7016
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 87 (type SKEL/SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-04
lola: result : false
lola: markings : 93
lola: fired transitions : 210
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 88 (type SKEL/SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-04
lola: result : false
lola: markings : 26
lola: fired transitions : 26
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 84 (type FNDP) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-04 (obsolete)
lola: CANCELED task # 85 (type EQUN) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-04 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 122 (type SKEL/FNDP) for 18 AirplaneLD-COL-0010-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 136 (type SKEL/EQUN) for 18 AirplaneLD-COL-0010-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 138 (type SKEL/SRCH) for 18 AirplaneLD-COL-0010-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 139 (type SKEL/SRCH) for 18 AirplaneLD-COL-0010-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 84 (type SKEL/FNDP) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-04
lola: result : unknown
lola: fired transitions : 7496
lola: tried executions : 1007
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 139 (type SKEL/SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-06
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 138 (type SKEL/SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-06
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 122 (type FNDP) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-06 (obsolete)
lola: CANCELED task # 136 (type EQUN) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-06 (obsolete)
lola: LAUNCH task # 121 (type SKEL/FNDP) for 30 AirplaneLD-COL-0010-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-55.sara.
lola: LAUNCH task # 134 (type SKEL/EQUN) for 30 AirplaneLD-COL-0010-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 142 (type SKEL/SRCH) for 30 AirplaneLD-COL-0010-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 143 (type SKEL/SRCH) for 30 AirplaneLD-COL-0010-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: @ trans t2_1

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: @ trans SampleRW
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-136.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-85.sara.
lola: @ trans getAlt
lola: @ trans t3_2
lola: FINISHED task # 143 (type SKEL/SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-10
lola: result : false
lola: markings : 14
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: @ trans t4_1
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 142 (type SKEL/SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-10
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 121 (type FNDP) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 134 (type EQUN) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-10 (obsolete)
lola: LAUNCH task # 80 (type SKEL/FNDP) for 45 AirplaneLD-COL-0010-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: @ trans t1_2
lola: LAUNCH task # 112 (type SKEL/EQUN) for 45 AirplaneLD-COL-0010-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 144 (type SKEL/SRCH) for 45 AirplaneLD-COL-0010-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 145 (type SKEL/SRCH) for 45 AirplaneLD-COL-0010-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: @ trans t1_1
lola: @ trans SpeedLW
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: FINISHED task # 121 (type SKEL/FNDP) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-10
lola: result : unknown
lola: fired transitions : 6448
lola: tried executions : 6449
lola: time used : 0.000000
lola: memory pages used : 0
lola: @ trans t5_2
lola: FINISHED task # 145 (type SKEL/SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-15
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 80 (type FNDP) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-15 (obsolete)
lola: CANCELED task # 112 (type EQUN) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-15 (obsolete)
lola: CANCELED task # 144 (type SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-15 (obsolete)
lola: LAUNCH task # 111 (type SKEL/FNDP) for 15 AirplaneLD-COL-0010-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 123 (type SKEL/EQUN) for 15 AirplaneLD-COL-0010-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 150 (type SKEL/SRCH) for 15 AirplaneLD-COL-0010-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 151 (type SKEL/SRCH) for 15 AirplaneLD-COL-0010-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: @ trans t5_1
lola: @ trans t2_2
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 55 (type SKEL/EQUN) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-09
lola: result : false
lola: @ trans t3_1
lola: @ trans SampleLW
lola: FINISHED task # 150 (type SKEL/SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-05
lola: result : false
lola: markings : 26
lola: fired transitions : 37
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 111 (type FNDP) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 123 (type EQUN) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 151 (type SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-05 (obsolete)
lola: LAUNCH task # 99 (type SKEL/FNDP) for 6 AirplaneLD-COL-0010-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: @ trans SpeedRW
lola: @ trans t4_2
lola: LAUNCH task # 100 (type SKEL/EQUN) for 6 AirplaneLD-COL-0010-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 116 (type SKEL/SRCH) for 6 AirplaneLD-COL-0010-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 117 (type SKEL/SRCH) for 6 AirplaneLD-COL-0010-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: FINISHED task # 117 (type SKEL/SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-02
lola: result : false
lola: markings : 31
lola: fired transitions : 35
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 99 (type FNDP) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 100 (type EQUN) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 116 (type SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-02 (obsolete)
lola: LAUNCH task # 120 (type SKEL/FNDP) for 9 AirplaneLD-COL-0010-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 129 (type SKEL/EQUN) for 9 AirplaneLD-COL-0010-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 131 (type SKEL/SRCH) for 9 AirplaneLD-COL-0010-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 132 (type SKEL/SRCH) for 9 AirplaneLD-COL-0010-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 131 (type SKEL/SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-03
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 120 (type FNDP) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-03 (obsolete)
lola: CANCELED task # 129 (type EQUN) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-03 (obsolete)
lola: CANCELED task # 132 (type SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-03 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 69 (type SKEL/FNDP) for 0 AirplaneLD-COL-0010-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 70 (type SKEL/EQUN) for 0 AirplaneLD-COL-0010-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SKEL/SRCH) for 0 AirplaneLD-COL-0010-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SKEL/SRCH) for 0 AirplaneLD-COL-0010-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 72 (type SKEL/SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-00
lola: result : false
lola: markings : 93
lola: fired transitions : 239
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 69 (type FNDP) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 70 (type EQUN) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 73 (type SRCH) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-00 (obsolete)
lola: LAUNCH task # 140 (type SKEL/FNDP) for 39 AirplaneLD-COL-0010-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 155 (type SKEL/EQUN) for 39 AirplaneLD-COL-0010-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 159 (type SKEL/SRCH) for 39 AirplaneLD-COL-0010-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 160 (type SKEL/SRCH) for 39 AirplaneLD-COL-0010-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 99 (type SKEL/FNDP) for AirplaneLD-COL-0010-ReachabilityCardinality-2024-02
lola: result : unknown
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
malloc(): unsorted double linked list corrupted
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-134.sara.
/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 454 Aborted lola --conf=$BIN_DIR/configfiles/reachabilitycardinalityconf --formula=$DIR/ReachabilityCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-0010"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is AirplaneLD-COL-0010, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r021-smll-171620127900109"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-0010.tgz
mv AirplaneLD-COL-0010 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;