About the Execution of LoLA for Anderson-PT-12
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16207.928 | 3210624.00 | 11549695.00 | 5936.20 | [undef] | Cannot compute |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r005-smll-171620119300380.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is Anderson-PT-12, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r005-smll-171620119300380
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.6M
-rw-r--r-- 1 mcc users 7.8K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 81K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 42K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 19 07:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 19 17:50 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K May 14 13:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 180K May 14 13:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 17K May 14 13:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 109K May 14 13:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 2.1M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Anderson-PT-12-LTLFireability-00
FORMULA_NAME Anderson-PT-12-LTLFireability-01
FORMULA_NAME Anderson-PT-12-LTLFireability-02
FORMULA_NAME Anderson-PT-12-LTLFireability-03
FORMULA_NAME Anderson-PT-12-LTLFireability-04
FORMULA_NAME Anderson-PT-12-LTLFireability-05
FORMULA_NAME Anderson-PT-12-LTLFireability-06
FORMULA_NAME Anderson-PT-12-LTLFireability-07
FORMULA_NAME Anderson-PT-12-LTLFireability-08
FORMULA_NAME Anderson-PT-12-LTLFireability-09
FORMULA_NAME Anderson-PT-12-LTLFireability-10
FORMULA_NAME Anderson-PT-12-LTLFireability-11
FORMULA_NAME Anderson-PT-12-LTLFireability-12
FORMULA_NAME Anderson-PT-12-LTLFireability-13
FORMULA_NAME Anderson-PT-12-LTLFireability-14
FORMULA_NAME Anderson-PT-12-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717245243512
BK_STOP 1717248454136
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 72 (type SKEL/SRCH) for 0 Anderson-PT-12-LTLFireability-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 6 (type CNST) for 3 Anderson-PT-12-LTLFireability-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 19 (type CNST) for 16 Anderson-PT-12-LTLFireability-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 6 (type CNST) for Anderson-PT-12-LTLFireability-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 19 (type CNST) for Anderson-PT-12-LTLFireability-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 73 (type SKEL/SRCH) for 13 Anderson-PT-12-LTLFireability-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 30 (type CNST) for 27 Anderson-PT-12-LTLFireability-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 30 (type CNST) for Anderson-PT-12-LTLFireability-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 62 (type CNST) for 59 Anderson-PT-12-LTLFireability-13
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 62 (type CNST) for Anderson-PT-12-LTLFireability-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 73 (type SKEL/SRCH) for Anderson-PT-12-LTLFireability-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 22781
[[35mlola[0m][I] fired transitions : 35878
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 75 (type SKEL/SRCH) for 69 Anderson-PT-12-LTLFireability-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 75 (type SKEL/SRCH) for Anderson-PT-12-LTLFireability-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 76 (type SKEL/SRCH) for 66 Anderson-PT-12-LTLFireability-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[*** LOG ERROR #0001 ***] [2024-06-01 12:34:07] [status_logger] string pointer is null
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 72 LTL SRCH 5/3598 1/5 Anderson-PT-12-LTLFireability-00 42331 m, 8466 m/sec, 71964 t fired, .
[[35mlola[0m][.] 76 LTL SRCH 3/3596 1/5 Anderson-PT-12-LTLFireability-14 37680 m, 7536 m/sec, 56461 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 7 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 67 (type EXCL) for 66 Anderson-PT-12-LTLFireability-14
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 2 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 4/256 1/2000 Anderson-PT-12-LTLFireability-14 3439 m, 687 m/sec, 4037 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 10/3598 1/5 Anderson-PT-12-LTLFireability-00 151156 m, 21765 m/sec, 282111 t fired, .
[[35mlola[0m][.] 76 LTL SRCH 8/3596 1/5 Anderson-PT-12-LTLFireability-14 137364 m, 19936 m/sec, 227618 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 12 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 2 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 9/256 1/2000 Anderson-PT-12-LTLFireability-14 8171 m, 946 m/sec, 9427 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 15/3598 1/5 Anderson-PT-12-LTLFireability-00 280257 m, 25820 m/sec, 551680 t fired, .
[[35mlola[0m][.] 76 LTL SRCH 13/3596 1/5 Anderson-PT-12-LTLFireability-14 262594 m, 25046 m/sec, 458164 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 17 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 76 (type SKEL/SRCH) for Anderson-PT-12-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 341139
[[35mlola[0m][I] fired transitions : 609537
[[35mlola[0m][I] time used : 16
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 14/256 1/2000 Anderson-PT-12-LTLFireability-14 12919 m, 949 m/sec, 14723 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 20/3598 1/5 Anderson-PT-12-LTLFireability-00 407230 m, 25394 m/sec, 825298 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 22 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 19/256 1/2000 Anderson-PT-12-LTLFireability-14 17610 m, 938 m/sec, 19980 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 25/3598 1/5 Anderson-PT-12-LTLFireability-00 533512 m, 25256 m/sec, 1102041 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 27 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 24/256 1/2000 Anderson-PT-12-LTLFireability-14 22409 m, 959 m/sec, 25494 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 30/3598 1/5 Anderson-PT-12-LTLFireability-00 664798 m, 26257 m/sec, 1395959 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 32 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 29/256 1/2000 Anderson-PT-12-LTLFireability-14 27248 m, 967 m/sec, 31008 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 35/3598 1/5 Anderson-PT-12-LTLFireability-00 799618 m, 26964 m/sec, 1701160 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 37 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 34/256 1/2000 Anderson-PT-12-LTLFireability-14 32205 m, 991 m/sec, 36621 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 40/3598 1/5 Anderson-PT-12-LTLFireability-00 930814 m, 26239 m/sec, 1997521 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 42 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 39/256 1/2000 Anderson-PT-12-LTLFireability-14 37104 m, 979 m/sec, 42248 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 45/3598 1/5 Anderson-PT-12-LTLFireability-00 1059929 m, 25823 m/sec, 2295370 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 47 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 44/256 1/2000 Anderson-PT-12-LTLFireability-14 42013 m, 981 m/sec, 47896 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 50/3598 1/5 Anderson-PT-12-LTLFireability-00 1187297 m, 25473 m/sec, 2596189 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 52 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 49/256 1/2000 Anderson-PT-12-LTLFireability-14 46927 m, 982 m/sec, 53553 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 55/3598 1/5 Anderson-PT-12-LTLFireability-00 1314748 m, 25490 m/sec, 2897920 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 57 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 54/256 1/2000 Anderson-PT-12-LTLFireability-14 51870 m, 988 m/sec, 59098 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 60/3598 1/5 Anderson-PT-12-LTLFireability-00 1440718 m, 25194 m/sec, 3197499 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 62 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 59/256 1/2000 Anderson-PT-12-LTLFireability-14 56822 m, 990 m/sec, 64637 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 65/3598 1/5 Anderson-PT-12-LTLFireability-00 1567555 m, 25367 m/sec, 3503188 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 67 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 64/256 1/2000 Anderson-PT-12-LTLFireability-14 61736 m, 982 m/sec, 70095 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 70/3598 1/5 Anderson-PT-12-LTLFireability-00 1693622 m, 25213 m/sec, 3806106 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 72 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 69/256 1/2000 Anderson-PT-12-LTLFireability-14 66617 m, 976 m/sec, 75505 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 75/3598 1/5 Anderson-PT-12-LTLFireability-00 1820615 m, 25398 m/sec, 4111718 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 77 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 74/256 1/2000 Anderson-PT-12-LTLFireability-14 71495 m, 975 m/sec, 81045 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 80/3598 1/5 Anderson-PT-12-LTLFireability-00 1947791 m, 25435 m/sec, 4416035 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 82 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 79/256 1/2000 Anderson-PT-12-LTLFireability-14 76351 m, 971 m/sec, 86562 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 85/3598 1/5 Anderson-PT-12-LTLFireability-00 2075777 m, 25597 m/sec, 4724614 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 87 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 84/256 1/2000 Anderson-PT-12-LTLFireability-14 81254 m, 980 m/sec, 92208 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 90/3598 1/5 Anderson-PT-12-LTLFireability-00 2202424 m, 25329 m/sec, 5034844 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 92 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 89/256 1/2000 Anderson-PT-12-LTLFireability-14 86200 m, 989 m/sec, 97726 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 95/3598 1/5 Anderson-PT-12-LTLFireability-00 2328942 m, 25303 m/sec, 5344779 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 97 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 94/256 1/2000 Anderson-PT-12-LTLFireability-14 91141 m, 988 m/sec, 103229 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 100/3598 1/5 Anderson-PT-12-LTLFireability-00 2455936 m, 25398 m/sec, 5655489 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 102 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 99/256 1/2000 Anderson-PT-12-LTLFireability-14 96068 m, 985 m/sec, 108701 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 105/3598 1/5 Anderson-PT-12-LTLFireability-00 2581962 m, 25205 m/sec, 5966121 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 107 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 104/256 1/2000 Anderson-PT-12-LTLFireability-14 100926 m, 971 m/sec, 114242 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 110/3598 1/5 Anderson-PT-12-LTLFireability-00 2706697 m, 24947 m/sec, 6274438 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 112 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 109/256 2/2000 Anderson-PT-12-LTLFireability-14 105780 m, 970 m/sec, 119858 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 115/3598 1/5 Anderson-PT-12-LTLFireability-00 2832235 m, 25107 m/sec, 6582923 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 117 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 114/256 2/2000 Anderson-PT-12-LTLFireability-14 110663 m, 976 m/sec, 125419 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 120/3598 1/5 Anderson-PT-12-LTLFireability-00 2957030 m, 24959 m/sec, 6895609 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 122 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 119/256 2/2000 Anderson-PT-12-LTLFireability-14 115428 m, 953 m/sec, 130959 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 125/3598 1/5 Anderson-PT-12-LTLFireability-00 3081503 m, 24894 m/sec, 7207133 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 127 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 124/256 2/2000 Anderson-PT-12-LTLFireability-14 120320 m, 978 m/sec, 136537 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 130/3598 1/5 Anderson-PT-12-LTLFireability-00 3205512 m, 24801 m/sec, 7518086 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 132 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 129/256 2/2000 Anderson-PT-12-LTLFireability-14 125220 m, 980 m/sec, 142113 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 135/3598 1/5 Anderson-PT-12-LTLFireability-00 3330049 m, 24907 m/sec, 7827999 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 137 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 134/256 2/2000 Anderson-PT-12-LTLFireability-14 130169 m, 989 m/sec, 147708 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 140/3598 1/5 Anderson-PT-12-LTLFireability-00 3454724 m, 24935 m/sec, 8140902 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 142 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 139/256 2/2000 Anderson-PT-12-LTLFireability-14 135079 m, 982 m/sec, 153183 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 145/3598 1/5 Anderson-PT-12-LTLFireability-00 3578966 m, 24848 m/sec, 8453546 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 147 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 144/256 2/2000 Anderson-PT-12-LTLFireability-14 139948 m, 973 m/sec, 158727 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 150/3598 1/5 Anderson-PT-12-LTLFireability-00 3703351 m, 24877 m/sec, 8766762 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 152 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 149/256 2/2000 Anderson-PT-12-LTLFireability-14 144780 m, 966 m/sec, 164209 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 155/3598 1/5 Anderson-PT-12-LTLFireability-00 3826842 m, 24698 m/sec, 9079819 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 157 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 154/256 2/2000 Anderson-PT-12-LTLFireability-14 149861 m, 1016 m/sec, 169934 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 160/3598 1/5 Anderson-PT-12-LTLFireability-00 3950020 m, 24635 m/sec, 9396117 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 162 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 159/256 2/2000 Anderson-PT-12-LTLFireability-14 155028 m, 1033 m/sec, 175761 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 165/3598 1/5 Anderson-PT-12-LTLFireability-00 4073192 m, 24634 m/sec, 9710066 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 167 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 164/256 2/2000 Anderson-PT-12-LTLFireability-14 159967 m, 987 m/sec, 181383 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 170/3598 1/5 Anderson-PT-12-LTLFireability-00 4194696 m, 24300 m/sec, 10022200 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 172 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 169/256 2/2000 Anderson-PT-12-LTLFireability-14 164894 m, 985 m/sec, 186822 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 175/3598 1/5 Anderson-PT-12-LTLFireability-00 4318133 m, 24687 m/sec, 10334975 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 177 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 174/256 2/2000 Anderson-PT-12-LTLFireability-14 169751 m, 971 m/sec, 192399 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 180/3598 1/5 Anderson-PT-12-LTLFireability-00 4441541 m, 24681 m/sec, 10647923 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 182 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 179/256 2/2000 Anderson-PT-12-LTLFireability-14 174622 m, 974 m/sec, 197928 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 185/3598 1/5 Anderson-PT-12-LTLFireability-00 4563722 m, 24436 m/sec, 10965998 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 187 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 184/256 2/2000 Anderson-PT-12-LTLFireability-14 179506 m, 976 m/sec, 203481 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 190/3598 1/5 Anderson-PT-12-LTLFireability-00 4685811 m, 24417 m/sec, 11278693 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 192 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 189/256 2/2000 Anderson-PT-12-LTLFireability-14 184428 m, 984 m/sec, 209052 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 195/3598 1/5 Anderson-PT-12-LTLFireability-00 4807713 m, 24380 m/sec, 11593526 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 197 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 194/256 2/2000 Anderson-PT-12-LTLFireability-14 189333 m, 981 m/sec, 214613 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 200/3598 1/5 Anderson-PT-12-LTLFireability-00 4929141 m, 24285 m/sec, 11910063 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 202 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 199/256 2/2000 Anderson-PT-12-LTLFireability-14 194245 m, 982 m/sec, 220218 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 205/3598 1/5 Anderson-PT-12-LTLFireability-00 5048293 m, 23830 m/sec, 12226390 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 207 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 204/256 2/2000 Anderson-PT-12-LTLFireability-14 199166 m, 984 m/sec, 225839 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 210/3598 1/5 Anderson-PT-12-LTLFireability-00 5169408 m, 24223 m/sec, 12542427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 212 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 209/256 2/2000 Anderson-PT-12-LTLFireability-14 204320 m, 1030 m/sec, 231683 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 215/3598 1/5 Anderson-PT-12-LTLFireability-00 5292038 m, 24526 m/sec, 12862593 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 217 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 214/256 3/2000 Anderson-PT-12-LTLFireability-14 209275 m, 991 m/sec, 237299 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 220/3598 1/5 Anderson-PT-12-LTLFireability-00 5413341 m, 24260 m/sec, 13179261 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 222 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 219/256 3/2000 Anderson-PT-12-LTLFireability-14 214135 m, 972 m/sec, 242847 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 225/3598 1/5 Anderson-PT-12-LTLFireability-00 5536181 m, 24568 m/sec, 13496922 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 227 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 224/256 3/2000 Anderson-PT-12-LTLFireability-14 218996 m, 972 m/sec, 248369 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 230/3598 1/5 Anderson-PT-12-LTLFireability-00 5658125 m, 24388 m/sec, 13815605 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 232 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 229/256 3/2000 Anderson-PT-12-LTLFireability-14 223890 m, 978 m/sec, 253927 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 235/3598 1/5 Anderson-PT-12-LTLFireability-00 5780286 m, 24432 m/sec, 14134202 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 237 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 234/256 3/2000 Anderson-PT-12-LTLFireability-14 228829 m, 987 m/sec, 259527 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 240/3598 1/5 Anderson-PT-12-LTLFireability-00 5900902 m, 24123 m/sec, 14452600 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 242 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 239/256 3/2000 Anderson-PT-12-LTLFireability-14 233694 m, 973 m/sec, 265063 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 245/3598 1/5 Anderson-PT-12-LTLFireability-00 6023008 m, 24421 m/sec, 14773064 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 247 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 244/256 3/2000 Anderson-PT-12-LTLFireability-14 238668 m, 994 m/sec, 270710 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 250/3598 1/5 Anderson-PT-12-LTLFireability-00 6145645 m, 24527 m/sec, 15094538 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 252 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 249/256 3/2000 Anderson-PT-12-LTLFireability-14 243633 m, 993 m/sec, 276438 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 255/3598 1/5 Anderson-PT-12-LTLFireability-00 6268621 m, 24595 m/sec, 15416099 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 257 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 254/256 3/2000 Anderson-PT-12-LTLFireability-14 248576 m, 988 m/sec, 282032 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 260/3598 1/5 Anderson-PT-12-LTLFireability-00 6390432 m, 24362 m/sec, 15737617 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 262 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 67 (type EXCL) for Anderson-PT-12-LTLFireability-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 72 LTL SRCH 265/3598 1/5 Anderson-PT-12-LTLFireability-00 6511227 m, 24159 m/sec, 16057051 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 267 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 70 (type EXCL) for 69 Anderson-PT-12-LTLFireability-15
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 67 (type EXCL) for 66 Anderson-PT-12-LTLFireability-14
[[35mlola[0m][I] time limit : 3333 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 70 (type EXCL) for Anderson-PT-12-LTLFireability-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 13
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 5/256 1/5 Anderson-PT-12-LTLFireability-14 4712 m, -48772 m/sec, 5435 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 270/3598 1/5 Anderson-PT-12-LTLFireability-00 6628714 m, 23497 m/sec, 16363211 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 272 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 10/256 1/5 Anderson-PT-12-LTLFireability-14 9450 m, 947 m/sec, 10821 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 275/3598 1/5 Anderson-PT-12-LTLFireability-00 6744975 m, 23252 m/sec, 16670707 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 277 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 15/256 1/5 Anderson-PT-12-LTLFireability-14 14200 m, 950 m/sec, 16196 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 280/3598 1/5 Anderson-PT-12-LTLFireability-00 6860896 m, 23184 m/sec, 16978013 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 282 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 20/256 1/5 Anderson-PT-12-LTLFireability-14 18911 m, 942 m/sec, 21516 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 285/3598 1/5 Anderson-PT-12-LTLFireability-00 6977349 m, 23290 m/sec, 17288911 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 287 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 25/256 1/5 Anderson-PT-12-LTLFireability-14 23635 m, 944 m/sec, 26848 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 290/3598 2/5 Anderson-PT-12-LTLFireability-00 7092816 m, 23093 m/sec, 17596283 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 292 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 30/256 1/5 Anderson-PT-12-LTLFireability-14 28276 m, 928 m/sec, 32137 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 295/3598 3/5 Anderson-PT-12-LTLFireability-00 7208187 m, 23074 m/sec, 17906681 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 297 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 35/256 1/5 Anderson-PT-12-LTLFireability-14 32965 m, 937 m/sec, 37533 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 300/3598 3/5 Anderson-PT-12-LTLFireability-00 7326281 m, 23618 m/sec, 18217257 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 302 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 40/256 1/5 Anderson-PT-12-LTLFireability-14 37654 m, 937 m/sec, 42849 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 305/3598 4/5 Anderson-PT-12-LTLFireability-00 7444663 m, 23676 m/sec, 18530075 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 307 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 1 0 0 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 45/256 1/5 Anderson-PT-12-LTLFireability-14 42367 m, 942 m/sec, 48292 t fired, .
[[35mlola[0m][.] 72 LTL SRCH 310/3598 5/5 Anderson-PT-12-LTLFireability-00 7562822 m, 23631 m/sec, 18840209 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 312 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 72 (type SRCH) for Anderson-PT-12-LTLFireability-00 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 50/256 1/5 Anderson-PT-12-LTLFireability-14 47171 m, 960 m/sec, 53821 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 317 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 55/256 1/5 Anderson-PT-12-LTLFireability-14 52092 m, 984 m/sec, 59336 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 322 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 60/256 1/5 Anderson-PT-12-LTLFireability-14 57038 m, 989 m/sec, 64900 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 327 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 65/256 1/5 Anderson-PT-12-LTLFireability-14 61997 m, 991 m/sec, 70384 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 332 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 70/256 1/5 Anderson-PT-12-LTLFireability-14 66903 m, 981 m/sec, 75815 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 337 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 75/256 1/5 Anderson-PT-12-LTLFireability-14 71795 m, 978 m/sec, 81358 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 342 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 80/256 1/5 Anderson-PT-12-LTLFireability-14 76676 m, 976 m/sec, 86962 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 347 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 85/256 1/5 Anderson-PT-12-LTLFireability-14 81619 m, 988 m/sec, 92600 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 352 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 90/256 1/5 Anderson-PT-12-LTLFireability-14 86601 m, 996 m/sec, 98165 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 357 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 95/256 1/5 Anderson-PT-12-LTLFireability-14 91561 m, 992 m/sec, 103682 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 362 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 100/256 1/5 Anderson-PT-12-LTLFireability-14 96508 m, 989 m/sec, 109253 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 367 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 105/256 1/5 Anderson-PT-12-LTLFireability-14 101407 m, 979 m/sec, 114846 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 372 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 110/256 2/5 Anderson-PT-12-LTLFireability-14 106325 m, 983 m/sec, 120431 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 377 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 115/256 2/5 Anderson-PT-12-LTLFireability-14 111240 m, 983 m/sec, 126062 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 382 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 120/256 2/5 Anderson-PT-12-LTLFireability-14 116067 m, 965 m/sec, 131661 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 387 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 125/256 2/5 Anderson-PT-12-LTLFireability-14 120981 m, 982 m/sec, 137277 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 392 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 130/256 2/5 Anderson-PT-12-LTLFireability-14 125911 m, 986 m/sec, 142976 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 397 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 135/256 2/5 Anderson-PT-12-LTLFireability-14 130894 m, 996 m/sec, 148491 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 402 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 140/256 2/5 Anderson-PT-12-LTLFireability-14 135828 m, 986 m/sec, 153994 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 407 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 145/256 2/5 Anderson-PT-12-LTLFireability-14 140715 m, 977 m/sec, 159561 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 412 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 150/256 2/5 Anderson-PT-12-LTLFireability-14 145581 m, 973 m/sec, 165069 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 417 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 155/256 2/5 Anderson-PT-12-LTLFireability-14 150757 m, 1035 m/sec, 170896 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 422 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 160/256 2/5 Anderson-PT-12-LTLFireability-14 155874 m, 1023 m/sec, 176668 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 427 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 165/256 2/5 Anderson-PT-12-LTLFireability-14 160854 m, 996 m/sec, 182343 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 432 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 170/256 2/5 Anderson-PT-12-LTLFireability-14 165813 m, 991 m/sec, 187925 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 437 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 175/256 2/5 Anderson-PT-12-LTLFireability-14 170735 m, 984 m/sec, 193496 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 442 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 180/256 2/5 Anderson-PT-12-LTLFireability-14 175621 m, 977 m/sec, 199081 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 447 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 185/256 2/5 Anderson-PT-12-LTLFireability-14 180554 m, 986 m/sec, 204657 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 452 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 190/256 2/5 Anderson-PT-12-LTLFireability-14 185432 m, 975 m/sec, 210270 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 457 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 195/256 2/5 Anderson-PT-12-LTLFireability-14 190424 m, 998 m/sec, 215818 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 462 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 200/256 2/5 Anderson-PT-12-LTLFireability-14 195318 m, 978 m/sec, 221449 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 467 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 205/256 2/5 Anderson-PT-12-LTLFireability-14 200244 m, 985 m/sec, 227132 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 472 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 210/256 2/5 Anderson-PT-12-LTLFireability-14 205444 m, 1040 m/sec, 232930 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 477 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 215/256 3/5 Anderson-PT-12-LTLFireability-14 210375 m, 986 m/sec, 238625 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 482 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 220/256 3/5 Anderson-PT-12-LTLFireability-14 215252 m, 975 m/sec, 244141 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 487 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 225/256 3/5 Anderson-PT-12-LTLFireability-14 220131 m, 975 m/sec, 249698 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 492 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 230/256 3/5 Anderson-PT-12-LTLFireability-14 225099 m, 993 m/sec, 255247 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 497 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 235/256 3/5 Anderson-PT-12-LTLFireability-14 230023 m, 984 m/sec, 260846 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 502 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 240/256 3/5 Anderson-PT-12-LTLFireability-14 234916 m, 978 m/sec, 266392 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 507 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 245/256 3/5 Anderson-PT-12-LTLFireability-14 239877 m, 992 m/sec, 272111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 512 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 250/256 3/5 Anderson-PT-12-LTLFireability-14 244888 m, 1002 m/sec, 277801 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 517 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 255/256 3/5 Anderson-PT-12-LTLFireability-14 249808 m, 984 m/sec, 283442 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 522 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 67 (type EXCL) for Anderson-PT-12-LTLFireability-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 527 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 57 (type EXCL) for 56 Anderson-PT-12-LTLFireability-12
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 67 (type EXCL) for 66 Anderson-PT-12-LTLFireability-14
[[35mlola[0m][I] time limit : 3073 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 5/256 5/2000 Anderson-PT-12-LTLFireability-12 424766 m, 84953 m/sec, 603369 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 5/3073 1/5 Anderson-PT-12-LTLFireability-14 4691 m, -49023 m/sec, 5414 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 532 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 10/256 10/2000 Anderson-PT-12-LTLFireability-12 828641 m, 80775 m/sec, 1180958 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 10/236 1/5 Anderson-PT-12-LTLFireability-14 9408 m, 943 m/sec, 10776 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 537 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 15/256 14/2000 Anderson-PT-12-LTLFireability-12 1205643 m, 75400 m/sec, 1753434 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 15/236 1/5 Anderson-PT-12-LTLFireability-14 14128 m, 944 m/sec, 16104 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 542 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 20/256 17/2000 Anderson-PT-12-LTLFireability-12 1577620 m, 74395 m/sec, 2317480 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 20/236 1/5 Anderson-PT-12-LTLFireability-14 18822 m, 938 m/sec, 21422 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 547 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 25/256 21/2000 Anderson-PT-12-LTLFireability-12 1950670 m, 74610 m/sec, 2870053 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 25/236 1/5 Anderson-PT-12-LTLFireability-14 23514 m, 938 m/sec, 26722 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 552 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 30/256 25/2000 Anderson-PT-12-LTLFireability-12 2321876 m, 74241 m/sec, 3405024 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 30/236 1/5 Anderson-PT-12-LTLFireability-14 28137 m, 924 m/sec, 31979 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 557 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 35/256 29/2000 Anderson-PT-12-LTLFireability-12 2684323 m, 72489 m/sec, 3928249 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 35/236 1/5 Anderson-PT-12-LTLFireability-14 32839 m, 940 m/sec, 37374 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 562 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 40/256 33/2000 Anderson-PT-12-LTLFireability-12 3046000 m, 72335 m/sec, 4451744 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 40/236 1/5 Anderson-PT-12-LTLFireability-14 37504 m, 933 m/sec, 42668 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 567 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 45/256 37/2000 Anderson-PT-12-LTLFireability-12 3413130 m, 73426 m/sec, 4983358 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 45/236 1/5 Anderson-PT-12-LTLFireability-14 42193 m, 937 m/sec, 48083 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 572 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 50/256 41/2000 Anderson-PT-12-LTLFireability-12 3772527 m, 71879 m/sec, 5504586 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 50/236 1/5 Anderson-PT-12-LTLFireability-14 46859 m, 933 m/sec, 53481 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 577 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 55/256 44/2000 Anderson-PT-12-LTLFireability-12 4129007 m, 71296 m/sec, 6021709 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 55/236 1/5 Anderson-PT-12-LTLFireability-14 51574 m, 943 m/sec, 58713 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 582 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 60/256 48/2000 Anderson-PT-12-LTLFireability-12 4482322 m, 70663 m/sec, 6527127 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 60/236 1/5 Anderson-PT-12-LTLFireability-14 56246 m, 934 m/sec, 63972 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 587 secs. Pages in use: 59
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 65/256 52/2000 Anderson-PT-12-LTLFireability-12 4831360 m, 69807 m/sec, 7035402 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 65/236 1/5 Anderson-PT-12-LTLFireability-14 60907 m, 932 m/sec, 69185 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 592 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 70/256 55/2000 Anderson-PT-12-LTLFireability-12 5180345 m, 69797 m/sec, 7540653 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 70/236 1/5 Anderson-PT-12-LTLFireability-14 65574 m, 933 m/sec, 74370 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 597 secs. Pages in use: 67
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 75/256 59/2000 Anderson-PT-12-LTLFireability-12 5527322 m, 69395 m/sec, 8040100 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 75/236 1/5 Anderson-PT-12-LTLFireability-14 70252 m, 935 m/sec, 79575 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 602 secs. Pages in use: 71
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 80/256 62/2000 Anderson-PT-12-LTLFireability-12 5875809 m, 69697 m/sec, 8550277 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 80/236 1/5 Anderson-PT-12-LTLFireability-14 74916 m, 932 m/sec, 84865 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 607 secs. Pages in use: 74
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 85/256 66/2000 Anderson-PT-12-LTLFireability-12 6228381 m, 70514 m/sec, 9056056 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 85/236 1/5 Anderson-PT-12-LTLFireability-14 79598 m, 936 m/sec, 90302 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 612 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 90/256 70/2000 Anderson-PT-12-LTLFireability-12 6572395 m, 68802 m/sec, 9552343 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 90/236 1/5 Anderson-PT-12-LTLFireability-14 84249 m, 930 m/sec, 95576 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 617 secs. Pages in use: 82
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 95/256 73/2000 Anderson-PT-12-LTLFireability-12 6915443 m, 68609 m/sec, 10052340 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 95/236 1/5 Anderson-PT-12-LTLFireability-14 88978 m, 945 m/sec, 100866 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 622 secs. Pages in use: 85
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 100/256 77/2000 Anderson-PT-12-LTLFireability-12 7256925 m, 68296 m/sec, 10562313 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 100/236 1/5 Anderson-PT-12-LTLFireability-14 93706 m, 945 m/sec, 106153 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 627 secs. Pages in use: 89
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 57 LTL EXCL 105/256 80/2000 Anderson-PT-12-LTLFireability-12 7597555 m, 68126 m/sec, 11065392 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 105/236 1/5 Anderson-PT-12-LTLFireability-14 98396 m, 938 m/sec, 111363 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 632 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 57 (type EXCL) for Anderson-PT-12-LTLFireability-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 7680554
[[35mlola[0m][I] fired transitions : 11186858
[[35mlola[0m][I] time used : 106
[[35mlola[0m][I] memory pages used : 81
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 110/256 2/5 Anderson-PT-12-LTLFireability-14 103072 m, 935 m/sec, 116683 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 637 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 115/256 2/5 Anderson-PT-12-LTLFireability-14 107748 m, 935 m/sec, 122097 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 642 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 120/256 2/5 Anderson-PT-12-LTLFireability-14 112412 m, 932 m/sec, 127449 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 647 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 125/256 2/5 Anderson-PT-12-LTLFireability-14 117015 m, 920 m/sec, 132815 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 652 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 130/256 2/5 Anderson-PT-12-LTLFireability-14 121727 m, 942 m/sec, 138171 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 657 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 135/256 2/5 Anderson-PT-12-LTLFireability-14 126453 m, 945 m/sec, 143546 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 662 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 140/256 2/5 Anderson-PT-12-LTLFireability-14 131201 m, 949 m/sec, 148827 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 667 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 145/256 2/5 Anderson-PT-12-LTLFireability-14 135909 m, 941 m/sec, 154080 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 672 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 150/256 2/5 Anderson-PT-12-LTLFireability-14 140566 m, 931 m/sec, 159389 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 677 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 155/256 2/5 Anderson-PT-12-LTLFireability-14 145218 m, 930 m/sec, 164678 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 682 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 160/256 2/5 Anderson-PT-12-LTLFireability-14 150114 m, 979 m/sec, 170210 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 687 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 165/256 2/5 Anderson-PT-12-LTLFireability-14 155068 m, 990 m/sec, 175803 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 692 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 170/256 2/5 Anderson-PT-12-LTLFireability-14 159821 m, 950 m/sec, 181231 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 697 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 175/256 2/5 Anderson-PT-12-LTLFireability-14 164568 m, 949 m/sec, 186456 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 702 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 180/256 2/5 Anderson-PT-12-LTLFireability-14 169271 m, 940 m/sec, 191810 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 707 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 185/256 2/5 Anderson-PT-12-LTLFireability-14 173942 m, 934 m/sec, 197100 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 712 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 190/256 2/5 Anderson-PT-12-LTLFireability-14 178576 m, 926 m/sec, 202469 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 717 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 195/256 2/5 Anderson-PT-12-LTLFireability-14 183277 m, 940 m/sec, 207801 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 722 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 200/256 2/5 Anderson-PT-12-LTLFireability-14 187970 m, 938 m/sec, 213108 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 727 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 205/256 2/5 Anderson-PT-12-LTLFireability-14 192699 m, 945 m/sec, 218415 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 732 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 210/256 2/5 Anderson-PT-12-LTLFireability-14 197381 m, 936 m/sec, 223795 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 737 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 215/256 2/5 Anderson-PT-12-LTLFireability-14 202264 m, 976 m/sec, 229350 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 742 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 220/256 3/5 Anderson-PT-12-LTLFireability-14 207072 m, 961 m/sec, 234797 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 747 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 225/256 3/5 Anderson-PT-12-LTLFireability-14 211734 m, 932 m/sec, 240155 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 752 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 230/256 3/5 Anderson-PT-12-LTLFireability-14 216405 m, 934 m/sec, 245437 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 757 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 235/256 3/5 Anderson-PT-12-LTLFireability-14 221073 m, 933 m/sec, 250734 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 762 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 240/256 3/5 Anderson-PT-12-LTLFireability-14 225793 m, 944 m/sec, 256040 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 767 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 245/256 3/5 Anderson-PT-12-LTLFireability-14 230493 m, 940 m/sec, 261352 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 772 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 250/256 3/5 Anderson-PT-12-LTLFireability-14 235170 m, 935 m/sec, 266672 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 777 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 255/256 3/5 Anderson-PT-12-LTLFireability-14 239892 m, 944 m/sec, 272134 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 782 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 67 (type EXCL) for Anderson-PT-12-LTLFireability-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 787 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 Anderson-PT-12-LTLFireability-10
[[35mlola[0m][I] time limit : 255 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 67 (type EXCL) for 66 Anderson-PT-12-LTLFireability-14
[[35mlola[0m][I] time limit : 2813 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 5/255 4/2000 Anderson-PT-12-LTLFireability-10 336412 m, 67282 m/sec, 838833 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 5/2813 1/5 Anderson-PT-12-LTLFireability-14 4761 m, -47026 m/sec, 5486 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 792 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 10/255 8/2000 Anderson-PT-12-LTLFireability-10 669393 m, 66596 m/sec, 1669541 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 10/234 1/5 Anderson-PT-12-LTLFireability-14 9522 m, 952 m/sec, 10896 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 797 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 15/255 11/2000 Anderson-PT-12-LTLFireability-10 986696 m, 63460 m/sec, 2502993 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 15/234 1/5 Anderson-PT-12-LTLFireability-14 14285 m, 952 m/sec, 16293 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 802 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 20/255 14/2000 Anderson-PT-12-LTLFireability-10 1286437 m, 59948 m/sec, 3273465 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 20/234 1/5 Anderson-PT-12-LTLFireability-14 18719 m, 886 m/sec, 21315 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 807 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 25/255 17/2000 Anderson-PT-12-LTLFireability-10 1601619 m, 63036 m/sec, 4084439 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 25/234 1/5 Anderson-PT-12-LTLFireability-14 23460 m, 948 m/sec, 26666 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 812 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 30/255 21/2000 Anderson-PT-12-LTLFireability-10 1918462 m, 63368 m/sec, 4887762 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 30/234 1/5 Anderson-PT-12-LTLFireability-14 28119 m, 931 m/sec, 31959 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 817 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 35/255 24/2000 Anderson-PT-12-LTLFireability-10 2227011 m, 61709 m/sec, 5688441 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 35/234 1/5 Anderson-PT-12-LTLFireability-14 32872 m, 950 m/sec, 37409 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 822 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 40/255 27/2000 Anderson-PT-12-LTLFireability-10 2566367 m, 67871 m/sec, 6504357 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 40/234 1/5 Anderson-PT-12-LTLFireability-14 37596 m, 944 m/sec, 42789 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 827 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 45/255 30/2000 Anderson-PT-12-LTLFireability-10 2881738 m, 63074 m/sec, 7336217 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 45/234 1/5 Anderson-PT-12-LTLFireability-14 42328 m, 946 m/sec, 48240 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 832 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 50/255 33/2000 Anderson-PT-12-LTLFireability-10 3153616 m, 54375 m/sec, 8221001 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 50/234 1/5 Anderson-PT-12-LTLFireability-14 47043 m, 943 m/sec, 53674 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 837 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 55/255 36/2000 Anderson-PT-12-LTLFireability-10 3431744 m, 55625 m/sec, 9080792 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 55/234 1/5 Anderson-PT-12-LTLFireability-14 51814 m, 954 m/sec, 59013 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 842 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 60/255 39/2000 Anderson-PT-12-LTLFireability-10 3701874 m, 54026 m/sec, 9919861 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 60/234 1/5 Anderson-PT-12-LTLFireability-14 56491 m, 935 m/sec, 64240 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 847 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 65/255 42/2000 Anderson-PT-12-LTLFireability-10 3978506 m, 55326 m/sec, 10786925 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 65/234 1/5 Anderson-PT-12-LTLFireability-14 61234 m, 948 m/sec, 69541 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 852 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 70/255 45/2000 Anderson-PT-12-LTLFireability-10 4251861 m, 54671 m/sec, 11641165 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 70/234 1/5 Anderson-PT-12-LTLFireability-14 65913 m, 935 m/sec, 74735 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 857 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 75/255 47/2000 Anderson-PT-12-LTLFireability-10 4522818 m, 54191 m/sec, 12495880 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 75/234 1/5 Anderson-PT-12-LTLFireability-14 70615 m, 940 m/sec, 79981 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 862 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 80/255 50/2000 Anderson-PT-12-LTLFireability-10 4797402 m, 54916 m/sec, 13339828 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 80/234 1/5 Anderson-PT-12-LTLFireability-14 75279 m, 932 m/sec, 85329 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 867 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 85/255 53/2000 Anderson-PT-12-LTLFireability-10 5071977 m, 54915 m/sec, 14179453 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 85/234 1/5 Anderson-PT-12-LTLFireability-14 80016 m, 947 m/sec, 90775 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 872 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 90/255 56/2000 Anderson-PT-12-LTLFireability-10 5375225 m, 60649 m/sec, 15047287 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 90/234 1/5 Anderson-PT-12-LTLFireability-14 84712 m, 939 m/sec, 96093 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 877 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 95/255 59/2000 Anderson-PT-12-LTLFireability-10 5693081 m, 63571 m/sec, 15841840 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 95/234 1/5 Anderson-PT-12-LTLFireability-14 89485 m, 954 m/sec, 101419 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 882 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 100/255 62/2000 Anderson-PT-12-LTLFireability-10 5988001 m, 58984 m/sec, 16676982 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 100/234 1/5 Anderson-PT-12-LTLFireability-14 94219 m, 946 m/sec, 106701 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 887 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 105/255 65/2000 Anderson-PT-12-LTLFireability-10 6262003 m, 54800 m/sec, 17541738 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 105/234 1/5 Anderson-PT-12-LTLFireability-14 98942 m, 944 m/sec, 111949 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 892 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 110/255 68/2000 Anderson-PT-12-LTLFireability-10 6567707 m, 61140 m/sec, 18321525 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 110/234 2/5 Anderson-PT-12-LTLFireability-14 103623 m, 936 m/sec, 117343 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 897 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 115/255 72/2000 Anderson-PT-12-LTLFireability-10 6878185 m, 62095 m/sec, 19093486 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 115/234 2/5 Anderson-PT-12-LTLFireability-14 108300 m, 935 m/sec, 122712 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 902 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 120/255 75/2000 Anderson-PT-12-LTLFireability-10 7183207 m, 61004 m/sec, 19883056 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 120/234 2/5 Anderson-PT-12-LTLFireability-14 112982 m, 936 m/sec, 128086 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 907 secs. Pages in use: 96
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 125/255 78/2000 Anderson-PT-12-LTLFireability-10 7484119 m, 60182 m/sec, 20667788 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 125/234 2/5 Anderson-PT-12-LTLFireability-14 117609 m, 925 m/sec, 133442 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 912 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 130/255 81/2000 Anderson-PT-12-LTLFireability-10 7790187 m, 61213 m/sec, 21448271 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 130/234 2/5 Anderson-PT-12-LTLFireability-14 122352 m, 948 m/sec, 138842 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 917 secs. Pages in use: 102
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 135/255 83/2000 Anderson-PT-12-LTLFireability-10 8094274 m, 60817 m/sec, 22211559 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 135/234 2/5 Anderson-PT-12-LTLFireability-14 127129 m, 955 m/sec, 144334 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 922 secs. Pages in use: 104
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 140/255 87/2000 Anderson-PT-12-LTLFireability-10 8425139 m, 66173 m/sec, 23010038 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 140/234 2/5 Anderson-PT-12-LTLFireability-14 131892 m, 952 m/sec, 149580 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 927 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 145/255 90/2000 Anderson-PT-12-LTLFireability-10 8709889 m, 56950 m/sec, 23830306 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 145/234 2/5 Anderson-PT-12-LTLFireability-14 136617 m, 945 m/sec, 154908 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 932 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 150/255 92/2000 Anderson-PT-12-LTLFireability-10 8976868 m, 53395 m/sec, 24674228 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 150/234 2/5 Anderson-PT-12-LTLFireability-14 141305 m, 937 m/sec, 160266 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 937 secs. Pages in use: 114
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 155/255 95/2000 Anderson-PT-12-LTLFireability-10 9245371 m, 53700 m/sec, 25504637 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 155/234 2/5 Anderson-PT-12-LTLFireability-14 146003 m, 939 m/sec, 165553 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 942 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 160/255 98/2000 Anderson-PT-12-LTLFireability-10 9522234 m, 55372 m/sec, 26347756 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 160/234 2/5 Anderson-PT-12-LTLFireability-14 151003 m, 1000 m/sec, 171166 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 947 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 165/255 100/2000 Anderson-PT-12-LTLFireability-10 9782479 m, 52049 m/sec, 27185679 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 165/234 2/5 Anderson-PT-12-LTLFireability-14 155904 m, 980 m/sec, 176700 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 952 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 170/255 103/2000 Anderson-PT-12-LTLFireability-10 10051592 m, 53822 m/sec, 28014211 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 170/234 2/5 Anderson-PT-12-LTLFireability-14 160675 m, 954 m/sec, 182140 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 957 secs. Pages in use: 125
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 175/255 106/2000 Anderson-PT-12-LTLFireability-10 10312518 m, 52185 m/sec, 28831422 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 175/234 2/5 Anderson-PT-12-LTLFireability-14 165445 m, 954 m/sec, 187507 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 962 secs. Pages in use: 128
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 180/255 108/2000 Anderson-PT-12-LTLFireability-10 10597240 m, 56944 m/sec, 29668302 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 180/234 2/5 Anderson-PT-12-LTLFireability-14 170160 m, 943 m/sec, 192878 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 967 secs. Pages in use: 130
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 185/255 111/2000 Anderson-PT-12-LTLFireability-10 10890940 m, 58740 m/sec, 30494214 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 185/234 2/5 Anderson-PT-12-LTLFireability-14 174864 m, 940 m/sec, 198240 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 972 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 190/255 114/2000 Anderson-PT-12-LTLFireability-10 11181337 m, 58079 m/sec, 31281060 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 190/234 2/5 Anderson-PT-12-LTLFireability-14 179577 m, 942 m/sec, 203554 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 977 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 195/255 117/2000 Anderson-PT-12-LTLFireability-10 11471050 m, 57942 m/sec, 32086320 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 195/234 2/5 Anderson-PT-12-LTLFireability-14 184311 m, 946 m/sec, 208931 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 982 secs. Pages in use: 140
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 200/255 120/2000 Anderson-PT-12-LTLFireability-10 11743907 m, 54571 m/sec, 32926625 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 200/234 2/5 Anderson-PT-12-LTLFireability-14 189019 m, 941 m/sec, 214273 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 987 secs. Pages in use: 143
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 205/255 123/2000 Anderson-PT-12-LTLFireability-10 12040388 m, 59296 m/sec, 33704144 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 205/234 2/5 Anderson-PT-12-LTLFireability-14 193755 m, 947 m/sec, 219694 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 992 secs. Pages in use: 146
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 210/255 126/2000 Anderson-PT-12-LTLFireability-10 12316495 m, 55221 m/sec, 34520980 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 210/234 2/5 Anderson-PT-12-LTLFireability-14 198486 m, 946 m/sec, 225113 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 997 secs. Pages in use: 149
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 215/255 129/2000 Anderson-PT-12-LTLFireability-10 12593543 m, 55409 m/sec, 35324376 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 215/234 2/5 Anderson-PT-12-LTLFireability-14 203439 m, 990 m/sec, 230738 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1002 secs. Pages in use: 152
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 220/255 132/2000 Anderson-PT-12-LTLFireability-10 12885299 m, 58351 m/sec, 36094643 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 220/234 3/5 Anderson-PT-12-LTLFireability-14 208235 m, 959 m/sec, 236146 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1007 secs. Pages in use: 156
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 225/255 135/2000 Anderson-PT-12-LTLFireability-10 13156093 m, 54158 m/sec, 36923075 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 225/234 3/5 Anderson-PT-12-LTLFireability-14 212895 m, 932 m/sec, 241466 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1012 secs. Pages in use: 159
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 230/255 138/2000 Anderson-PT-12-LTLFireability-10 13461681 m, 61117 m/sec, 37685929 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 230/234 3/5 Anderson-PT-12-LTLFireability-14 217613 m, 943 m/sec, 246806 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1017 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 67 (type EXCL) for Anderson-PT-12-LTLFireability-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 235/255 140/2000 Anderson-PT-12-LTLFireability-10 13751537 m, 57971 m/sec, 38453587 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1022 secs. Pages in use: 164
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 67 (type EXCL) for 66 Anderson-PT-12-LTLFireability-14
[[35mlola[0m][I] time limit : 2578 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 240/255 143/2000 Anderson-PT-12-LTLFireability-10 13992459 m, 48184 m/sec, 39059635 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 5/2578 1/5 Anderson-PT-12-LTLFireability-14 3687 m, -42785 m/sec, 4297 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1027 secs. Pages in use: 169
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 245/255 145/2000 Anderson-PT-12-LTLFireability-10 14226689 m, 46846 m/sec, 39661203 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 10/214 1/5 Anderson-PT-12-LTLFireability-14 7642 m, 791 m/sec, 8850 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1032 secs. Pages in use: 171
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 250/255 147/2000 Anderson-PT-12-LTLFireability-10 14472600 m, 49182 m/sec, 40256008 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 15/214 1/5 Anderson-PT-12-LTLFireability-14 11499 m, 771 m/sec, 13159 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1037 secs. Pages in use: 173
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 255/255 150/2000 Anderson-PT-12-LTLFireability-10 14728784 m, 51236 m/sec, 40895412 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 20/214 1/5 Anderson-PT-12-LTLFireability-14 15184 m, 737 m/sec, 17306 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1042 secs. Pages in use: 176
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 51 (type EXCL) for Anderson-PT-12-LTLFireability-10 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 25/214 1/5 Anderson-PT-12-LTLFireability-14 18998 m, 762 m/sec, 21616 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1047 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 Anderson-PT-12-LTLFireability-10
[[35mlola[0m][I] time limit : 2553 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 5/2553 3/5 Anderson-PT-12-LTLFireability-10 223114 m, -2901134 m/sec, 510226 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 30/234 1/5 Anderson-PT-12-LTLFireability-14 22291 m, 658 m/sec, 25346 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1052 secs. Pages in use: 183
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 10/2553 5/5 Anderson-PT-12-LTLFireability-10 429938 m, 41364 m/sec, 1083962 t fired, .
[[35mlola[0m][.] 67 LTL EXCL 35/214 1/5 Anderson-PT-12-LTLFireability-14 25460 m, 633 m/sec, 28965 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1057 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 51 (type EXCL) for Anderson-PT-12-LTLFireability-10 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 40/214 1/5 Anderson-PT-12-LTLFireability-14 29190 m, 746 m/sec, 33242 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1062 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 45/234 1/5 Anderson-PT-12-LTLFireability-14 32890 m, 740 m/sec, 37427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1067 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 50/234 1/5 Anderson-PT-12-LTLFireability-14 36657 m, 753 m/sec, 41725 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1072 secs. Pages in use: 189
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 55/234 1/5 Anderson-PT-12-LTLFireability-14 40263 m, 721 m/sec, 45871 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1077 secs. Pages in use: 191
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 60/234 1/5 Anderson-PT-12-LTLFireability-14 44116 m, 770 m/sec, 50298 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1082 secs. Pages in use: 193
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 65/234 1/5 Anderson-PT-12-LTLFireability-14 47612 m, 699 m/sec, 54294 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1087 secs. Pages in use: 195
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 70/234 1/5 Anderson-PT-12-LTLFireability-14 51311 m, 739 m/sec, 58378 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1092 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 75/234 1/5 Anderson-PT-12-LTLFireability-14 55037 m, 745 m/sec, 62646 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1097 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 80/234 1/5 Anderson-PT-12-LTLFireability-14 58582 m, 709 m/sec, 66627 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1102 secs. Pages in use: 202
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 85/234 1/5 Anderson-PT-12-LTLFireability-14 62296 m, 742 m/sec, 70713 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1107 secs. Pages in use: 205
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 90/234 1/5 Anderson-PT-12-LTLFireability-14 65976 m, 736 m/sec, 74807 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1112 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 95/234 1/5 Anderson-PT-12-LTLFireability-14 69657 m, 736 m/sec, 78923 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1117 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 100/234 1/5 Anderson-PT-12-LTLFireability-14 73604 m, 789 m/sec, 83443 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1122 secs. Pages in use: 212
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 105/234 1/5 Anderson-PT-12-LTLFireability-14 77170 m, 713 m/sec, 87564 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1127 secs. Pages in use: 215
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 110/234 1/5 Anderson-PT-12-LTLFireability-14 80902 m, 746 m/sec, 91842 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1132 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 115/234 1/5 Anderson-PT-12-LTLFireability-14 84456 m, 710 m/sec, 95805 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1137 secs. Pages in use: 219
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 120/234 1/5 Anderson-PT-12-LTLFireability-14 88144 m, 737 m/sec, 99968 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1142 secs. Pages in use: 221
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 125/234 1/5 Anderson-PT-12-LTLFireability-14 91876 m, 746 m/sec, 104024 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1147 secs. Pages in use: 224
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 130/234 1/5 Anderson-PT-12-LTLFireability-14 95715 m, 767 m/sec, 108321 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1152 secs. Pages in use: 226
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 135/234 1/5 Anderson-PT-12-LTLFireability-14 99379 m, 732 m/sec, 112463 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1157 secs. Pages in use: 228
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 140/234 2/5 Anderson-PT-12-LTLFireability-14 103181 m, 760 m/sec, 116796 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1162 secs. Pages in use: 233
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 145/234 2/5 Anderson-PT-12-LTLFireability-14 106866 m, 737 m/sec, 121058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1167 secs. Pages in use: 235
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 150/234 2/5 Anderson-PT-12-LTLFireability-14 110604 m, 747 m/sec, 125357 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1172 secs. Pages in use: 237
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 155/234 2/5 Anderson-PT-12-LTLFireability-14 114146 m, 708 m/sec, 129444 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1177 secs. Pages in use: 239
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 160/234 2/5 Anderson-PT-12-LTLFireability-14 117925 m, 755 m/sec, 133783 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1182 secs. Pages in use: 242
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 165/234 2/5 Anderson-PT-12-LTLFireability-14 121604 m, 735 m/sec, 138045 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1187 secs. Pages in use: 244
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 170/234 2/5 Anderson-PT-12-LTLFireability-14 125396 m, 758 m/sec, 142324 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1192 secs. Pages in use: 246
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 175/234 2/5 Anderson-PT-12-LTLFireability-14 129241 m, 769 m/sec, 146695 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1197 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 180/234 2/5 Anderson-PT-12-LTLFireability-14 133058 m, 763 m/sec, 150863 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1202 secs. Pages in use: 251
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 185/234 2/5 Anderson-PT-12-LTLFireability-14 136879 m, 764 m/sec, 155228 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1207 secs. Pages in use: 254
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 190/234 2/5 Anderson-PT-12-LTLFireability-14 140784 m, 781 m/sec, 159632 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1212 secs. Pages in use: 256
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 195/234 2/5 Anderson-PT-12-LTLFireability-14 144411 m, 725 m/sec, 163811 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1217 secs. Pages in use: 258
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 200/234 2/5 Anderson-PT-12-LTLFireability-14 148194 m, 756 m/sec, 168145 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1222 secs. Pages in use: 260
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 205/234 2/5 Anderson-PT-12-LTLFireability-14 152574 m, 876 m/sec, 172948 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1227 secs. Pages in use: 263
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 210/234 2/5 Anderson-PT-12-LTLFireability-14 156229 m, 731 m/sec, 177075 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1232 secs. Pages in use: 265
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 215/234 2/5 Anderson-PT-12-LTLFireability-14 160127 m, 779 m/sec, 181553 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1237 secs. Pages in use: 267
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 220/234 2/5 Anderson-PT-12-LTLFireability-14 163978 m, 770 m/sec, 185811 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1242 secs. Pages in use: 269
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 225/234 2/5 Anderson-PT-12-LTLFireability-14 167694 m, 743 m/sec, 190048 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1247 secs. Pages in use: 272
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 230/234 2/5 Anderson-PT-12-LTLFireability-14 171376 m, 736 m/sec, 194194 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1252 secs. Pages in use: 274
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 67 (type EXCL) for Anderson-PT-12-LTLFireability-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1257 secs. Pages in use: 278
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 37 Anderson-PT-12-LTLFireability-07
[[35mlola[0m][I] time limit : 234 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 67 (type EXCL) for 66 Anderson-PT-12-LTLFireability-14
[[35mlola[0m][I] time limit : 2343 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for Anderson-PT-12-LTLFireability-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 49
[[35mlola[0m][I] fired transitions : 48
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 5/234 1/5 Anderson-PT-12-LTLFireability-14 3390 m, -33597 m/sec, 3986 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1262 secs. Pages in use: 282
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 10/234 1/5 Anderson-PT-12-LTLFireability-14 6572 m, 636 m/sec, 7568 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1267 secs. Pages in use: 284
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 15/234 1/5 Anderson-PT-12-LTLFireability-14 9620 m, 609 m/sec, 10999 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1272 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 20/234 1/5 Anderson-PT-12-LTLFireability-14 13184 m, 712 m/sec, 15013 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1277 secs. Pages in use: 288
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 25/234 1/5 Anderson-PT-12-LTLFireability-14 16410 m, 645 m/sec, 18646 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1282 secs. Pages in use: 290
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 30/234 1/5 Anderson-PT-12-LTLFireability-14 19940 m, 706 m/sec, 22706 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1287 secs. Pages in use: 291
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 35/234 1/5 Anderson-PT-12-LTLFireability-14 22830 m, 578 m/sec, 25995 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1292 secs. Pages in use: 293
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 40/234 1/5 Anderson-PT-12-LTLFireability-14 26075 m, 649 m/sec, 29637 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1297 secs. Pages in use: 294
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 45/234 1/5 Anderson-PT-12-LTLFireability-14 28962 m, 577 m/sec, 32959 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1302 secs. Pages in use: 296
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 50/234 1/5 Anderson-PT-12-LTLFireability-14 32253 m, 658 m/sec, 36672 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1307 secs. Pages in use: 298
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 55/234 1/5 Anderson-PT-12-LTLFireability-14 35747 m, 698 m/sec, 40652 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1312 secs. Pages in use: 300
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 60/234 1/5 Anderson-PT-12-LTLFireability-14 38971 m, 644 m/sec, 44404 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1317 secs. Pages in use: 302
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 65/234 1/5 Anderson-PT-12-LTLFireability-14 42256 m, 657 m/sec, 48151 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1322 secs. Pages in use: 303
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 70/234 1/5 Anderson-PT-12-LTLFireability-14 45197 m, 588 m/sec, 51570 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1327 secs. Pages in use: 305
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 75/234 1/5 Anderson-PT-12-LTLFireability-14 48411 m, 642 m/sec, 55207 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1332 secs. Pages in use: 307
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 80/234 1/5 Anderson-PT-12-LTLFireability-14 51423 m, 602 m/sec, 58528 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1337 secs. Pages in use: 308
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 85/234 1/5 Anderson-PT-12-LTLFireability-14 54645 m, 644 m/sec, 62222 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1342 secs. Pages in use: 310
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 90/234 1/5 Anderson-PT-12-LTLFireability-14 57730 m, 617 m/sec, 65711 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1347 secs. Pages in use: 312
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 95/234 1/5 Anderson-PT-12-LTLFireability-14 60780 m, 610 m/sec, 69054 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1352 secs. Pages in use: 314
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 100/234 1/5 Anderson-PT-12-LTLFireability-14 63896 m, 623 m/sec, 72504 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1357 secs. Pages in use: 316
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 105/234 1/5 Anderson-PT-12-LTLFireability-14 67178 m, 656 m/sec, 76167 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1362 secs. Pages in use: 318
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 110/234 1/5 Anderson-PT-12-LTLFireability-14 70161 m, 596 m/sec, 79463 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1367 secs. Pages in use: 321
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 115/234 1/5 Anderson-PT-12-LTLFireability-14 73255 m, 618 m/sec, 83067 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1372 secs. Pages in use: 322
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 120/234 1/5 Anderson-PT-12-LTLFireability-14 76470 m, 643 m/sec, 86714 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1377 secs. Pages in use: 324
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 125/234 1/5 Anderson-PT-12-LTLFireability-14 79684 m, 642 m/sec, 90403 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1382 secs. Pages in use: 326
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 130/234 1/5 Anderson-PT-12-LTLFireability-14 82852 m, 633 m/sec, 93981 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1387 secs. Pages in use: 328
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 135/234 1/5 Anderson-PT-12-LTLFireability-14 86050 m, 639 m/sec, 97553 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1392 secs. Pages in use: 330
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 140/234 1/5 Anderson-PT-12-LTLFireability-14 89340 m, 658 m/sec, 101255 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1397 secs. Pages in use: 331
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 145/234 1/5 Anderson-PT-12-LTLFireability-14 92578 m, 647 m/sec, 104804 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1402 secs. Pages in use: 333
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 150/234 1/5 Anderson-PT-12-LTLFireability-14 95431 m, 570 m/sec, 108008 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1407 secs. Pages in use: 335
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 155/234 1/5 Anderson-PT-12-LTLFireability-14 98799 m, 673 m/sec, 111798 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1412 secs. Pages in use: 337
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 160/234 1/5 Anderson-PT-12-LTLFireability-14 101757 m, 591 m/sec, 115270 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1417 secs. Pages in use: 339
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 165/234 2/5 Anderson-PT-12-LTLFireability-14 105180 m, 684 m/sec, 119101 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1422 secs. Pages in use: 342
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 170/234 2/5 Anderson-PT-12-LTLFireability-14 108431 m, 650 m/sec, 122851 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1427 secs. Pages in use: 345
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 175/234 2/5 Anderson-PT-12-LTLFireability-14 111619 m, 637 m/sec, 126541 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1432 secs. Pages in use: 347
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 180/234 2/5 Anderson-PT-12-LTLFireability-14 114641 m, 604 m/sec, 129979 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1437 secs. Pages in use: 349
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 185/234 2/5 Anderson-PT-12-LTLFireability-14 117831 m, 638 m/sec, 133685 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1442 secs. Pages in use: 351
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 190/234 2/5 Anderson-PT-12-LTLFireability-14 120777 m, 589 m/sec, 137034 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1447 secs. Pages in use: 352
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 195/234 2/5 Anderson-PT-12-LTLFireability-14 124146 m, 673 m/sec, 140887 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1452 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 200/234 2/5 Anderson-PT-12-LTLFireability-14 127659 m, 702 m/sec, 144988 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1457 secs. Pages in use: 356
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 205/234 2/5 Anderson-PT-12-LTLFireability-14 130921 m, 652 m/sec, 148520 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1462 secs. Pages in use: 358
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 210/234 2/5 Anderson-PT-12-LTLFireability-14 134112 m, 638 m/sec, 152032 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1467 secs. Pages in use: 360
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 215/234 2/5 Anderson-PT-12-LTLFireability-14 137181 m, 613 m/sec, 155605 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1472 secs. Pages in use: 362
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 220/234 2/5 Anderson-PT-12-LTLFireability-14 140211 m, 606 m/sec, 159003 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1477 secs. Pages in use: 363
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 225/234 2/5 Anderson-PT-12-LTLFireability-14 143492 m, 656 m/sec, 162778 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1482 secs. Pages in use: 366
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 230/234 2/5 Anderson-PT-12-LTLFireability-14 146443 m, 590 m/sec, 166097 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1487 secs. Pages in use: 368
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 67 (type EXCL) for Anderson-PT-12-LTLFireability-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1492 secs. Pages in use: 370
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL) for 13 Anderson-PT-12-LTLFireability-03
[[35mlola[0m][I] time limit : 234 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 67 (type EXCL) for 66 Anderson-PT-12-LTLFireability-14
[[35mlola[0m][I] time limit : 2108 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 14 (type EXCL) for Anderson-PT-12-LTLFireability-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 2383
[[35mlola[0m][I] fired transitions : 3161
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 5/234 1/5 Anderson-PT-12-LTLFireability-14 2585 m, -28771 m/sec, 2985 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1497 secs. Pages in use: 373
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 10/234 1/5 Anderson-PT-12-LTLFireability-14 5269 m, 536 m/sec, 6104 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1502 secs. Pages in use: 374
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 15/234 1/5 Anderson-PT-12-LTLFireability-14 7785 m, 503 m/sec, 9022 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1507 secs. Pages in use: 376
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 20/234 1/5 Anderson-PT-12-LTLFireability-14 10414 m, 525 m/sec, 11993 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1512 secs. Pages in use: 377
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 25/234 1/5 Anderson-PT-12-LTLFireability-14 13163 m, 549 m/sec, 14992 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1517 secs. Pages in use: 379
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 30/234 1/5 Anderson-PT-12-LTLFireability-14 15849 m, 537 m/sec, 18032 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1522 secs. Pages in use: 380
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 35/234 1/5 Anderson-PT-12-LTLFireability-14 18446 m, 519 m/sec, 21029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1527 secs. Pages in use: 382
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 40/234 1/5 Anderson-PT-12-LTLFireability-14 21031 m, 517 m/sec, 23892 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1532 secs. Pages in use: 383
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 45/234 1/5 Anderson-PT-12-LTLFireability-14 23770 m, 547 m/sec, 27004 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1537 secs. Pages in use: 384
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 50/234 1/5 Anderson-PT-12-LTLFireability-14 26400 m, 526 m/sec, 30056 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1542 secs. Pages in use: 386
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 55/234 1/5 Anderson-PT-12-LTLFireability-14 29360 m, 592 m/sec, 33431 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1547 secs. Pages in use: 387
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 60/234 1/5 Anderson-PT-12-LTLFireability-14 32440 m, 616 m/sec, 36868 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1552 secs. Pages in use: 389
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 65/234 1/5 Anderson-PT-12-LTLFireability-14 35093 m, 530 m/sec, 39882 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1557 secs. Pages in use: 391
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 70/234 1/5 Anderson-PT-12-LTLFireability-14 37900 m, 561 m/sec, 43166 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1562 secs. Pages in use: 392
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 75/234 1/5 Anderson-PT-12-LTLFireability-14 40599 m, 539 m/sec, 46232 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1567 secs. Pages in use: 394
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 80/234 1/5 Anderson-PT-12-LTLFireability-14 43172 m, 514 m/sec, 49277 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1572 secs. Pages in use: 395
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 85/234 1/5 Anderson-PT-12-LTLFireability-14 45941 m, 553 m/sec, 52411 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1577 secs. Pages in use: 397
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 90/234 1/5 Anderson-PT-12-LTLFireability-14 48884 m, 588 m/sec, 55714 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1582 secs. Pages in use: 398
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 95/234 1/5 Anderson-PT-12-LTLFireability-14 51522 m, 527 m/sec, 58659 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1587 secs. Pages in use: 400
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 100/234 1/5 Anderson-PT-12-LTLFireability-14 54257 m, 547 m/sec, 61803 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1592 secs. Pages in use: 401
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 105/234 1/5 Anderson-PT-12-LTLFireability-14 57120 m, 572 m/sec, 65013 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1597 secs. Pages in use: 403
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 110/234 1/5 Anderson-PT-12-LTLFireability-14 59683 m, 512 m/sec, 67836 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1602 secs. Pages in use: 404
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 115/234 1/5 Anderson-PT-12-LTLFireability-14 62485 m, 560 m/sec, 70948 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1607 secs. Pages in use: 406
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 120/234 1/5 Anderson-PT-12-LTLFireability-14 65164 m, 535 m/sec, 73927 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1612 secs. Pages in use: 408
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 125/234 1/5 Anderson-PT-12-LTLFireability-14 68318 m, 630 m/sec, 77473 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1617 secs. Pages in use: 410
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 130/234 1/5 Anderson-PT-12-LTLFireability-14 71155 m, 567 m/sec, 80656 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1622 secs. Pages in use: 412
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 135/234 1/5 Anderson-PT-12-LTLFireability-14 73911 m, 551 m/sec, 83767 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1627 secs. Pages in use: 414
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 140/234 1/5 Anderson-PT-12-LTLFireability-14 76640 m, 545 m/sec, 86926 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1632 secs. Pages in use: 415
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 145/234 1/5 Anderson-PT-12-LTLFireability-14 79361 m, 544 m/sec, 90048 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1637 secs. Pages in use: 417
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 150/234 1/5 Anderson-PT-12-LTLFireability-14 82193 m, 566 m/sec, 93226 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1642 secs. Pages in use: 418
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 155/234 1/5 Anderson-PT-12-LTLFireability-14 84938 m, 549 m/sec, 96344 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1647 secs. Pages in use: 420
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 160/234 1/5 Anderson-PT-12-LTLFireability-14 87932 m, 598 m/sec, 99745 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1652 secs. Pages in use: 422
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 165/234 1/5 Anderson-PT-12-LTLFireability-14 90716 m, 556 m/sec, 102768 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1657 secs. Pages in use: 423
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 170/234 1/5 Anderson-PT-12-LTLFireability-14 93496 m, 556 m/sec, 105932 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1662 secs. Pages in use: 425
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 175/234 1/5 Anderson-PT-12-LTLFireability-14 96420 m, 584 m/sec, 109156 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1667 secs. Pages in use: 427
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 180/234 1/5 Anderson-PT-12-LTLFireability-14 99271 m, 570 m/sec, 112340 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1672 secs. Pages in use: 430
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 185/234 2/5 Anderson-PT-12-LTLFireability-14 102087 m, 563 m/sec, 115612 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1677 secs. Pages in use: 433
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 190/234 2/5 Anderson-PT-12-LTLFireability-14 104865 m, 555 m/sec, 118735 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1682 secs. Pages in use: 435
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 195/234 2/5 Anderson-PT-12-LTLFireability-14 107625 m, 552 m/sec, 121969 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1687 secs. Pages in use: 437
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 200/234 2/5 Anderson-PT-12-LTLFireability-14 110161 m, 507 m/sec, 124858 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1692 secs. Pages in use: 439
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 205/234 2/5 Anderson-PT-12-LTLFireability-14 112844 m, 536 m/sec, 127914 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1697 secs. Pages in use: 441
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 210/234 2/5 Anderson-PT-12-LTLFireability-14 115357 m, 502 m/sec, 130885 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1702 secs. Pages in use: 442
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 215/234 2/5 Anderson-PT-12-LTLFireability-14 117935 m, 515 m/sec, 133793 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1707 secs. Pages in use: 444
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 220/234 2/5 Anderson-PT-12-LTLFireability-14 120619 m, 536 m/sec, 136850 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1712 secs. Pages in use: 446
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 225/234 2/5 Anderson-PT-12-LTLFireability-14 123486 m, 573 m/sec, 140096 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1717 secs. Pages in use: 448
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 230/234 2/5 Anderson-PT-12-LTLFireability-14 126163 m, 535 m/sec, 143239 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1722 secs. Pages in use: 449
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 67 (type EXCL) for Anderson-PT-12-LTLFireability-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1727 secs. Pages in use: 451
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 Anderson-PT-12-LTLFireability-02
[[35mlola[0m][I] time limit : 234 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 67 (type EXCL) for 66 Anderson-PT-12-LTLFireability-14
[[35mlola[0m][I] time limit : 1873 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 11 (type EXCL) for Anderson-PT-12-LTLFireability-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 85
[[35mlola[0m][I] fired transitions : 85
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 5/234 1/5 Anderson-PT-12-LTLFireability-14 2326 m, -24767 m/sec, 2700 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1732 secs. Pages in use: 455
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 10/234 1/5 Anderson-PT-12-LTLFireability-14 4703 m, 475 m/sec, 5426 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1737 secs. Pages in use: 456
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 15/234 1/5 Anderson-PT-12-LTLFireability-14 7039 m, 467 m/sec, 8095 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1742 secs. Pages in use: 458
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 20/234 1/5 Anderson-PT-12-LTLFireability-14 9427 m, 477 m/sec, 10797 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1747 secs. Pages in use: 459
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 25/234 1/5 Anderson-PT-12-LTLFireability-14 11796 m, 473 m/sec, 13485 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1752 secs. Pages in use: 461
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 30/234 1/5 Anderson-PT-12-LTLFireability-14 14169 m, 474 m/sec, 16146 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1757 secs. Pages in use: 463
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 35/234 1/5 Anderson-PT-12-LTLFireability-14 16526 m, 471 m/sec, 18771 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1762 secs. Pages in use: 465
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 40/234 1/5 Anderson-PT-12-LTLFireability-14 18871 m, 469 m/sec, 21474 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1767 secs. Pages in use: 466
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 45/234 1/5 Anderson-PT-12-LTLFireability-14 21226 m, 471 m/sec, 24113 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1772 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 50/234 1/5 Anderson-PT-12-LTLFireability-14 23571 m, 469 m/sec, 26782 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1777 secs. Pages in use: 469
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 55/234 1/5 Anderson-PT-12-LTLFireability-14 25890 m, 463 m/sec, 29416 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1782 secs. Pages in use: 470
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 60/234 1/5 Anderson-PT-12-LTLFireability-14 28201 m, 462 m/sec, 32046 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1787 secs. Pages in use: 472
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 65/234 1/5 Anderson-PT-12-LTLFireability-14 30565 m, 472 m/sec, 34735 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1792 secs. Pages in use: 473
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 70/234 1/5 Anderson-PT-12-LTLFireability-14 32898 m, 466 m/sec, 37435 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1797 secs. Pages in use: 474
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 75/234 1/5 Anderson-PT-12-LTLFireability-14 35268 m, 474 m/sec, 40099 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1802 secs. Pages in use: 476
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 80/234 1/5 Anderson-PT-12-LTLFireability-14 37597 m, 465 m/sec, 42790 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1807 secs. Pages in use: 477
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 85/234 1/5 Anderson-PT-12-LTLFireability-14 39958 m, 472 m/sec, 45522 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1812 secs. Pages in use: 478
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 90/234 1/5 Anderson-PT-12-LTLFireability-14 42280 m, 464 m/sec, 48175 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1817 secs. Pages in use: 479
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 95/234 1/5 Anderson-PT-12-LTLFireability-14 44632 m, 470 m/sec, 50948 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1822 secs. Pages in use: 482
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 100/234 1/5 Anderson-PT-12-LTLFireability-14 46957 m, 465 m/sec, 53583 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1827 secs. Pages in use: 483
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 105/234 1/5 Anderson-PT-12-LTLFireability-14 49335 m, 475 m/sec, 56198 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1832 secs. Pages in use: 484
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 110/234 1/5 Anderson-PT-12-LTLFireability-14 51674 m, 467 m/sec, 58843 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1837 secs. Pages in use: 486
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 115/234 1/5 Anderson-PT-12-LTLFireability-14 53998 m, 464 m/sec, 61533 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1842 secs. Pages in use: 488
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 120/234 1/5 Anderson-PT-12-LTLFireability-14 56397 m, 479 m/sec, 64142 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1847 secs. Pages in use: 489
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 125/234 1/5 Anderson-PT-12-LTLFireability-14 58736 m, 467 m/sec, 66801 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1852 secs. Pages in use: 490
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 130/234 1/5 Anderson-PT-12-LTLFireability-14 61092 m, 471 m/sec, 69392 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1857 secs. Pages in use: 491
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 135/234 1/5 Anderson-PT-12-LTLFireability-14 63440 m, 469 m/sec, 72009 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1862 secs. Pages in use: 492
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 140/234 1/5 Anderson-PT-12-LTLFireability-14 65743 m, 460 m/sec, 74558 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1867 secs. Pages in use: 494
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 145/234 1/5 Anderson-PT-12-LTLFireability-14 68043 m, 460 m/sec, 77170 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1872 secs. Pages in use: 495
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 150/234 1/5 Anderson-PT-12-LTLFireability-14 70421 m, 475 m/sec, 79755 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1877 secs. Pages in use: 496
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 155/234 1/5 Anderson-PT-12-LTLFireability-14 72750 m, 465 m/sec, 82482 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1882 secs. Pages in use: 497
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 160/234 1/5 Anderson-PT-12-LTLFireability-14 75105 m, 471 m/sec, 85109 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1887 secs. Pages in use: 498
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 165/234 1/5 Anderson-PT-12-LTLFireability-14 77425 m, 464 m/sec, 87833 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1892 secs. Pages in use: 501
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 170/234 1/5 Anderson-PT-12-LTLFireability-14 79845 m, 484 m/sec, 90572 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1897 secs. Pages in use: 502
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 175/234 1/5 Anderson-PT-12-LTLFireability-14 82180 m, 467 m/sec, 93213 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1902 secs. Pages in use: 504
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 180/234 1/5 Anderson-PT-12-LTLFireability-14 84527 m, 469 m/sec, 95879 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1907 secs. Pages in use: 506
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 185/234 1/5 Anderson-PT-12-LTLFireability-14 86933 m, 481 m/sec, 98537 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1912 secs. Pages in use: 507
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 190/234 1/5 Anderson-PT-12-LTLFireability-14 89299 m, 473 m/sec, 101212 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1917 secs. Pages in use: 508
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 195/234 1/5 Anderson-PT-12-LTLFireability-14 91683 m, 476 m/sec, 103823 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1922 secs. Pages in use: 509
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 200/234 1/5 Anderson-PT-12-LTLFireability-14 94033 m, 470 m/sec, 106493 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1927 secs. Pages in use: 510
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 205/234 1/5 Anderson-PT-12-LTLFireability-14 96404 m, 474 m/sec, 109140 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1932 secs. Pages in use: 511
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 210/234 1/5 Anderson-PT-12-LTLFireability-14 98771 m, 473 m/sec, 111770 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1937 secs. Pages in use: 512
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 215/234 1/5 Anderson-PT-12-LTLFireability-14 101106 m, 467 m/sec, 114471 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1942 secs. Pages in use: 513
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 220/234 2/5 Anderson-PT-12-LTLFireability-14 103468 m, 472 m/sec, 117128 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1947 secs. Pages in use: 515
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 225/234 2/5 Anderson-PT-12-LTLFireability-14 105797 m, 465 m/sec, 119877 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1952 secs. Pages in use: 518
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 230/234 2/5 Anderson-PT-12-LTLFireability-14 108150 m, 470 m/sec, 122555 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1957 secs. Pages in use: 519
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 67 (type EXCL) for Anderson-PT-12-LTLFireability-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1962 secs. Pages in use: 520
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 45 (type EXCL) for 40 Anderson-PT-12-LTLFireability-08
[[35mlola[0m][I] time limit : 234 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 67 (type EXCL) for 66 Anderson-PT-12-LTLFireability-14
[[35mlola[0m][I] time limit : 1638 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 45 (type EXCL) for Anderson-PT-12-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 62
[[35mlola[0m][I] fired transitions : 63
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 5/273 1/5 Anderson-PT-12-LTLFireability-14 2072 m, -21215 m/sec, 2394 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1967 secs. Pages in use: 523
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 10/273 1/5 Anderson-PT-12-LTLFireability-14 4219 m, 429 m/sec, 4892 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1972 secs. Pages in use: 524
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 15/273 1/5 Anderson-PT-12-LTLFireability-14 6298 m, 415 m/sec, 7267 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1977 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 20/273 1/5 Anderson-PT-12-LTLFireability-14 8470 m, 434 m/sec, 9753 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1982 secs. Pages in use: 526
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 25/273 1/5 Anderson-PT-12-LTLFireability-14 10619 m, 429 m/sec, 12207 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1987 secs. Pages in use: 527
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 30/273 1/5 Anderson-PT-12-LTLFireability-14 12580 m, 392 m/sec, 14332 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1992 secs. Pages in use: 529
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 35/273 1/5 Anderson-PT-12-LTLFireability-14 14649 m, 413 m/sec, 16733 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1997 secs. Pages in use: 530
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 40/273 1/5 Anderson-PT-12-LTLFireability-14 16741 m, 418 m/sec, 19020 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2002 secs. Pages in use: 531
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 45/273 1/5 Anderson-PT-12-LTLFireability-14 18862 m, 424 m/sec, 21465 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2007 secs. Pages in use: 531
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 50/273 1/5 Anderson-PT-12-LTLFireability-14 21001 m, 427 m/sec, 23859 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2012 secs. Pages in use: 532
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 55/273 1/5 Anderson-PT-12-LTLFireability-14 23165 m, 432 m/sec, 26347 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2017 secs. Pages in use: 534
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 60/273 1/5 Anderson-PT-12-LTLFireability-14 25273 m, 421 m/sec, 28749 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2022 secs. Pages in use: 535
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 65/273 1/5 Anderson-PT-12-LTLFireability-14 27375 m, 420 m/sec, 31153 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2027 secs. Pages in use: 536
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 70/273 1/5 Anderson-PT-12-LTLFireability-14 29462 m, 417 m/sec, 33538 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2032 secs. Pages in use: 537
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 75/273 1/5 Anderson-PT-12-LTLFireability-14 31530 m, 413 m/sec, 35902 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2037 secs. Pages in use: 538
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 80/273 1/5 Anderson-PT-12-LTLFireability-14 33622 m, 418 m/sec, 38281 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2042 secs. Pages in use: 539
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 85/273 1/5 Anderson-PT-12-LTLFireability-14 35704 m, 416 m/sec, 40607 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2047 secs. Pages in use: 540
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 90/273 1/5 Anderson-PT-12-LTLFireability-14 37775 m, 414 m/sec, 42999 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2052 secs. Pages in use: 541
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 95/273 1/5 Anderson-PT-12-LTLFireability-14 39855 m, 416 m/sec, 45413 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2057 secs. Pages in use: 543
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 100/273 1/5 Anderson-PT-12-LTLFireability-14 41918 m, 412 m/sec, 47784 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2062 secs. Pages in use: 544
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 105/273 1/5 Anderson-PT-12-LTLFireability-14 43978 m, 412 m/sec, 50130 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2067 secs. Pages in use: 545
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 110/273 1/5 Anderson-PT-12-LTLFireability-14 46015 m, 407 m/sec, 52520 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2072 secs. Pages in use: 546
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-05: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-07: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-12-LTLFireability-15: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-00: LTL 0 1 0 0 0 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-13: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-12-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 67 LTL EXCL 115/273 1/5 Anderson-PT-12-LTLFireability-14 48130 m, 423 m/sec, 54861 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2077 secs. Pages in use: 547
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-01: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-12-LTLFireability-04: CONJ false preprocessing[0m
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Anderson-PT-12"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is Anderson-PT-12, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r005-smll-171620119300380"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Anderson-PT-12.tgz
mv Anderson-PT-12 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;