About the Execution of LoLA for Anderson-PT-06
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 5149.392 | 3600000.00 | 734716.00 | 10200.70 | T??????????T???? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r005-smll-171620119100330.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is Anderson-PT-06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r005-smll-171620119100330
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 732K
-rw-r--r-- 1 mcc users 5.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 53K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.5K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K Apr 22 14:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Apr 22 14:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 12 15:37 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 133K Apr 12 15:37 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Apr 12 15:36 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 58K Apr 12 15:36 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 302K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Anderson-PT-06-CTLFireability-2024-00
FORMULA_NAME Anderson-PT-06-CTLFireability-2024-01
FORMULA_NAME Anderson-PT-06-CTLFireability-2024-02
FORMULA_NAME Anderson-PT-06-CTLFireability-2024-03
FORMULA_NAME Anderson-PT-06-CTLFireability-2024-04
FORMULA_NAME Anderson-PT-06-CTLFireability-2024-05
FORMULA_NAME Anderson-PT-06-CTLFireability-2024-06
FORMULA_NAME Anderson-PT-06-CTLFireability-2024-07
FORMULA_NAME Anderson-PT-06-CTLFireability-2024-08
FORMULA_NAME Anderson-PT-06-CTLFireability-2024-09
FORMULA_NAME Anderson-PT-06-CTLFireability-2024-10
FORMULA_NAME Anderson-PT-06-CTLFireability-2024-11
FORMULA_NAME Anderson-PT-06-CTLFireability-2023-12
FORMULA_NAME Anderson-PT-06-CTLFireability-2023-13
FORMULA_NAME Anderson-PT-06-CTLFireability-2023-14
FORMULA_NAME Anderson-PT-06-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717207304347
FORMULA Anderson-PT-06-CTLFireability-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Anderson-PT-06-CTLFireability-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 46 (type CNST) for 45 Anderson-PT-06-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 46 (type CNST) for Anderson-PT-06-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 66 (type EXCL) for 0 Anderson-PT-06-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 143 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 64 (type FNDP) for 0 Anderson-PT-06-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 65 (type EQUN) for 0 Anderson-PT-06-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 64 (type FNDP) for Anderson-PT-06-CTLFireability-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 65 (type EQUN) for Anderson-PT-06-CTLFireability-2024-00 (obsolete)
[[35mlola[0m][W] CANCELED task # 66 (type EXCL) for Anderson-PT-06-CTLFireability-2024-00 (obsolete)
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 16 Anderson-PT-06-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 163 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 70 (type EQUN) for 16 Anderson-PT-06-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 25 (type EXCL) for Anderson-PT-06-CTLFireability-2024-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 49
[[35mlola[0m][I] fired transitions : 49
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 67 (type EXCL) for 16 Anderson-PT-06-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 171 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 67 (type EXCL) for Anderson-PT-06-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 53
[[35mlola[0m][I] fired transitions : 53
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 70 (type EQUN) for Anderson-PT-06-CTLFireability-2024-04 (obsolete)
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 54 Anderson-PT-06-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 73 (type EQUN) for 57 Anderson-PT-06-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 65 (type EQUN) for Anderson-PT-06-CTLFireability-2024-00
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 70 (type EQUN) for Anderson-PT-06-CTLFireability-2024-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 73 (type EQUN) for Anderson-PT-06-CTLFireability-2023-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 74 (type FNDP) for 13 Anderson-PT-06-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 75 (type EQUN) for 13 Anderson-PT-06-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 75 (type EQUN) for Anderson-PT-06-CTLFireability-2024-03
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 74 (type FNDP) for Anderson-PT-06-CTLFireability-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 5/257 2/2000 Anderson-PT-06-CTLFireability-2023-14 296867 m, 59373 m/sec, 1598678 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 7 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 10/257 3/2000 Anderson-PT-06-CTLFireability-2023-14 606345 m, 61895 m/sec, 3421691 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 12 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 15/257 5/2000 Anderson-PT-06-CTLFireability-2023-14 897447 m, 58220 m/sec, 5209571 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 17 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 20/257 6/2000 Anderson-PT-06-CTLFireability-2023-14 1177685 m, 56047 m/sec, 6981454 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 22 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 25/257 7/2000 Anderson-PT-06-CTLFireability-2023-14 1447813 m, 54025 m/sec, 8733002 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 27 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 30/257 9/2000 Anderson-PT-06-CTLFireability-2023-14 1709985 m, 52434 m/sec, 10457877 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 32 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 35/257 10/2000 Anderson-PT-06-CTLFireability-2023-14 1968200 m, 51643 m/sec, 12179497 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 37 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 40/257 11/2000 Anderson-PT-06-CTLFireability-2023-14 2221600 m, 50680 m/sec, 13895571 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 42 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 45/257 12/2000 Anderson-PT-06-CTLFireability-2023-14 2469886 m, 49657 m/sec, 15594335 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 47 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 50/257 14/2000 Anderson-PT-06-CTLFireability-2023-14 2712732 m, 48569 m/sec, 17278882 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 52 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 55/257 15/2000 Anderson-PT-06-CTLFireability-2023-14 2951784 m, 47810 m/sec, 18956264 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 57 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 60/257 16/2000 Anderson-PT-06-CTLFireability-2023-14 3186668 m, 46976 m/sec, 20610934 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 62 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 65/257 17/2000 Anderson-PT-06-CTLFireability-2023-14 3418081 m, 46282 m/sec, 22246098 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 67 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 70/257 18/2000 Anderson-PT-06-CTLFireability-2023-14 3646263 m, 45636 m/sec, 23877287 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 72 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 75/257 19/2000 Anderson-PT-06-CTLFireability-2023-14 3870894 m, 44926 m/sec, 25503573 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 77 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 80/257 20/2000 Anderson-PT-06-CTLFireability-2023-14 4092360 m, 44293 m/sec, 27108859 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 82 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 85/257 21/2000 Anderson-PT-06-CTLFireability-2023-14 4312335 m, 43995 m/sec, 28711888 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 87 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 90/257 22/2000 Anderson-PT-06-CTLFireability-2023-14 4529483 m, 43429 m/sec, 30310391 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 92 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 95/257 23/2000 Anderson-PT-06-CTLFireability-2023-14 4745213 m, 43146 m/sec, 31903333 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 97 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 100/257 25/2000 Anderson-PT-06-CTLFireability-2023-14 4958636 m, 42684 m/sec, 33479817 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 102 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 105/257 26/2000 Anderson-PT-06-CTLFireability-2023-14 5169519 m, 42176 m/sec, 35049979 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 107 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 110/257 27/2000 Anderson-PT-06-CTLFireability-2023-14 5379606 m, 42017 m/sec, 36624778 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 112 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 115/257 28/2000 Anderson-PT-06-CTLFireability-2023-14 5587535 m, 41585 m/sec, 38194261 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 117 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 120/257 29/2000 Anderson-PT-06-CTLFireability-2023-14 5792897 m, 41072 m/sec, 39755315 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 122 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 125/257 30/2000 Anderson-PT-06-CTLFireability-2023-14 5997311 m, 40882 m/sec, 41311387 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 127 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 130/257 31/2000 Anderson-PT-06-CTLFireability-2023-14 6199874 m, 40512 m/sec, 42863444 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 132 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 135/257 32/2000 Anderson-PT-06-CTLFireability-2023-14 6399869 m, 39999 m/sec, 44411327 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 137 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 140/257 33/2000 Anderson-PT-06-CTLFireability-2023-14 6598609 m, 39748 m/sec, 45946986 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 142 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 145/257 34/2000 Anderson-PT-06-CTLFireability-2023-14 6796023 m, 39482 m/sec, 47486304 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 147 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 150/257 34/2000 Anderson-PT-06-CTLFireability-2023-14 6993055 m, 39406 m/sec, 49042231 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 152 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 155/257 35/2000 Anderson-PT-06-CTLFireability-2023-14 7188353 m, 39059 m/sec, 50585781 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 157 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 160/257 36/2000 Anderson-PT-06-CTLFireability-2023-14 7382273 m, 38784 m/sec, 52129199 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 162 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 165/257 37/2000 Anderson-PT-06-CTLFireability-2023-14 7574616 m, 38468 m/sec, 53686637 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 167 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 170/257 38/2000 Anderson-PT-06-CTLFireability-2023-14 7763874 m, 37851 m/sec, 55226340 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 172 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 175/257 39/2000 Anderson-PT-06-CTLFireability-2023-14 7950475 m, 37320 m/sec, 56765507 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 177 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 180/257 40/2000 Anderson-PT-06-CTLFireability-2023-14 8136399 m, 37184 m/sec, 58305695 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 182 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 185/257 41/2000 Anderson-PT-06-CTLFireability-2023-14 8320442 m, 36808 m/sec, 59831076 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 187 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 190/257 42/2000 Anderson-PT-06-CTLFireability-2023-14 8501628 m, 36237 m/sec, 61343482 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 192 secs. Pages in use: 42
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 195/257 43/2000 Anderson-PT-06-CTLFireability-2023-14 8681486 m, 35971 m/sec, 62868717 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 197 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 200/257 44/2000 Anderson-PT-06-CTLFireability-2023-14 8860030 m, 35708 m/sec, 64389439 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 202 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 205/257 44/2000 Anderson-PT-06-CTLFireability-2023-14 9036246 m, 35243 m/sec, 65899656 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 207 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 210/257 45/2000 Anderson-PT-06-CTLFireability-2023-14 9211404 m, 35031 m/sec, 67418043 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 212 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 215/257 46/2000 Anderson-PT-06-CTLFireability-2023-14 9383619 m, 34443 m/sec, 68944763 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 217 secs. Pages in use: 46
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 220/257 47/2000 Anderson-PT-06-CTLFireability-2023-14 9552740 m, 33824 m/sec, 70459692 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 222 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 225/257 48/2000 Anderson-PT-06-CTLFireability-2023-14 9724699 m, 34391 m/sec, 71996082 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 227 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 230/257 49/2000 Anderson-PT-06-CTLFireability-2023-14 9894318 m, 33923 m/sec, 73519963 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 232 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 235/257 50/2000 Anderson-PT-06-CTLFireability-2023-14 10061239 m, 33384 m/sec, 75039771 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 237 secs. Pages in use: 50
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 240/257 50/2000 Anderson-PT-06-CTLFireability-2023-14 10224792 m, 32710 m/sec, 76539106 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 242 secs. Pages in use: 50
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 245/257 51/2000 Anderson-PT-06-CTLFireability-2023-14 10387649 m, 32571 m/sec, 78054160 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 247 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 250/257 52/2000 Anderson-PT-06-CTLFireability-2023-14 10545824 m, 31635 m/sec, 79512844 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 252 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 255/257 53/2000 Anderson-PT-06-CTLFireability-2023-14 10697826 m, 30400 m/sec, 80944120 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 257 secs. Pages in use: 53
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 55 (type EXCL) for Anderson-PT-06-CTLFireability-2023-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-15: DISJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 262 secs. Pages in use: 53
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 71 (type EXCL) for 57 Anderson-PT-06-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 54 Anderson-PT-06-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 3338 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 71 (type EXCL) for Anderson-PT-06-CTLFireability-2023-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 10
[[35mlola[0m][I] fired transitions : 9
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 5/278 2/5 Anderson-PT-06-CTLFireability-2023-14 347607 m, -2070043 m/sec, 1891690 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 267 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 10/278 4/5 Anderson-PT-06-CTLFireability-2023-14 657719 m, 62022 m/sec, 3730669 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 272 secs. Pages in use: 57
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 CTL EXCL 15/278 5/5 Anderson-PT-06-CTLFireability-2023-14 950387 m, 58533 m/sec, 5542201 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 277 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 55 (type EXCL) for Anderson-PT-06-CTLFireability-2023-14 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-04: DISJ 0 1 0 0 6 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 282 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 51 Anderson-PT-06-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 301 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 52 (type EXCL) for Anderson-PT-06-CTLFireability-2023-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 49
[[35mlola[0m][I] fired transitions : 147
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 48 Anderson-PT-06-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 331 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 49 (type EXCL) for Anderson-PT-06-CTLFireability-2023-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 49
[[35mlola[0m][I] fired transitions : 254
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 Anderson-PT-06-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 368 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 43 (type EXCL) for Anderson-PT-06-CTLFireability-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 49
[[35mlola[0m][I] fired transitions : 49
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 40 (type EXCL) for 39 Anderson-PT-06-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 414 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 40 (type EXCL) for Anderson-PT-06-CTLFireability-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 19
[[35mlola[0m][I] fired transitions : 20
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 Anderson-PT-06-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 474 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for Anderson-PT-06-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 20365
[[35mlola[0m][I] fired transitions : 22615
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 Anderson-PT-06-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 553 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 34 (type EXCL) for Anderson-PT-06-CTLFireability-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 507
[[35mlola[0m][I] fired transitions : 649
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 Anderson-PT-06-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 663 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for Anderson-PT-06-CTLFireability-2024-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3256
[[35mlola[0m][I] fired transitions : 3728
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 28 (type EXCL) for 27 Anderson-PT-06-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 829 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 28 (type EXCL) for Anderson-PT-06-CTLFireability-2024-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 49
[[35mlola[0m][I] fired transitions : 49
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 21 (type EXCL) for 16 Anderson-PT-06-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 1106 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 21 (type EXCL) for Anderson-PT-06-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 6
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 8 (type EXCL) for 7 Anderson-PT-06-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 1659 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 5/1659 3/2000 Anderson-PT-06-CTLFireability-2024-01 449156 m, 89831 m/sec, 1704743 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 287 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 10/1659 5/2000 Anderson-PT-06-CTLFireability-2024-01 876512 m, 85471 m/sec, 3487108 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 292 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 15/1659 7/2000 Anderson-PT-06-CTLFireability-2024-01 1279089 m, 80515 m/sec, 5258247 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 297 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 20/1659 8/2000 Anderson-PT-06-CTLFireability-2024-01 1666858 m, 77553 m/sec, 7027219 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 302 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 25/1659 10/2000 Anderson-PT-06-CTLFireability-2024-01 2039939 m, 74616 m/sec, 8778289 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 307 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 30/1659 12/2000 Anderson-PT-06-CTLFireability-2024-01 2403592 m, 72730 m/sec, 10534541 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 312 secs. Pages in use: 65
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 35/1659 14/2000 Anderson-PT-06-CTLFireability-2024-01 2758654 m, 71012 m/sec, 12285807 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 317 secs. Pages in use: 67
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 40/1659 15/2000 Anderson-PT-06-CTLFireability-2024-01 3106609 m, 69591 m/sec, 14036152 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 322 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 45/1659 17/2000 Anderson-PT-06-CTLFireability-2024-01 3448034 m, 68285 m/sec, 15780245 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 327 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 50/1659 19/2000 Anderson-PT-06-CTLFireability-2024-01 3781864 m, 66766 m/sec, 17524354 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 332 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 55/1659 20/2000 Anderson-PT-06-CTLFireability-2024-01 4111789 m, 65985 m/sec, 19269621 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 337 secs. Pages in use: 73
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 60/1659 22/2000 Anderson-PT-06-CTLFireability-2024-01 4437848 m, 65211 m/sec, 21017535 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 342 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 65/1659 23/2000 Anderson-PT-06-CTLFireability-2024-01 4759019 m, 64234 m/sec, 22762931 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 347 secs. Pages in use: 76
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 70/1659 25/2000 Anderson-PT-06-CTLFireability-2024-01 5062476 m, 60691 m/sec, 24436722 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 352 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 75/1659 26/2000 Anderson-PT-06-CTLFireability-2024-01 5373432 m, 62191 m/sec, 26167328 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 357 secs. Pages in use: 79
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 80/1659 28/2000 Anderson-PT-06-CTLFireability-2024-01 5681226 m, 61558 m/sec, 27899205 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 362 secs. Pages in use: 81
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 85/1659 29/2000 Anderson-PT-06-CTLFireability-2024-01 5986814 m, 61117 m/sec, 29634778 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 367 secs. Pages in use: 82
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 90/1659 31/2000 Anderson-PT-06-CTLFireability-2024-01 6290046 m, 60646 m/sec, 31366412 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 372 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 95/1659 32/2000 Anderson-PT-06-CTLFireability-2024-01 6590504 m, 60091 m/sec, 33097994 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 377 secs. Pages in use: 85
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 100/1659 34/2000 Anderson-PT-06-CTLFireability-2024-01 6887707 m, 59440 m/sec, 34827047 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 382 secs. Pages in use: 87
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 105/1659 35/2000 Anderson-PT-06-CTLFireability-2024-01 7183522 m, 59163 m/sec, 36555171 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 387 secs. Pages in use: 88
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 110/1659 37/2000 Anderson-PT-06-CTLFireability-2024-01 7475576 m, 58410 m/sec, 38280675 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 392 secs. Pages in use: 90
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 115/1659 38/2000 Anderson-PT-06-CTLFireability-2024-01 7766613 m, 58207 m/sec, 40012209 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 397 secs. Pages in use: 91
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 120/1659 39/2000 Anderson-PT-06-CTLFireability-2024-01 8055640 m, 57805 m/sec, 41750366 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 402 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 125/1659 41/2000 Anderson-PT-06-CTLFireability-2024-01 8342697 m, 57411 m/sec, 43492185 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 407 secs. Pages in use: 94
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 130/1659 42/2000 Anderson-PT-06-CTLFireability-2024-01 8627964 m, 57053 m/sec, 45232456 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 412 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 135/1659 44/2000 Anderson-PT-06-CTLFireability-2024-01 8910791 m, 56565 m/sec, 46976807 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 417 secs. Pages in use: 97
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 140/1659 45/2000 Anderson-PT-06-CTLFireability-2024-01 9191919 m, 56225 m/sec, 48723791 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 422 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 145/1659 46/2000 Anderson-PT-06-CTLFireability-2024-01 9471147 m, 55845 m/sec, 50476307 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 427 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 150/1659 48/2000 Anderson-PT-06-CTLFireability-2024-01 9749308 m, 55632 m/sec, 52229012 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 432 secs. Pages in use: 101
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 155/1659 49/2000 Anderson-PT-06-CTLFireability-2024-01 10025315 m, 55201 m/sec, 53985307 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 437 secs. Pages in use: 102
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 160/1659 50/2000 Anderson-PT-06-CTLFireability-2024-01 10300392 m, 55015 m/sec, 55745116 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 442 secs. Pages in use: 103
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 165/1659 52/2000 Anderson-PT-06-CTLFireability-2024-01 10573495 m, 54620 m/sec, 57500314 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 447 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 170/1659 53/2000 Anderson-PT-06-CTLFireability-2024-01 10845828 m, 54466 m/sec, 59262439 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 452 secs. Pages in use: 106
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 175/1659 54/2000 Anderson-PT-06-CTLFireability-2024-01 11116184 m, 54071 m/sec, 61020629 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 457 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 180/1659 56/2000 Anderson-PT-06-CTLFireability-2024-01 11385430 m, 53849 m/sec, 62778261 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 462 secs. Pages in use: 109
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 185/1659 57/2000 Anderson-PT-06-CTLFireability-2024-01 11652045 m, 53323 m/sec, 64530245 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 467 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 190/1659 58/2000 Anderson-PT-06-CTLFireability-2024-01 11917444 m, 53079 m/sec, 66288767 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 472 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 195/1659 60/2000 Anderson-PT-06-CTLFireability-2024-01 12181852 m, 52881 m/sec, 68050257 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 477 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 200/1659 61/2000 Anderson-PT-06-CTLFireability-2024-01 12444194 m, 52468 m/sec, 69814395 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 482 secs. Pages in use: 114
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 205/1659 62/2000 Anderson-PT-06-CTLFireability-2024-01 12707732 m, 52707 m/sec, 71594565 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 487 secs. Pages in use: 115
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 210/1659 63/2000 Anderson-PT-06-CTLFireability-2024-01 12967770 m, 52007 m/sec, 73369601 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 492 secs. Pages in use: 116
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 215/1659 65/2000 Anderson-PT-06-CTLFireability-2024-01 13226917 m, 51829 m/sec, 75147625 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 497 secs. Pages in use: 118
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 220/1659 66/2000 Anderson-PT-06-CTLFireability-2024-01 13483726 m, 51361 m/sec, 76922615 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 502 secs. Pages in use: 119
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 225/1659 67/2000 Anderson-PT-06-CTLFireability-2024-01 13740782 m, 51411 m/sec, 78710589 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 507 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 230/1659 69/2000 Anderson-PT-06-CTLFireability-2024-01 13995468 m, 50937 m/sec, 80498042 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 512 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 235/1659 70/2000 Anderson-PT-06-CTLFireability-2024-01 14248921 m, 50690 m/sec, 82292108 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 517 secs. Pages in use: 123
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 240/1659 71/2000 Anderson-PT-06-CTLFireability-2024-01 14500852 m, 50386 m/sec, 84092229 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 522 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 245/1659 72/2000 Anderson-PT-06-CTLFireability-2024-01 14750194 m, 49868 m/sec, 85898936 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 527 secs. Pages in use: 125
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 250/1659 73/2000 Anderson-PT-06-CTLFireability-2024-01 14996360 m, 49233 m/sec, 87716242 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 532 secs. Pages in use: 126
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 255/1659 75/2000 Anderson-PT-06-CTLFireability-2024-01 15243162 m, 49360 m/sec, 89567164 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 537 secs. Pages in use: 128
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 260/1659 76/2000 Anderson-PT-06-CTLFireability-2024-01 15475197 m, 46407 m/sec, 91385671 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 542 secs. Pages in use: 129
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 265/1659 77/2000 Anderson-PT-06-CTLFireability-2024-01 15698583 m, 44677 m/sec, 93194072 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 547 secs. Pages in use: 130
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 270/1659 78/2000 Anderson-PT-06-CTLFireability-2024-01 15914483 m, 43180 m/sec, 94990477 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 552 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 275/1659 79/2000 Anderson-PT-06-CTLFireability-2024-01 16119532 m, 41009 m/sec, 96764008 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 557 secs. Pages in use: 132
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 280/1659 80/2000 Anderson-PT-06-CTLFireability-2024-01 16305985 m, 37290 m/sec, 98484556 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 562 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 285/1659 81/2000 Anderson-PT-06-CTLFireability-2024-01 16479053 m, 34613 m/sec, 100177386 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 567 secs. Pages in use: 134
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 290/1659 82/2000 Anderson-PT-06-CTLFireability-2024-01 16652053 m, 34600 m/sec, 101862642 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 572 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 295/1659 82/2000 Anderson-PT-06-CTLFireability-2024-01 16841506 m, 37890 m/sec, 103586828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 577 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 300/1659 83/2000 Anderson-PT-06-CTLFireability-2024-01 17026570 m, 37012 m/sec, 105304957 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 582 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 305/1659 84/2000 Anderson-PT-06-CTLFireability-2024-01 17208810 m, 36448 m/sec, 107017594 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 587 secs. Pages in use: 137
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 310/1659 85/2000 Anderson-PT-06-CTLFireability-2024-01 17395081 m, 37254 m/sec, 108738577 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 592 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 315/1659 86/2000 Anderson-PT-06-CTLFireability-2024-01 17570296 m, 35043 m/sec, 110437927 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 597 secs. Pages in use: 139
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 320/1659 87/2000 Anderson-PT-06-CTLFireability-2024-01 17731371 m, 32215 m/sec, 112108791 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 602 secs. Pages in use: 140
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 325/1659 87/2000 Anderson-PT-06-CTLFireability-2024-01 17866744 m, 27074 m/sec, 113726716 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 607 secs. Pages in use: 140
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 330/1659 88/2000 Anderson-PT-06-CTLFireability-2024-01 17977992 m, 22249 m/sec, 115298562 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 612 secs. Pages in use: 141
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 335/1659 88/2000 Anderson-PT-06-CTLFireability-2024-01 18066166 m, 17634 m/sec, 116841501 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 617 secs. Pages in use: 141
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 340/1659 89/2000 Anderson-PT-06-CTLFireability-2024-01 18133088 m, 13384 m/sec, 118356784 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 622 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 345/1659 89/2000 Anderson-PT-06-CTLFireability-2024-01 18177749 m, 8932 m/sec, 119842733 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 627 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 350/1659 89/2000 Anderson-PT-06-CTLFireability-2024-01 18200954 m, 4641 m/sec, 121303332 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 632 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 8 CTL EXCL 355/1659 89/2000 Anderson-PT-06-CTLFireability-2024-01 18206879 m, 1185 m/sec, 122769390 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 637 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 8 (type EXCL) for Anderson-PT-06-CTLFireability-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 18206917
[[35mlola[0m][I] fired transitions : 123014213
[[35mlola[0m][I] time used : 356
[[35mlola[0m][I] memory pages used : 89
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 Anderson-PT-06-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 2962 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 4/2962 4/2000 Anderson-PT-06-CTLFireability-2024-02 671341 m, 134268 m/sec, 1543547 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 642 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 9/2962 7/2000 Anderson-PT-06-CTLFireability-2024-02 1320178 m, 129767 m/sec, 3711553 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 647 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 14/2962 9/2000 Anderson-PT-06-CTLFireability-2024-02 1859250 m, 107814 m/sec, 5915773 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 652 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 19/2962 12/2000 Anderson-PT-06-CTLFireability-2024-02 2328183 m, 93786 m/sec, 8248081 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 657 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 24/2962 13/2000 Anderson-PT-06-CTLFireability-2024-02 2707683 m, 75900 m/sec, 10611727 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 662 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 29/2962 15/2000 Anderson-PT-06-CTLFireability-2024-02 3021502 m, 62763 m/sec, 12866888 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 667 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 34/2962 16/2000 Anderson-PT-06-CTLFireability-2024-02 3253767 m, 46453 m/sec, 14997215 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 672 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 39/2962 17/2000 Anderson-PT-06-CTLFireability-2024-02 3353366 m, 19919 m/sec, 17085756 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 677 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 44/2962 17/2000 Anderson-PT-06-CTLFireability-2024-02 3353366 m, 0 m/sec, 19447092 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 682 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 49/2962 17/2000 Anderson-PT-06-CTLFireability-2024-02 3353366 m, 0 m/sec, 21798591 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 687 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 54/2962 17/2000 Anderson-PT-06-CTLFireability-2024-02 3353366 m, 0 m/sec, 24176323 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 692 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 59/2962 17/2000 Anderson-PT-06-CTLFireability-2024-02 3353366 m, 0 m/sec, 26654038 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 697 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 64/2962 17/2000 Anderson-PT-06-CTLFireability-2024-02 3353366 m, 0 m/sec, 29148318 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 702 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 69/2962 17/2000 Anderson-PT-06-CTLFireability-2024-02 3353366 m, 0 m/sec, 31540887 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 707 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 74/2962 17/2000 Anderson-PT-06-CTLFireability-2024-02 3353366 m, 0 m/sec, 33805223 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 712 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 79/2962 17/2000 Anderson-PT-06-CTLFireability-2024-02 3353366 m, 0 m/sec, 35902321 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 717 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 11 (type EXCL) for Anderson-PT-06-CTLFireability-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3353366
[[35mlola[0m][I] fired transitions : 35967470
[[35mlola[0m][I] time used : 79
[[35mlola[0m][I] memory pages used : 17
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 722 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 727 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 732 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 737 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 742 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 747 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 752 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 757 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 762 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 767 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 772 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 777 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 782 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 787 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 792 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 797 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 802 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 807 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 812 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 817 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 822 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 827 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 832 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 837 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 842 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 847 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 852 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 857 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 862 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 867 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 872 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 877 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 882 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 887 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 892 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 897 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 902 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 907 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 912 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 917 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 922 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 927 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 932 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 937 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 942 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 947 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 952 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 957 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 962 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 967 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 972 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 977 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 982 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 987 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 992 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 997 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1002 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1007 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1012 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1017 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1022 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1027 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1032 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1037 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1042 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1047 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1052 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1057 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1062 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1067 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1072 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1077 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1082 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1087 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1092 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1097 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1102 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1107 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1112 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1117 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1122 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1127 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1132 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1137 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1142 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1147 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1152 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1157 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1162 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1167 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1172 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1177 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1182 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1187 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1192 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1197 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1202 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1207 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1212 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1217 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1222 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1227 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1232 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1237 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1242 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1247 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1252 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1257 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1262 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1267 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1272 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1277 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1282 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1287 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1292 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1297 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1302 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1307 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1312 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1317 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1322 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1327 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1332 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1337 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1342 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1347 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1352 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1357 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1362 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1367 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1372 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1377 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1382 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1387 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1392 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1397 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1402 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1407 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1412 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1417 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1422 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1427 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1432 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1437 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1442 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1447 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1452 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1457 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1462 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1467 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1472 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1477 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1482 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1487 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1492 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1497 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1502 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1507 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1512 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1517 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1522 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1527 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1532 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1537 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1542 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1547 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1552 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1557 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1562 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1567 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1572 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1577 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1582 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1587 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1592 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1597 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1602 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1607 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1612 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1617 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1622 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1627 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1632 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1637 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1642 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1647 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1652 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1657 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1662 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1667 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1672 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1677 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1682 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1687 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1692 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1697 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1702 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1707 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1712 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1717 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1722 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1727 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1732 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1737 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1742 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1747 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1752 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1757 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1762 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1767 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1772 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1777 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1782 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1787 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1792 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1797 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1802 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1807 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1812 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1817 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1822 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1827 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1832 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1837 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1842 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1847 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1852 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1857 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1862 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1867 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1872 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1877 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1882 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1887 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1892 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1897 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1902 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1907 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1912 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1917 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1922 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1927 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1932 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1937 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1942 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1947 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1952 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1957 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1962 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1967 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1972 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1977 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1982 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1987 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1992 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1997 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2002 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2007 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2012 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2017 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2022 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2027 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2032 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2037 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2042 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2047 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2052 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2057 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2062 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2067 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2072 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2077 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2082 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2087 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-11: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2023-15: DISJ true state space /EXEF[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Anderson-PT-06-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2092 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-00: DISJ true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-03: EF true findpath[0m
[[35mlola[0m][.] [1m[32mAnderson-PT-06-CTLFireability-2024-04: DISJ true DISJ[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAnderson-PT-06-CTLFireability-2024-07: CTL false CTL model checker[0m
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Anderson-PT-06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is Anderson-PT-06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r005-smll-171620119100330"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Anderson-PT-06.tgz
mv Anderson-PT-06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;