About the Execution of LoLA for AirplaneLD-PT-0500
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16208.468 | 3247902.00 | 5560566.00 | 11472.70 | [undef] | Cannot compute |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r005-smll-171620119000282.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is AirplaneLD-PT-0500, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r005-smll-171620119000282
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 12M
-rw-r--r-- 1 mcc users 100K Apr 12 03:56 CTLCardinality.txt
-rw-r--r-- 1 mcc users 389K Apr 12 03:56 CTLCardinality.xml
-rw-r--r-- 1 mcc users 208K Apr 12 03:45 CTLFireability.txt
-rw-r--r-- 1 mcc users 1.2M Apr 12 03:45 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 220K Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 569K Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 112K Apr 22 14:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 470K Apr 22 14:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 630K Apr 12 04:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 2.1M Apr 12 04:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 512K Apr 12 04:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 3.0M Apr 12 04:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 25K Apr 22 14:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 47K Apr 22 14:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 2.2M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-00
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-01
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-02
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-03
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-04
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-05
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-06
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-07
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-08
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-09
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-10
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-11
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-12
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-13
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-14
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717187964504
BK_STOP 1717191212406
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 64 (type SKEL/SRCH) for 3 AirplaneLD-PT-0500-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 64 (type SKEL/SRCH) for AirplaneLD-PT-0500-CTLFireability-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[*** LOG ERROR #0001 ***] [2024-05-31 20:39:30] [status_logger] string pointer is null
[[35mlola[0m][I] LAUNCH task # 66 (type SKEL/FNDP) for 26 AirplaneLD-PT-0500-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 67 (type SKEL/EQUN) for 26 AirplaneLD-PT-0500-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 68 (type SKEL/SRCH) for 26 AirplaneLD-PT-0500-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 68 (type SKEL/SRCH) for AirplaneLD-PT-0500-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 66 (type FNDP) for AirplaneLD-PT-0500-CTLFireability-2024-06 (obsolete)
[[35mlola[0m][W] CANCELED task # 67 (type EQUN) for AirplaneLD-PT-0500-CTLFireability-2024-06 (obsolete)
[[35mlola[0m][I] FINISHED task # 66 (type SKEL/FNDP) for AirplaneLD-PT-0500-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 67 (type SKEL/EQUN) for AirplaneLD-PT-0500-CTLFireability-2024-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 71 (type EXCL) for 26 AirplaneLD-PT-0500-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 69 (type FNDP) for 26 AirplaneLD-PT-0500-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 70 (type EQUN) for 26 AirplaneLD-PT-0500-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 71 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 69 (type FNDP) for AirplaneLD-PT-0500-CTLFireability-2024-06 (obsolete)
[[35mlola[0m][W] CANCELED task # 70 (type EQUN) for AirplaneLD-PT-0500-CTLFireability-2024-06 (obsolete)
[[35mlola[0m][I] FINISHED task # 69 (type FNDP) for AirplaneLD-PT-0500-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 70 (type EQUN) for AirplaneLD-PT-0500-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 AirplaneLD-PT-0500-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 74 (type EQUN) for 49 AirplaneLD-PT-0500-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 74 (type EQUN) for AirplaneLD-PT-0500-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 5/199 2/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 89067 m, 17813 m/sec, 292850 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 10/199 3/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 198964 m, 21979 m/sec, 667227 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 15/199 4/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 301189 m, 20445 m/sec, 1014225 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 20/199 5/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 393966 m, 18555 m/sec, 1327538 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 25/199 6/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 487548 m, 18716 m/sec, 1644668 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 30/199 7/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 577653 m, 18021 m/sec, 1948512 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 35/199 8/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 662565 m, 16982 m/sec, 2237954 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 40/199 8/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 744488 m, 16384 m/sec, 2515722 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 45/199 9/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 823849 m, 15872 m/sec, 2783925 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 50/199 10/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 901314 m, 15493 m/sec, 3043204 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 55/199 11/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 974709 m, 14679 m/sec, 3294799 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 60/199 11/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 1047690 m, 14596 m/sec, 3542501 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 65/199 11/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 1121119 m, 14685 m/sec, 3791230 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 70/199 12/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 1194418 m, 14659 m/sec, 4039422 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 75/199 12/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 1267612 m, 14638 m/sec, 4287862 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 80/199 12/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 1341903 m, 14858 m/sec, 4536986 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 85/199 13/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 1416322 m, 14883 m/sec, 4786494 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 90/199 13/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 1488867 m, 14509 m/sec, 5036338 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 95/199 13/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 1562227 m, 14672 m/sec, 5286337 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 100/199 14/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 1636262 m, 14807 m/sec, 5535964 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 105/199 14/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 1709840 m, 14715 m/sec, 5785287 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 110/199 14/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 1784275 m, 14887 m/sec, 6034730 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 115/199 15/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 1862020 m, 15549 m/sec, 6288677 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 120/199 15/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 1942657 m, 16127 m/sec, 6543979 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 125/199 16/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 2023542 m, 16177 m/sec, 6799880 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 130/199 17/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 2104039 m, 16099 m/sec, 7054575 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 135/199 17/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 2184362 m, 16064 m/sec, 7309412 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 140/199 18/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 2264914 m, 16110 m/sec, 7563822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 145/199 18/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 2345684 m, 16154 m/sec, 7819524 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 150/199 19/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 2421347 m, 15132 m/sec, 8109617 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 155/199 20/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 2482861 m, 12302 m/sec, 8517923 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 160/199 21/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 2551658 m, 13759 m/sec, 8973593 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 165/199 21/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 2583453 m, 6359 m/sec, 9358849 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 170/199 22/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 2629815 m, 9272 m/sec, 9712528 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 175/199 23/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 2681013 m, 10239 m/sec, 10102830 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 190 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 180/199 23/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 2726938 m, 9185 m/sec, 10529658 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 195 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 185/199 24/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 2791310 m, 12874 m/sec, 10756722 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 200 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 190/199 24/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 2856121 m, 12962 m/sec, 10985126 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 205 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 195/199 25/2000 AirplaneLD-PT-0500-CTLFireability-2024-02 2920981 m, 12972 m/sec, 11213642 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 210 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 11 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-02 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 215 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 62 (type EXCL) for 61 AirplaneLD-PT-0500-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 AirplaneLD-PT-0500-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 3385 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 5/3385 2/5 AirplaneLD-PT-0500-CTLFireability-2024-02 105080 m, -563180 m/sec, 349442 t fired, .
[[35mlola[0m][.] 62 CTL EXCL 5/199 2/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 171219 m, 34243 m/sec, 407622 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 220 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 10/3385 3/5 AirplaneLD-PT-0500-CTLFireability-2024-02 217922 m, 22568 m/sec, 732005 t fired, .
[[35mlola[0m][.] 62 CTL EXCL 10/188 3/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 371243 m, 40004 m/sec, 884517 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 225 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 15/3385 4/5 AirplaneLD-PT-0500-CTLFireability-2024-02 325149 m, 21445 m/sec, 1092937 t fired, .
[[35mlola[0m][.] 62 CTL EXCL 15/188 4/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 570491 m, 39849 m/sec, 1360346 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 230 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 CTL EXCL 20/3385 5/5 AirplaneLD-PT-0500-CTLFireability-2024-02 425255 m, 20021 m/sec, 1434193 t fired, .
[[35mlola[0m][.] 62 CTL EXCL 20/188 6/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 769803 m, 39862 m/sec, 1836543 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 235 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 11 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-02 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 25/188 7/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 971664 m, 40372 m/sec, 2314350 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 240 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 30/199 9/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 1171849 m, 40037 m/sec, 2795904 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 245 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 35/199 11/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 1373459 m, 40322 m/sec, 3276891 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 250 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 40/199 12/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 1575812 m, 40470 m/sec, 3756520 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 255 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 45/199 14/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 1775831 m, 40003 m/sec, 4237473 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 260 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 50/199 16/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 1998992 m, 44632 m/sec, 4727945 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 265 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 55/199 19/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 2225967 m, 45395 m/sec, 5219067 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 270 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 60/199 21/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 2422981 m, 39402 m/sec, 5709513 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 275 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 65/199 22/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 2515454 m, 18494 m/sec, 6229454 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 280 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 70/199 23/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 2579218 m, 12752 m/sec, 6760430 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 285 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 75/199 24/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 2653947 m, 14945 m/sec, 7255688 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 290 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 80/199 25/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 2719344 m, 13079 m/sec, 7792584 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 295 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 85/199 26/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 2869229 m, 29977 m/sec, 8166558 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 300 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 90/199 28/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 3022831 m, 30720 m/sec, 8549996 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 305 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 95/199 29/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 3181848 m, 31803 m/sec, 8944837 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 310 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 100/199 31/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 3350182 m, 33666 m/sec, 9350653 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 315 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 105/199 33/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 3548581 m, 39679 m/sec, 9770648 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 320 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 110/199 35/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 3751215 m, 40526 m/sec, 10196751 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 325 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 115/199 36/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 3829680 m, 15693 m/sec, 10639452 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 120/199 37/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 3905037 m, 15071 m/sec, 11095869 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 125/199 38/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 3983204 m, 15633 m/sec, 11568824 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 130/199 39/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 4065009 m, 16361 m/sec, 12063371 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 135/199 40/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 4151116 m, 17221 m/sec, 12588740 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 140/199 41/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 4209966 m, 11770 m/sec, 13107481 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 145/199 42/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 4253976 m, 8802 m/sec, 13573898 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 42
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 150/199 43/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 4370459 m, 23296 m/sec, 14018065 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 155/199 44/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 4429626 m, 11833 m/sec, 14468849 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 62 CTL EXCL 160/199 44/2000 AirplaneLD-PT-0500-CTLFireability-2024-15 4497918 m, 13658 m/sec, 14988982 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 62 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4518018
[[35mlola[0m][I] fired transitions : 15293025
[[35mlola[0m][I] time used : 163
[[35mlola[0m][I] memory pages used : 45
[[35mlola[0m][I] LAUNCH task # 59 (type EXCL) for 58 AirplaneLD-PT-0500-CTLFireability-2024-14
[[35mlola[0m][I] time limit : 201 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 2/201 2/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 120084 m, 24016 m/sec, 120086 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 7/201 5/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 454026 m, 66788 m/sec, 454028 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 12/201 8/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 782906 m, 65776 m/sec, 783966 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 17/201 11/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 1105508 m, 64520 m/sec, 1107211 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 22/201 15/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 1425397 m, 63977 m/sec, 1427738 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 27/201 17/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 1733049 m, 61530 m/sec, 1736653 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 32/201 20/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 2036962 m, 60782 m/sec, 2040699 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 37/201 23/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 2342323 m, 61072 m/sec, 2346196 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 42/201 26/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 2651189 m, 61773 m/sec, 2655199 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 420 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 47/201 29/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 2963214 m, 62405 m/sec, 2967363 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 425 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 52/201 32/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 3281507 m, 63658 m/sec, 3285796 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 430 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 57/201 35/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 3587765 m, 61251 m/sec, 3592191 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 435 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 62/201 38/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 3891331 m, 60713 m/sec, 3900338 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 440 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 67/201 41/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 4175403 m, 56814 m/sec, 4185544 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 445 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 72/201 44/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 4485438 m, 62007 m/sec, 4496817 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 450 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 77/201 47/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 4774502 m, 57812 m/sec, 4787012 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 455 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 82/201 50/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 5072721 m, 59643 m/sec, 5085230 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 460 secs. Pages in use: 50
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 87/201 53/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 5376250 m, 60705 m/sec, 5389968 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 465 secs. Pages in use: 53
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 92/201 56/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 5661447 m, 57039 m/sec, 5675735 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 470 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 97/201 59/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 5969582 m, 61627 m/sec, 5984484 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 475 secs. Pages in use: 59
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 102/201 61/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 6243119 m, 54707 m/sec, 6259293 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 480 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 107/201 64/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 6511115 m, 53599 m/sec, 6527489 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 485 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 112/201 66/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 6782690 m, 54315 m/sec, 6799268 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 490 secs. Pages in use: 66
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 117/201 69/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 7062437 m, 55949 m/sec, 7079224 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 495 secs. Pages in use: 69
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 122/201 72/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 7361030 m, 59718 m/sec, 7378041 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 500 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 127/201 75/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 7660406 m, 59875 m/sec, 7677642 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 505 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 132/201 78/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 7980852 m, 64089 m/sec, 7998328 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 510 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 137/201 80/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 8262201 m, 56269 m/sec, 8284133 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 515 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 142/201 83/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 8551992 m, 57958 m/sec, 8575081 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 520 secs. Pages in use: 83
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 147/201 86/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 8856645 m, 60930 m/sec, 8881664 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 525 secs. Pages in use: 86
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 152/201 89/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 9142572 m, 57185 m/sec, 9167591 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 530 secs. Pages in use: 89
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 157/201 92/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 9448109 m, 61107 m/sec, 9473128 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 535 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 162/201 95/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 9742527 m, 58883 m/sec, 9768953 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 540 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 167/201 98/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 10034577 m, 58410 m/sec, 10061585 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 545 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 172/201 100/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 10339468 m, 60978 m/sec, 10368024 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 550 secs. Pages in use: 100
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 177/201 103/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 10604806 m, 53067 m/sec, 10633560 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 555 secs. Pages in use: 103
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 182/201 105/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 10872979 m, 53634 m/sec, 10901935 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 560 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 187/201 108/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 11145179 m, 54440 m/sec, 11174337 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 565 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 192/201 111/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 11431249 m, 57214 m/sec, 11460621 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 570 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 197/201 114/2000 AirplaneLD-PT-0500-CTLFireability-2024-14 11735084 m, 60767 m/sec, 11764685 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 575 secs. Pages in use: 114
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 59 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 580 secs. Pages in use: 116
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 53 (type EXCL) for 52 AirplaneLD-PT-0500-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 201 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 59 (type EXCL) for 58 AirplaneLD-PT-0500-CTLFireability-2024-14
[[35mlola[0m][I] time limit : 3020 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 53 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 6
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 59 CTL EXCL 5/201 3/5 AirplaneLD-PT-0500-CTLFireability-2024-14 305077 m, -2286001 m/sec, 305078 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 585 secs. Pages in use: 119
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 59 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-14 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 590 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 AirplaneLD-PT-0500-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 215 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2003
[[35mlola[0m][I] fired transitions : 2003
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 44 (type EXCL) for 43 AirplaneLD-PT-0500-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 231 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 44 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 40 AirplaneLD-PT-0500-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 250 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 5/250 1/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 104333 m, 20866 m/sec, 393718 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 595 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 10/250 2/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 221442 m, 23421 m/sec, 834127 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 600 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 15/250 3/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 337163 m, 23144 m/sec, 1273095 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 605 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 20/250 4/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 453061 m, 23179 m/sec, 1711645 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 610 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 25/250 4/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 569139 m, 23215 m/sec, 2149591 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 615 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 30/250 5/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 685020 m, 23176 m/sec, 2588685 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 620 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 35/250 6/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 800923 m, 23180 m/sec, 3026397 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 625 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 40/250 7/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 917332 m, 23281 m/sec, 3464198 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 630 secs. Pages in use: 123
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 45/250 8/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 1033064 m, 23146 m/sec, 3903408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 635 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 50/250 9/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 1148976 m, 23182 m/sec, 4340730 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 640 secs. Pages in use: 125
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 55/250 10/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 1264736 m, 23152 m/sec, 4779061 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 645 secs. Pages in use: 126
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 60/250 11/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 1380759 m, 23204 m/sec, 5217363 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 650 secs. Pages in use: 127
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 65/250 12/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 1496462 m, 23140 m/sec, 5655170 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 655 secs. Pages in use: 128
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 70/250 13/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 1612249 m, 23157 m/sec, 6092422 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 660 secs. Pages in use: 129
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 75/250 14/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 1728542 m, 23258 m/sec, 6530378 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 665 secs. Pages in use: 130
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 80/250 15/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 1847899 m, 23871 m/sec, 6978422 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 670 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 85/250 16/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 1974590 m, 25338 m/sec, 7443271 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 675 secs. Pages in use: 132
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 90/250 17/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 2101275 m, 25337 m/sec, 7907982 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 680 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 95/250 19/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 2228352 m, 25415 m/sec, 8373137 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 685 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 100/250 20/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 2354981 m, 25325 m/sec, 8838313 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 690 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 105/250 22/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 2490778 m, 27159 m/sec, 9308808 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 695 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 110/250 23/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 2614370 m, 24718 m/sec, 9761195 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 700 secs. Pages in use: 139
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 115/250 25/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 2722755 m, 21677 m/sec, 10192905 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 705 secs. Pages in use: 141
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 120/250 26/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 2814538 m, 18356 m/sec, 10545170 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 710 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 125/250 27/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 2908311 m, 18754 m/sec, 10902743 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 715 secs. Pages in use: 143
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 130/250 27/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 3002020 m, 18741 m/sec, 11264320 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 720 secs. Pages in use: 143
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 135/250 28/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 3097293 m, 19054 m/sec, 11629523 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 725 secs. Pages in use: 144
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 140/250 29/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 3194030 m, 19347 m/sec, 12000581 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 730 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 145/250 30/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 3292694 m, 19732 m/sec, 12377394 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 735 secs. Pages in use: 146
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 150/250 31/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 3394276 m, 20316 m/sec, 12762405 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 740 secs. Pages in use: 147
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 155/250 33/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 3497918 m, 20728 m/sec, 13153763 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 745 secs. Pages in use: 149
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 160/250 34/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 3601691 m, 20754 m/sec, 13547002 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 750 secs. Pages in use: 150
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 165/250 35/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 3706212 m, 20904 m/sec, 13942925 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 755 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 170/250 36/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 3812816 m, 21320 m/sec, 14345382 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 760 secs. Pages in use: 152
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 175/250 38/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 3921929 m, 21822 m/sec, 14756387 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 765 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 180/250 39/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 4031857 m, 21985 m/sec, 15172937 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 770 secs. Pages in use: 155
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 185/250 40/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 4143172 m, 22263 m/sec, 15593119 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 775 secs. Pages in use: 156
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 190/250 41/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 4234743 m, 18314 m/sec, 15949350 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 780 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 195/250 43/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 4340235 m, 21098 m/sec, 16371742 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 785 secs. Pages in use: 159
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 1 0 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 200/250 44/2000 AirplaneLD-PT-0500-CTLFireability-2024-08 4452206 m, 22394 m/sec, 16820067 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 790 secs. Pages in use: 160
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 41 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4518018
[[35mlola[0m][I] fired transitions : 17084579
[[35mlola[0m][I] time used : 203
[[35mlola[0m][I] memory pages used : 45
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 33 AirplaneLD-PT-0500-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 255 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 26 AirplaneLD-PT-0500-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 311 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 2/311 1/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 48862 m, 9772 m/sec, 152765 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 795 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 7/311 2/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 186502 m, 27528 m/sec, 585667 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 800 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 12/311 3/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 323277 m, 27355 m/sec, 1021096 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 805 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 17/311 4/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 460669 m, 27478 m/sec, 1456750 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 810 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 22/311 5/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 598196 m, 27505 m/sec, 1891477 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 815 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 27/311 6/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 736010 m, 27562 m/sec, 2325670 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 820 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 32/311 7/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 873244 m, 27446 m/sec, 2760290 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 825 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 37/311 8/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 1010017 m, 27354 m/sec, 3196116 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 830 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 42/311 9/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 1147658 m, 27528 m/sec, 3630695 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 835 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 47/311 10/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 1285326 m, 27533 m/sec, 4065290 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 840 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 52/311 11/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 1423338 m, 27602 m/sec, 4499443 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 845 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 57/311 12/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 1559831 m, 27298 m/sec, 4935976 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 850 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 62/311 13/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 1697427 m, 27519 m/sec, 5370895 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 855 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 67/311 15/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 1838683 m, 28251 m/sec, 5807197 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 860 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 72/311 16/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 1995173 m, 31298 m/sec, 6250459 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 865 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 77/311 18/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 2151780 m, 31321 m/sec, 6694073 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 870 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 82/311 20/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 2308467 m, 31337 m/sec, 7137927 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 875 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 87/311 21/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 2434196 m, 25145 m/sec, 7587697 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 880 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 92/311 22/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 2515703 m, 16301 m/sec, 8073434 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 885 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 97/311 23/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 2572060 m, 11271 m/sec, 8585836 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 890 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 102/311 24/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 2634160 m, 12420 m/sec, 9057874 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 895 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 107/311 25/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 2702410 m, 13650 m/sec, 9580224 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 900 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 112/311 25/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 2777256 m, 14969 m/sec, 10000990 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 905 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 117/311 26/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 2886581 m, 21865 m/sec, 10363766 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 910 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 122/311 27/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 2996280 m, 21939 m/sec, 10732890 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 915 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 127/311 29/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 3109357 m, 22615 m/sec, 11105577 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 920 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 132/311 30/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 3223432 m, 22815 m/sec, 11485860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 925 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 137/311 31/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 3342010 m, 23715 m/sec, 11871435 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 930 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 142/311 32/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 3475641 m, 26726 m/sec, 12254756 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 935 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 147/311 34/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 3609147 m, 26701 m/sec, 12641828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 940 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 152/311 35/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 3743899 m, 26950 m/sec, 13031392 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 945 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 157/311 36/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 3815034 m, 14227 m/sec, 13450286 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 950 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 162/311 37/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 3877766 m, 12546 m/sec, 13882427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 955 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 167/311 38/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 3942305 m, 12907 m/sec, 14323957 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 960 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 172/311 38/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 4008664 m, 13271 m/sec, 14778217 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 965 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 177/311 39/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 4077645 m, 13796 m/sec, 15247188 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 970 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 182/311 40/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 4149315 m, 14334 m/sec, 15740338 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 975 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 187/311 41/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 4208404 m, 11817 m/sec, 16246178 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 980 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 192/311 41/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 4233986 m, 5116 m/sec, 16734911 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 985 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 197/311 42/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 4322190 m, 17640 m/sec, 17145729 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 990 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 202/311 43/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 4391557 m, 13873 m/sec, 17569798 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 995 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 207/311 44/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 4444690 m, 10626 m/sec, 18027390 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1000 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 212/311 45/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 4504819 m, 12025 m/sec, 18546670 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1005 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 217/311 45/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 4579144 m, 14865 m/sec, 19010126 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1010 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 222/311 46/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 4696992 m, 23569 m/sec, 19400108 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1015 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 227/311 47/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 4815634 m, 23728 m/sec, 19789628 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1020 secs. Pages in use: 163
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 232/311 47/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 4934542 m, 23781 m/sec, 20180911 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1025 secs. Pages in use: 163
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 237/311 48/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 5053449 m, 23781 m/sec, 20572187 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1030 secs. Pages in use: 164
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 242/311 49/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 5172830 m, 23876 m/sec, 20965364 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1035 secs. Pages in use: 165
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 247/311 50/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 5292367 m, 23907 m/sec, 21359159 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1040 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 252/311 51/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 5411921 m, 23910 m/sec, 21753027 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1045 secs. Pages in use: 167
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 257/311 52/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 5531605 m, 23936 m/sec, 22148251 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1050 secs. Pages in use: 168
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 262/311 53/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 5652285 m, 24136 m/sec, 22542974 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1055 secs. Pages in use: 169
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 267/311 54/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 5772671 m, 24077 m/sec, 22939820 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1060 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 272/311 55/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 5892862 m, 24038 m/sec, 23335829 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1065 secs. Pages in use: 171
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 277/311 56/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 6013933 m, 24214 m/sec, 23732557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1070 secs. Pages in use: 172
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 282/311 57/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 6134746 m, 24162 m/sec, 24130703 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1075 secs. Pages in use: 173
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 287/311 58/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 6263086 m, 25668 m/sec, 24536787 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1080 secs. Pages in use: 174
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 292/311 60/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 6410730 m, 29528 m/sec, 24955026 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1085 secs. Pages in use: 176
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 297/311 61/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 6558144 m, 29482 m/sec, 25373488 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1090 secs. Pages in use: 177
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 302/311 63/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 6706482 m, 29667 m/sec, 25792066 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1095 secs. Pages in use: 179
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 307/311 64/2000 AirplaneLD-PT-0500-CTLFireability-2024-06 6837465 m, 26196 m/sec, 26210909 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1100 secs. Pages in use: 180
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 29 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-06 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 1 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1105 secs. Pages in use: 181
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 24 (type EXCL) for 19 AirplaneLD-PT-0500-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 311 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 26 AirplaneLD-PT-0500-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 2495 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 5/311 2/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 139748 m, 27949 m/sec, 139748 t fired, .
[[35mlola[0m][.] 29 CTL EXCL 5/2495 1/5 AirplaneLD-PT-0500-CTLFireability-2024-06 128898 m, -1341713 m/sec, 406047 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1110 secs. Pages in use: 185
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 10/311 3/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 285445 m, 29139 m/sec, 285444 t fired, .
[[35mlola[0m][.] 29 CTL EXCL 10/277 2/5 AirplaneLD-PT-0500-CTLFireability-2024-06 260019 m, 26224 m/sec, 818888 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1115 secs. Pages in use: 188
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 15/311 4/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 431957 m, 29302 m/sec, 431956 t fired, .
[[35mlola[0m][.] 29 CTL EXCL 15/277 3/5 AirplaneLD-PT-0500-CTLFireability-2024-06 389377 m, 25871 m/sec, 1230693 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1120 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 20/311 6/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 574720 m, 28552 m/sec, 574719 t fired, .
[[35mlola[0m][.] 29 CTL EXCL 20/277 4/5 AirplaneLD-PT-0500-CTLFireability-2024-06 518794 m, 25883 m/sec, 1639046 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1125 secs. Pages in use: 194
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 1 0 7 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 25/311 7/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 714402 m, 27936 m/sec, 714401 t fired, .
[[35mlola[0m][.] 29 CTL EXCL 25/277 5/5 AirplaneLD-PT-0500-CTLFireability-2024-06 650891 m, 26419 m/sec, 2058446 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1130 secs. Pages in use: 197
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 29 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-06 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 30/311 8/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 858109 m, 28741 m/sec, 859316 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1135 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 35/311 9/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 1004715 m, 29321 m/sec, 1006216 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1140 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 40/311 11/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 1152068 m, 29470 m/sec, 1153863 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1145 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 45/311 12/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 1298419 m, 29270 m/sec, 1300506 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1150 secs. Pages in use: 201
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 50/311 13/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 1441620 m, 28640 m/sec, 1443992 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1155 secs. Pages in use: 203
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 55/311 15/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 1581632 m, 28002 m/sec, 1585166 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1160 secs. Pages in use: 206
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 60/311 16/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 1717047 m, 27083 m/sec, 1720641 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1165 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 65/311 17/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 1853410 m, 27272 m/sec, 1857064 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1170 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 70/311 18/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 1990892 m, 27496 m/sec, 1994607 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1175 secs. Pages in use: 212
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 75/311 19/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 2128062 m, 27434 m/sec, 2131837 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1180 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 80/311 21/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 2265317 m, 27451 m/sec, 2269154 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1185 secs. Pages in use: 216
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 85/311 22/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 2403285 m, 27593 m/sec, 2407182 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1190 secs. Pages in use: 218
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 90/311 23/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 2543604 m, 28063 m/sec, 2547564 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1195 secs. Pages in use: 220
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 95/311 24/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 2684953 m, 28269 m/sec, 2688977 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1200 secs. Pages in use: 221
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 100/311 26/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 2825803 m, 28170 m/sec, 2829888 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1205 secs. Pages in use: 224
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 105/311 27/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 2967892 m, 28417 m/sec, 2972041 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1210 secs. Pages in use: 225
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 110/311 28/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 3110013 m, 28424 m/sec, 3114225 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1215 secs. Pages in use: 227
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 115/311 29/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 3254874 m, 28972 m/sec, 3259150 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1220 secs. Pages in use: 229
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 120/311 31/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 3385641 m, 26153 m/sec, 3389974 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1225 secs. Pages in use: 232
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 125/311 32/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 3534996 m, 29871 m/sec, 3539395 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1230 secs. Pages in use: 234
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 130/311 33/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 3682088 m, 29418 m/sec, 3686553 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1235 secs. Pages in use: 235
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 135/311 35/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 3820524 m, 27687 m/sec, 3829247 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1240 secs. Pages in use: 238
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 140/311 36/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 3951879 m, 26271 m/sec, 3961127 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1245 secs. Pages in use: 240
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 145/311 37/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 4083582 m, 26340 m/sec, 4093355 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1250 secs. Pages in use: 241
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 150/311 38/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 4219835 m, 27250 m/sec, 4230152 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1255 secs. Pages in use: 243
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 155/311 39/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 4361797 m, 28392 m/sec, 4372680 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1260 secs. Pages in use: 245
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 CTL EXCL 160/311 41/2000 AirplaneLD-PT-0500-CTLFireability-2024-05 4504761 m, 28592 m/sec, 4516215 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1265 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 24 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4518019
[[35mlola[0m][I] fired transitions : 4530526
[[35mlola[0m][I] time used : 160
[[35mlola[0m][I] memory pages used : 41
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 16 AirplaneLD-PT-0500-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 389 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 5/389 2/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 127767 m, 25553 m/sec, 162904 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1270 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 10/389 4/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 266861 m, 27818 m/sec, 342113 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1275 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 15/389 5/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 403147 m, 27257 m/sec, 516020 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1280 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 20/389 7/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 535584 m, 26487 m/sec, 686076 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1285 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 25/389 8/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 665100 m, 25903 m/sec, 850705 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1290 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 30/389 10/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 790900 m, 25160 m/sec, 1011616 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1295 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 35/389 11/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 913475 m, 24515 m/sec, 1167952 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1300 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 40/389 12/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 1030659 m, 23436 m/sec, 1317689 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1305 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 45/389 13/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 1144669 m, 22802 m/sec, 1463202 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1310 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 50/389 14/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 1256208 m, 22307 m/sec, 1606036 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1315 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 55/389 15/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 1365015 m, 21761 m/sec, 1746243 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1320 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 60/389 16/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 1472407 m, 21478 m/sec, 1882195 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1325 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 65/389 17/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 1577105 m, 20939 m/sec, 2016019 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1330 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 70/389 18/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 1679689 m, 20516 m/sec, 2147029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1335 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 75/389 19/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 1779554 m, 19973 m/sec, 2275550 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1340 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 80/389 20/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 1866481 m, 17385 m/sec, 2419594 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1345 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 85/389 20/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 1944885 m, 15680 m/sec, 2564009 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1350 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 90/389 20/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 2020015 m, 15026 m/sec, 2700958 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1355 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 95/389 21/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 2091739 m, 14344 m/sec, 2832308 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1360 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 100/389 21/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 2160354 m, 13723 m/sec, 2957947 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1365 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 105/389 22/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 2226579 m, 13245 m/sec, 3079309 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1370 secs. Pages in use: 250
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 110/389 22/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 2290574 m, 12799 m/sec, 3197073 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1375 secs. Pages in use: 251
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 115/389 22/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 2353065 m, 12498 m/sec, 3311113 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1380 secs. Pages in use: 252
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 120/389 23/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 2425413 m, 14469 m/sec, 3428031 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1385 secs. Pages in use: 254
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 125/389 24/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 2560708 m, 27059 m/sec, 3587027 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1390 secs. Pages in use: 256
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 130/389 25/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 2610425 m, 9943 m/sec, 3916061 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1395 secs. Pages in use: 259
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 135/389 26/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 2670362 m, 11987 m/sec, 4313135 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1400 secs. Pages in use: 261
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 140/389 26/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 2718607 m, 9649 m/sec, 4726036 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1405 secs. Pages in use: 261
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 145/389 27/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 2819824 m, 20243 m/sec, 4827372 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1410 secs. Pages in use: 263
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 150/389 28/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 2919170 m, 19869 m/sec, 4926837 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1415 secs. Pages in use: 264
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 155/389 28/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 3016822 m, 19530 m/sec, 5024600 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1420 secs. Pages in use: 265
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 160/389 29/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 3112696 m, 19174 m/sec, 5120587 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1425 secs. Pages in use: 267
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 165/389 29/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 3207164 m, 18893 m/sec, 5215165 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1430 secs. Pages in use: 268
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 170/389 30/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 3300205 m, 18608 m/sec, 5308313 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1435 secs. Pages in use: 269
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 175/389 30/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 3391731 m, 18305 m/sec, 5400187 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1440 secs. Pages in use: 270
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 180/389 31/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 3481618 m, 17977 m/sec, 5490114 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1445 secs. Pages in use: 271
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 185/389 31/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 3570329 m, 17742 m/sec, 5578863 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1450 secs. Pages in use: 272
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 190/389 32/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 3657880 m, 17510 m/sec, 5666454 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1455 secs. Pages in use: 274
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 195/389 32/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 3744402 m, 17304 m/sec, 5753014 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1460 secs. Pages in use: 275
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 200/389 33/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 3877419 m, 26603 m/sec, 5886089 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1465 secs. Pages in use: 276
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 205/389 35/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 4022591 m, 29034 m/sec, 6031327 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1470 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 210/389 37/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 4168853 m, 29252 m/sec, 6177654 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1475 secs. Pages in use: 282
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 215/389 38/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 4269053 m, 20040 m/sec, 6282089 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1480 secs. Pages in use: 283
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 220/389 38/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 4353303 m, 16850 m/sec, 6366676 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1485 secs. Pages in use: 284
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 225/389 39/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 4485411 m, 26421 m/sec, 6499309 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1490 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 230/389 41/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 4617500 m, 26417 m/sec, 6662627 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1495 secs. Pages in use: 289
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 235/389 42/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 4747074 m, 25914 m/sec, 6829841 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1500 secs. Pages in use: 291
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 240/389 44/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 4873442 m, 25273 m/sec, 6993841 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1505 secs. Pages in use: 294
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 245/389 45/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 4995966 m, 24504 m/sec, 7151496 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1510 secs. Pages in use: 296
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 250/389 46/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 5115465 m, 23899 m/sec, 7306121 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1515 secs. Pages in use: 298
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 255/389 47/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 5231444 m, 23195 m/sec, 7457221 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1520 secs. Pages in use: 300
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 260/389 49/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 5344825 m, 22676 m/sec, 7603224 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1525 secs. Pages in use: 303
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 265/389 50/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 5455056 m, 22046 m/sec, 7746073 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1530 secs. Pages in use: 305
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 270/389 51/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 5561364 m, 21261 m/sec, 7884991 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1535 secs. Pages in use: 307
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 275/389 52/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 5665810 m, 20889 m/sec, 8019545 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1540 secs. Pages in use: 309
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 280/389 52/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 5767052 m, 20248 m/sec, 8150895 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1545 secs. Pages in use: 311
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 285/389 53/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 5866227 m, 19835 m/sec, 8278691 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1550 secs. Pages in use: 313
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 290/389 54/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 5962822 m, 19319 m/sec, 8404371 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1555 secs. Pages in use: 316
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 295/389 55/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 6057528 m, 18941 m/sec, 8526677 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1560 secs. Pages in use: 318
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 300/389 56/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 6150058 m, 18506 m/sec, 8646806 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1565 secs. Pages in use: 320
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 305/389 57/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 6238262 m, 17640 m/sec, 8768105 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1570 secs. Pages in use: 321
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 310/389 57/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 6312683 m, 14884 m/sec, 8904770 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1575 secs. Pages in use: 322
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 315/389 57/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 6383885 m, 14240 m/sec, 9036019 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1580 secs. Pages in use: 323
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 320/389 58/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 6452408 m, 13704 m/sec, 9160614 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1585 secs. Pages in use: 324
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 325/389 58/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 6517923 m, 13103 m/sec, 9280556 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1590 secs. Pages in use: 325
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 330/389 59/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 6580703 m, 12556 m/sec, 9395531 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1595 secs. Pages in use: 327
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 335/389 59/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 6641675 m, 12194 m/sec, 9507394 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1600 secs. Pages in use: 328
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 340/389 59/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 6700968 m, 11858 m/sec, 9615902 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1605 secs. Pages in use: 329
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 345/389 59/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 6758684 m, 11543 m/sec, 9721757 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1610 secs. Pages in use: 330
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 350/389 60/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 6814797 m, 11222 m/sec, 9824717 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1615 secs. Pages in use: 332
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 355/389 61/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 6943354 m, 25711 m/sec, 9961180 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1620 secs. Pages in use: 334
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 360/389 62/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 7004050 m, 12139 m/sec, 10188703 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1625 secs. Pages in use: 337
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 365/389 62/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 7048655 m, 8921 m/sec, 10484083 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1630 secs. Pages in use: 338
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 370/389 63/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 7108256 m, 11920 m/sec, 10880155 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1635 secs. Pages in use: 339
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 375/389 63/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 7164116 m, 11172 m/sec, 11186798 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1640 secs. Pages in use: 340
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 380/389 64/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 7260198 m, 19216 m/sec, 11283020 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1645 secs. Pages in use: 341
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 385/389 64/2000 AirplaneLD-PT-0500-CTLFireability-2024-04 7354177 m, 18795 m/sec, 11377135 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1650 secs. Pages in use: 342
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 17 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-04 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1655 secs. Pages in use: 344
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL) for 13 AirplaneLD-PT-0500-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 389 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 16 AirplaneLD-PT-0500-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 1945 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 5/389 2/2000 AirplaneLD-PT-0500-CTLFireability-2024-03 197796 m, 39559 m/sec, 338641 t fired, .
[[35mlola[0m][.] 17 CTL EXCL 5/1945 2/5 AirplaneLD-PT-0500-CTLFireability-2024-04 130274 m, -1444780 m/sec, 167906 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1660 secs. Pages in use: 349
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 10/389 4/2000 AirplaneLD-PT-0500-CTLFireability-2024-03 406427 m, 41726 m/sec, 695352 t fired, .
[[35mlola[0m][.] 17 CTL EXCL 10/324 4/5 AirplaneLD-PT-0500-CTLFireability-2024-04 265795 m, 27104 m/sec, 341048 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1665 secs. Pages in use: 353
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 15/389 5/2000 AirplaneLD-PT-0500-CTLFireability-2024-03 610392 m, 40793 m/sec, 1045895 t fired, .
[[35mlola[0m][.] 17 CTL EXCL 15/324 5/5 AirplaneLD-PT-0500-CTLFireability-2024-04 398739 m, 26588 m/sec, 509550 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1670 secs. Pages in use: 355
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 17 (type EXCL) for AirplaneLD-PT-0500-CTLFireability-2024-04 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 20/389 6/2000 AirplaneLD-PT-0500-CTLFireability-2024-03 824844 m, 42890 m/sec, 1412846 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1675 secs. Pages in use: 356
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 25/389 8/2000 AirplaneLD-PT-0500-CTLFireability-2024-03 1044883 m, 44007 m/sec, 1788573 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1680 secs. Pages in use: 356
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 30/389 9/2000 AirplaneLD-PT-0500-CTLFireability-2024-03 1262894 m, 43602 m/sec, 2163396 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1685 secs. Pages in use: 357
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 35/389 11/2000 AirplaneLD-PT-0500-CTLFireability-2024-03 1482740 m, 43969 m/sec, 2528716 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1690 secs. Pages in use: 360
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 40/389 13/2000 AirplaneLD-PT-0500-CTLFireability-2024-03 1663239 m, 36099 m/sec, 2906541 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1695 secs. Pages in use: 362
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 45/389 15/2000 AirplaneLD-PT-0500-CTLFireability-2024-03 1733187 m, 13989 m/sec, 3379029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1700 secs. Pages in use: 365
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-06: CONJ 0 0 0 0 7 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-11: EU 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 14 CTL EXCL 50/389 17/2000 AirplaneLD-PT-0500-CTLFireability-2024-03 1903728 m, 34108 m/sec, 3711210 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1705 secs. Pages in use: 368
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-05: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-07: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-PT-0500-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-PT-0500-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-01: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-02: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] AirplaneLD-PT-0500-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-0500"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is AirplaneLD-PT-0500, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r005-smll-171620119000282"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-0500.tgz
mv AirplaneLD-PT-0500 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;