About the Execution of LoLA for AirplaneLD-COL-0500
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16106.144 | 44482.00 | 120982.00 | 369.00 | FF?F?T???F???TT? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r005-smll-171620118900209.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is AirplaneLD-COL-0500, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r005-smll-171620118900209
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 540K
-rw-r--r-- 1 mcc users 6.4K Apr 12 03:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 58K Apr 12 03:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Apr 12 03:43 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Apr 12 03:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 22 14:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 12 04:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 99K Apr 12 04:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 12 04:36 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 90K Apr 12 04:36 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 109K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-00
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-01
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-02
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-03
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-04
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-05
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-06
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-07
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-08
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-09
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-10
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-11
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-12
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-13
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-14
FORMULA_NAME AirplaneLD-COL-0500-CTLCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717169010324
FORMULA AirplaneLD-COL-0500-CTLCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0500-CTLCardinality-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0500-CTLCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0500-CTLCardinality-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0500-CTLCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0500-CTLCardinality-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0500-CTLCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717169054806
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 84 (type SKEL/EQUN) for 6 AirplaneLD-COL-0500-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 82 (type SKEL/SRCH) for 6 AirplaneLD-COL-0500-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 82 (type SKEL/SRCH) for AirplaneLD-COL-0500-CTLCardinality-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 9
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 84 (type EQUN) for AirplaneLD-COL-0500-CTLCardinality-2024-02 (obsolete)
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 86 (type SKEL/FNDP) for 21 AirplaneLD-COL-0500-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 87 (type SKEL/EQUN) for 21 AirplaneLD-COL-0500-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 88 (type SKEL/SRCH) for 21 AirplaneLD-COL-0500-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 88 (type SKEL/SRCH) for AirplaneLD-COL-0500-CTLCardinality-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 86 (type FNDP) for AirplaneLD-COL-0500-CTLCardinality-2024-03 (obsolete)
[[35mlola[0m][W] CANCELED task # 87 (type EQUN) for AirplaneLD-COL-0500-CTLCardinality-2024-03 (obsolete)
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 91 (type SKEL/FNDP) for 55 AirplaneLD-COL-0500-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 92 (type SKEL/EQUN) for 55 AirplaneLD-COL-0500-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 93 (type SKEL/SRCH) for 55 AirplaneLD-COL-0500-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 97 (type SKEL/EQUN) for 39 AirplaneLD-COL-0500-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 93 (type SKEL/SRCH) for AirplaneLD-COL-0500-CTLCardinality-2024-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 91 (type FNDP) for AirplaneLD-COL-0500-CTLCardinality-2024-13 (obsolete)
[[35mlola[0m][W] CANCELED task # 92 (type EQUN) for AirplaneLD-COL-0500-CTLCardinality-2024-13 (obsolete)
[[35mlola[0m][I] LAUNCH task # 95 (type SKEL/SRCH) for 39 AirplaneLD-COL-0500-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 95 (type SKEL/SRCH) for AirplaneLD-COL-0500-CTLCardinality-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 92
[[35mlola[0m][I] fired transitions : 238
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 97 (type EQUN) for AirplaneLD-COL-0500-CTLCardinality-2024-09 (obsolete)
[[35mlola[0m][I] Places: 3519, Transitions: 4008
[[35mlola[0m][I] FINISHED task # 97 (type SKEL/EQUN) for AirplaneLD-COL-0500-CTLCardinality-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 87 (type SKEL/EQUN) for AirplaneLD-COL-0500-CTLCardinality-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 92 (type SKEL/EQUN) for AirplaneLD-COL-0500-CTLCardinality-2024-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 84 (type SKEL/EQUN) for AirplaneLD-COL-0500-CTLCardinality-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-COL-0500-CTLCardinality-2024-03: EF false skeleton: state space[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-COL-0500-CTLCardinality-2024-09: EXEF false skeleton: state space /EXEF[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-COL-0500-CTLCardinality-2024-13: DISJ true skeleton: state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-02: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-11: DISJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-14: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-15: CONJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] findlow criterion satisfied
[[35mlola[0m][I] Time for checking findlow: 6
[[35mlola[0m][I] LAUNCH task # 99 (type SKEL/SRCH) for 66 AirplaneLD-COL-0500-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 101 (type SKEL/SRCH) for 6 AirplaneLD-COL-0500-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 101 (type SKEL/SRCH) for AirplaneLD-COL-0500-CTLCardinality-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 98 (type SKEL/SRCH) for 6 AirplaneLD-COL-0500-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 100 (type SKEL/SRCH) for 66 AirplaneLD-COL-0500-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 112 (type SKEL/EQUN) for 45 AirplaneLD-COL-0500-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-COL-0500-CTLCardinality-2024-03: EF false skeleton: state space[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-COL-0500-CTLCardinality-2024-09: EXEF false skeleton: state space /EXEF[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-COL-0500-CTLCardinality-2024-13: DISJ true skeleton: state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-02: CONJ 0 0 1 0 4 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-10: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-11: DISJ 0 1 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-14: CONJ 0 0 2 0 0 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-15: CONJ 2 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 98 LTL SRCH 0/1793 0/5 AirplaneLD-COL-0500-CTLCardinality-2024-02 --
[[35mlola[0m][.] 99 CTL SRCH 7/3586 0/5 AirplaneLD-COL-0500-CTLCardinality-2024-14 --
[[35mlola[0m][.] 100 CTL SRCH 0/3586 0/5 AirplaneLD-COL-0500-CTLCardinality-2024-14 --
[[35mlola[0m][.] 112 EF STEQ 0/1793 0/5 AirplaneLD-COL-0500-CTLCardinality-2024-11 --
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 14 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 4 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 100 (type SKEL/SRCH) for AirplaneLD-COL-0500-CTLCardinality-2024-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 81
[[35mlola[0m][I] fired transitions : 198
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 116 (type SKEL/EQUN) for 73 AirplaneLD-COL-0500-CTLCardinality-2024-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 98 (type SKEL/SRCH) for AirplaneLD-COL-0500-CTLCardinality-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 6
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 99 (type SKEL/SRCH) for AirplaneLD-COL-0500-CTLCardinality-2024-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 81
[[35mlola[0m][I] fired transitions : 198
[[35mlola[0m][I] time used : 7
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 AirplaneLD-COL-0500-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 109 (type SKEL/SRCH) for 73 AirplaneLD-COL-0500-CTLCardinality-2024-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for AirplaneLD-COL-0500-CTLCardinality-2024-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 4 (type CNST) for 3 AirplaneLD-COL-0500-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 109 (type SKEL/SRCH) for AirplaneLD-COL-0500-CTLCardinality-2024-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 116 (type EQUN) for AirplaneLD-COL-0500-CTLCardinality-2024-15 (obsolete)
[[35mlola[0m][I] LAUNCH task # 106 (type SKEL/SRCH) for 45 AirplaneLD-COL-0500-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 4 (type CNST) for AirplaneLD-COL-0500-CTLCardinality-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 28 (type CNST) for 27 AirplaneLD-COL-0500-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 37 (type CNST) for 36 AirplaneLD-COL-0500-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 28 (type CNST) for AirplaneLD-COL-0500-CTLCardinality-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 43 (type CNST) for 42 AirplaneLD-COL-0500-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 37 (type CNST) for AirplaneLD-COL-0500-CTLCardinality-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 43 (type CNST) for AirplaneLD-COL-0500-CTLCardinality-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 106 (type SKEL/SRCH) for AirplaneLD-COL-0500-CTLCardinality-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 6
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 116 (type SKEL/EQUN) for AirplaneLD-COL-0500-CTLCardinality-2024-15
[[35mlola[0m][I] result : unknown
[[35mlola[0m][W] CANCELED task # 112 (type EQUN) for AirplaneLD-COL-0500-CTLCardinality-2024-11 (obsolete)
[[35mlola[0m][I] FINISHED task # 112 (type SKEL/EQUN) for AirplaneLD-COL-0500-CTLCardinality-2024-11
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 78 (type CNST) for 73 AirplaneLD-COL-0500-CTLCardinality-2024-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 78 (type CNST) for AirplaneLD-COL-0500-CTLCardinality-2024-15
[[35mlola[0m][I] result : true
[*** LOG ERROR #0001 ***] [2024-05-31 15:23:45] [status_logger] string pointer is null
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 AirplaneLD-COL-0500-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 448 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 34 (type EXCL) for AirplaneLD-COL-0500-CTLCardinality-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2005
[[35mlola[0m][I] fired transitions : 2004
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 9 (type EXCL) for 6 AirplaneLD-COL-0500-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 511 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 9 (type EXCL) for AirplaneLD-COL-0500-CTLCardinality-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2005
[[35mlola[0m][I] fired transitions : 2004
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 6 AirplaneLD-COL-0500-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 597 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for AirplaneLD-COL-0500-CTLCardinality-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2005
[[35mlola[0m][I] fired transitions : 2004
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 AirplaneLD-COL-0500-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 716 sec
[[35mlola[0m][I] memory limit: 2000 pages
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[[35mlola[0m][.] 31 CTL EXCL 2/716 1/2000 AirplaneLD-COL-0500-CTLCardinality-2024-06 16140 m, 3228 m/sec, 37093 t fired, .
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[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-06: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 31 CTL EXCL 7/716 2/2000 AirplaneLD-COL-0500-CTLCardinality-2024-06 73464 m, 11464 m/sec, 170032 t fired, .
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[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0500-CTLCardinality-2024-11: DISJ 0 2 0 0 3 0 0 0
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[[35mlola[0m][.] 31 CTL EXCL 12/716 2/2000 AirplaneLD-COL-0500-CTLCardinality-2024-06 121427 m, 9592 m/sec, 286000 t fired, .
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[[35mlola[0m][.] 31 CTL EXCL 17/716 3/2000 AirplaneLD-COL-0500-CTLCardinality-2024-06 172551 m, 10224 m/sec, 406709 t fired, .
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[[35mlola[0m][.] 31 CTL EXCL 22/716 4/2000 AirplaneLD-COL-0500-CTLCardinality-2024-06 225544 m, 10598 m/sec, 532229 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 408 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-0500"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is AirplaneLD-COL-0500, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r005-smll-171620118900209"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-0500.tgz
mv AirplaneLD-COL-0500 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;