About the Execution of LoLA for AirplaneLD-COL-0100
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 6982.752 | 3600000.00 | 994341.00 | 11896.80 | [undef] | Time out reached |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r005-smll-171620118900193.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is AirplaneLD-COL-0100, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r005-smll-171620118900193
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 512K
-rw-r--r-- 1 mcc users 8.2K Apr 12 03:32 CTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Apr 12 03:32 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.4K Apr 12 03:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 35K Apr 12 03:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 12 03:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 114K Apr 12 03:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.5K Apr 12 03:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 80K Apr 12 03:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 52K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-00
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-01
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-02
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-03
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-04
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-05
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-06
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-07
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-08
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-09
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-10
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-11
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-12
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-13
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-14
FORMULA_NAME AirplaneLD-COL-0100-CTLCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717158952926
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] Places: 719, Transitions: 808
[[35mlola[0m][I] findlow criterion satisfied
[[35mlola[0m][I] Time for checking findlow: 1
[[35mlola[0m][I] LAUNCH task # 4 (type CNST) for 3 AirplaneLD-COL-0100-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 10 (type CNST) for 9 AirplaneLD-COL-0100-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 16 (type CNST) for 15 AirplaneLD-COL-0100-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 22 (type CNST) for 21 AirplaneLD-COL-0100-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 41 (type CNST) for 40 AirplaneLD-COL-0100-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 4 (type CNST) for AirplaneLD-COL-0100-CTLCardinality-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 44 (type CNST) for 43 AirplaneLD-COL-0100-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 44 (type CNST) for AirplaneLD-COL-0100-CTLCardinality-2024-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 22 (type CNST) for AirplaneLD-COL-0100-CTLCardinality-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 41 (type CNST) for AirplaneLD-COL-0100-CTLCardinality-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 10 (type CNST) for AirplaneLD-COL-0100-CTLCardinality-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 54 (type SKEL/SRCH) for 30 AirplaneLD-COL-0100-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 16 (type CNST) for AirplaneLD-COL-0100-CTLCardinality-2024-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 54 (type SKEL/SRCH) for AirplaneLD-COL-0100-CTLCardinality-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 6
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 33 (type EXCL) for 30 AirplaneLD-COL-0100-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 327 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 33 (type EXCL) for AirplaneLD-COL-0100-CTLCardinality-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 405
[[35mlola[0m][I] fired transitions : 404
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 30 AirplaneLD-COL-0100-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 35 (type EXCL) for AirplaneLD-COL-0100-CTLCardinality-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 AirplaneLD-COL-0100-CTLCardinality-2024-15
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
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[[35mlola[0m][.] AirplaneLD-COL-0100-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0100-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0100-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0100-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0100-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] 50 CTL EXCL 2/399 2/2000 AirplaneLD-COL-0100-CTLCardinality-2024-15 278324 m, 55664 m/sec, 284402 t fired, .
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[[35mlola[0m][.] AirplaneLD-COL-0100-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0100-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0100-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 7/399 7/2000 AirplaneLD-COL-0100-CTLCardinality-2024-15 1195467 m, 183428 m/sec, 1224632 t fired, .
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[[35mlola[0m][.] AirplaneLD-COL-0100-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] AirplaneLD-COL-0100-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0100-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0100-CTLCardinality-2024-14: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] 50 CTL EXCL 12/399 12/2000 AirplaneLD-COL-0100-CTLCardinality-2024-15 2113573 m, 183621 m/sec, 2165319 t fired, .
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[[35mlola[0m][.] 50 CTL EXCL 17/399 17/2000 AirplaneLD-COL-0100-CTLCardinality-2024-15 3075802 m, 192445 m/sec, 3151177 t fired, .
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[[35mlola[0m][.] 50 CTL EXCL 22/399 22/2000 AirplaneLD-COL-0100-CTLCardinality-2024-15 4041922 m, 193224 m/sec, 4140806 t fired, .
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[[35mlola[0m][.] 50 CTL EXCL 162/399 166/2000 AirplaneLD-COL-0100-CTLCardinality-2024-15 31062268 m, 192648 m/sec, 31828854 t fired, .
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[[35mlola[0m][.] 50 CTL EXCL 167/399 171/2000 AirplaneLD-COL-0100-CTLCardinality-2024-15 32030812 m, 193708 m/sec, 32820688 t fired, .
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[[35mlola[0m][.] 50 CTL EXCL 172/399 176/2000 AirplaneLD-COL-0100-CTLCardinality-2024-15 32995374 m, 192912 m/sec, 33809233 t fired, .
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[[35mlola[0m][.] 50 CTL EXCL 177/399 181/2000 AirplaneLD-COL-0100-CTLCardinality-2024-15 33963735 m, 193672 m/sec, 34801703 t fired, .
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[[35mlola[0m][.] 50 CTL EXCL 182/399 186/2000 AirplaneLD-COL-0100-CTLCardinality-2024-15 34756122 m, 158477 m/sec, 35835510 t fired, .
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[[35mlola[0m][.] 1 CTL EXCL 369/1138 126/2000 AirplaneLD-COL-0100-CTLCardinality-2024-00 23700225 m, 62641 m/sec, 81062737 t fired, .
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[[35mlola[0m][.] 1 CTL EXCL 439/1138 150/2000 AirplaneLD-COL-0100-CTLCardinality-2024-00 28234581 m, 66662 m/sec, 96535931 t fired, .
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[[35mlola[0m][.] 1 CTL EXCL 444/1138 152/2000 AirplaneLD-COL-0100-CTLCardinality-2024-00 28548449 m, 62773 m/sec, 97650660 t fired, .
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[[35mlola[0m][.] 1 CTL EXCL 449/1138 154/2000 AirplaneLD-COL-0100-CTLCardinality-2024-00 28861166 m, 62543 m/sec, 98762888 t fired, .
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[[35mlola[0m][.] 1 CTL EXCL 454/1138 155/2000 AirplaneLD-COL-0100-CTLCardinality-2024-00 29172709 m, 62308 m/sec, 99872684 t fired, .
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[[35mlola[0m][.] 1 CTL EXCL 714/1138 186/2000 AirplaneLD-COL-0100-CTLCardinality-2024-00 34759926 m, 1288 m/sec, 141711260 t fired, .
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[[35mlola[0m][.] 1 CTL EXCL 779/1138 186/2000 AirplaneLD-COL-0100-CTLCardinality-2024-00 34858647 m, 1611 m/sec, 151980587 t fired, .
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[[35mlola[0m][.] 1 CTL EXCL 784/1138 186/2000 AirplaneLD-COL-0100-CTLCardinality-2024-00 34868176 m, 1905 m/sec, 152968324 t fired, .
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retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-0100"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is AirplaneLD-COL-0100, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r005-smll-171620118900193"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-0100.tgz
mv AirplaneLD-COL-0100 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;