About the Execution of LoLA for AirplaneLD-COL-0050
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 5305.044 | 37234.00 | 75099.00 | 177.10 | TFTTTFTTFFTTFFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r005-smll-171620118800185.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is AirplaneLD-COL-0050, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r005-smll-171620118800185
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 476K
-rw-r--r-- 1 mcc users 8.5K Apr 12 03:31 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K Apr 12 03:31 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Apr 12 03:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Apr 12 03:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 22 14:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.8K Apr 12 03:41 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 75K Apr 12 03:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Apr 12 03:38 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Apr 12 03:38 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 22 14:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 46K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-00
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-01
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-02
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-03
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-04
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-05
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-06
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-07
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-08
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-09
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-10
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-11
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-12
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-13
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-14
FORMULA_NAME AirplaneLD-COL-0050-CTLCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717158248920
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLCardinality-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m] [1m[31mAirplaneLD-COL-0050-CTLCardinality-2024-01: EU false skeleton: state space /EU[0m
[[35mlola[0m] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-02: CTL true preprocessing[0m
[[35mlola[0m] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-03: CTL true preprocessing[0m
[[35mlola[0m] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m] [1m[31mAirplaneLD-COL-0050-CTLCardinality-2024-05: CTL false LTL model checker[0m
[[35mlola[0m] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-06: CONJ true CONJ[0m
[[35mlola[0m] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-07: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mAirplaneLD-COL-0050-CTLCardinality-2024-08: DISJ false DISJ[0m
[[35mlola[0m] [1m[31mAirplaneLD-COL-0050-CTLCardinality-2024-09: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-10: DISJ true CTL model checker[0m
[[35mlola[0m] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-11: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mAirplaneLD-COL-0050-CTLCardinality-2024-12: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mAirplaneLD-COL-0050-CTLCardinality-2024-13: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mAirplaneLD-COL-0050-CTLCardinality-2024-14: EF false skeleton: state space[0m
[[35mlola[0m] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-15: CTL true preprocessing[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 36 secs. Pages in use: 19
BK_STOP 1717158286154
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] LAUNCH task # 67 (type SKEL/EQUN) for 3 AirplaneLD-COL-0050-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 65 (type SKEL/SRCH) for 3 AirplaneLD-COL-0050-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 65 (type SKEL/SRCH) for AirplaneLD-COL-0050-CTLCardinality-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 93
[[35mlola[0m][I] fired transitions : 239
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 67 (type EQUN) for AirplaneLD-COL-0050-CTLCardinality-2024-01 (obsolete)
[[35mlola[0m][I] LAUNCH task # 69 (type SKEL/FNDP) for 58 AirplaneLD-COL-0050-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 70 (type SKEL/EQUN) for 58 AirplaneLD-COL-0050-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 71 (type SKEL/SRCH) for 58 AirplaneLD-COL-0050-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 71 (type SKEL/SRCH) for AirplaneLD-COL-0050-CTLCardinality-2024-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 69 (type FNDP) for AirplaneLD-COL-0050-CTLCardinality-2024-14 (obsolete)
[[35mlola[0m][W] CANCELED task # 70 (type EQUN) for AirplaneLD-COL-0050-CTLCardinality-2024-14 (obsolete)
[[35mlola[0m][I] Places: 369, Transitions: 408
[[35mlola[0m][I] FINISHED task # 70 (type SKEL/EQUN) for AirplaneLD-COL-0050-CTLCardinality-2024-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 67 (type SKEL/EQUN) for AirplaneLD-COL-0050-CTLCardinality-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] findlow criterion satisfied
[[35mlola[0m][I] Time for checking findlow: 1
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 AirplaneLD-COL-0050-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 7 (type CNST) for 6 AirplaneLD-COL-0050-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 10 (type CNST) for 9 AirplaneLD-COL-0050-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 13 (type CNST) for 12 AirplaneLD-COL-0050-CTLCardinality-2024-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 23 (type CNST) for 18 AirplaneLD-COL-0050-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 31 (type CNST) for 28 AirplaneLD-COL-0050-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 35 (type CNST) for 28 AirplaneLD-COL-0050-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 62 (type CNST) for 61 AirplaneLD-COL-0050-CTLCardinality-2024-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 35 (type CNST) for AirplaneLD-COL-0050-CTLCardinality-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 10 (type CNST) for AirplaneLD-COL-0050-CTLCardinality-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 62 (type CNST) for AirplaneLD-COL-0050-CTLCardinality-2024-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for AirplaneLD-COL-0050-CTLCardinality-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 7 (type CNST) for AirplaneLD-COL-0050-CTLCardinality-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 13 (type CNST) for AirplaneLD-COL-0050-CTLCardinality-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 79 (type SKEL/EQUN) for 28 AirplaneLD-COL-0050-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 76 (type SKEL/SRCH) for 28 AirplaneLD-COL-0050-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 31 (type CNST) for AirplaneLD-COL-0050-CTLCardinality-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 23 (type CNST) for AirplaneLD-COL-0050-CTLCardinality-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][W] CANCELED task # 76 (type SRCH) for AirplaneLD-COL-0050-CTLCardinality-2024-08 (obsolete)
[[35mlola[0m][W] CANCELED task # 79 (type EQUN) for AirplaneLD-COL-0050-CTLCardinality-2024-08 (obsolete)
[[35mlola[0m][I] LAUNCH task # 74 (type SKEL/SRCH) for 42 AirplaneLD-COL-0050-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 74 (type SKEL/SRCH) for AirplaneLD-COL-0050-CTLCardinality-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 11
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[*** LOG ERROR #0001 ***] [2024-05-31 12:24:11] [status_logger] string pointer is null
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 AirplaneLD-COL-0050-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 449 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 79 (type SKEL/EQUN) for AirplaneLD-COL-0050-CTLCardinality-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 50 (type EXCL) for AirplaneLD-COL-0050-CTLCardinality-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 26
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 AirplaneLD-COL-0050-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 514 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-COL-0050-CTLCardinality-2024-01: EU false skeleton: state space /EU[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-02: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-03: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-COL-0050-CTLCardinality-2024-08: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-COL-0050-CTLCardinality-2024-14: EF false skeleton: state space[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-15: CTL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-COL-0050-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0050-CTLCardinality-2024-06: CONJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0050-CTLCardinality-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0050-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0050-CTLCardinality-2024-10: DISJ 0 1 0 0 2 0 0 1
[[35mlola[0m][.] AirplaneLD-COL-0050-CTLCardinality-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0050-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 26 CTL EXCL 3/514 2/2000 AirplaneLD-COL-0050-CTLCardinality-2024-07 337133 m, 67426 m/sec, 773561 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-00: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-COL-0050-CTLCardinality-2024-01: EU false skeleton: state space /EU[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-02: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-03: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-04: CTL true preprocessing[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-COL-0050-CTLCardinality-2024-08: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mAirplaneLD-COL-0050-CTLCardinality-2024-14: EF false skeleton: state space[0m
[[35mlola[0m][.] [1m[32mAirplaneLD-COL-0050-CTLCardinality-2024-15: CTL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] AirplaneLD-COL-0050-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0050-CTLCardinality-2024-06: CONJ 0 1 0 0 2 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0050-CTLCardinality-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0050-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] AirplaneLD-COL-0050-CTLCardinality-2024-10: DISJ 0 1 0 0 2 0 0 1
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[[35mlola[0m][.] 26 CTL EXCL 23/514 17/2000 AirplaneLD-COL-0050-CTLCardinality-2024-07 3476774 m, 150769 m/sec, 8274863 t fired, .
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[[35mlola[0m][.] 26 CTL EXCL 33/514 19/2000 AirplaneLD-COL-0050-CTLCardinality-2024-07 3931372 m, 9079 m/sec, 11199621 t fired, .
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[[35mlola[0m][I] result : true
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[[35mlola[0m][I] LAUNCH task # 56 (type EXCL) for 55 AirplaneLD-COL-0050-CTLCardinality-2024-13
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[[35mlola[0m][I] FINISHED task # 56 (type EXCL) for AirplaneLD-COL-0050-CTLCardinality-2024-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
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[[35mlola[0m][I] LAUNCH task # 53 (type EXCL) for 52 AirplaneLD-COL-0050-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 712 sec
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[[35mlola[0m][I] FINISHED task # 53 (type EXCL) for AirplaneLD-COL-0050-CTLCardinality-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 42 AirplaneLD-COL-0050-CTLCardinality-2024-10
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[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for AirplaneLD-COL-0050-CTLCardinality-2024-10
[[35mlola[0m][I] result : true
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[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 40 (type EXCL) for 39 AirplaneLD-COL-0050-CTLCardinality-2024-09
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[[35mlola[0m][I] FINISHED task # 40 (type EXCL) for AirplaneLD-COL-0050-CTLCardinality-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 21 (type EXCL) for 18 AirplaneLD-COL-0050-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 1782 sec
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[[35mlola[0m][I] FINISHED task # 21 (type EXCL) for AirplaneLD-COL-0050-CTLCardinality-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 10
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 AirplaneLD-COL-0050-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 3564 sec
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[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for AirplaneLD-COL-0050-CTLCardinality-2024-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 11
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-0050"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is AirplaneLD-COL-0050, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r005-smll-171620118800185"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-0050.tgz
mv AirplaneLD-COL-0050 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;