About the Execution of LoLA for ARMCacheCoherence-PT-none
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 10328.312 | 3600000.00 | 686314.00 | 11655.10 | F????????????F?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r005-smll-171620118400004.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is ARMCacheCoherence-PT-none, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r005-smll-171620118400004
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 15M
-rw-r--r-- 1 mcc users 7.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 84K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 22 14:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 12 16:45 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 174K Apr 12 16:45 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.8K Apr 12 16:14 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 72K Apr 12 16:14 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:26 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:26 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 14M May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-00
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-01
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-02
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-03
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-04
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-05
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-06
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-07
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-08
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-09
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-10
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-11
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-12
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-13
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-14
FORMULA_NAME ARMCacheCoherence-PT-none-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717004687301
FORMULA ARMCacheCoherence-PT-none-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ARMCacheCoherence-PT-none-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 29 (type CNST) for 26 ARMCacheCoherence-PT-none-LTLFireability-06
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 29 (type CNST) for ARMCacheCoherence-PT-none-LTLFireability-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 33 ARMCacheCoherence-PT-none-LTLFireability-07
[[35mlola[0m][I] time limit : 119 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 73 (type FNDP) for 0 ARMCacheCoherence-PT-none-LTLFireability-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 74 (type EQUN) for 0 ARMCacheCoherence-PT-none-LTLFireability-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 73 (type FNDP) for ARMCacheCoherence-PT-none-LTLFireability-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 74 (type EQUN) for ARMCacheCoherence-PT-none-LTLFireability-00 (obsolete)
[[35mlola[0m][I] FINISHED task # 74 (type EQUN) for ARMCacheCoherence-PT-none-LTLFireability-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 77 (type FNDP) for 55 ARMCacheCoherence-PT-none-LTLFireability-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 78 (type EQUN) for 55 ARMCacheCoherence-PT-none-LTLFireability-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 78 (type EQUN) for ARMCacheCoherence-PT-none-LTLFireability-13
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 77 (type FNDP) for ARMCacheCoherence-PT-none-LTLFireability-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 88 (type EQUN) for 33 ARMCacheCoherence-PT-none-LTLFireability-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-07: CONJ 0 1 2 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 0 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 LTL EXCL 1/199 1/2000 ARMCacheCoherence-PT-none-LTLFireability-07 115795 m, 23159 m/sec, 316175 t fired, .
[[35mlola[0m][.] 88 EF STEQ 0/3593 0/5 ARMCacheCoherence-PT-none-LTLFireability-07 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 7 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 88 (type EQUN) for ARMCacheCoherence-PT-none-LTLFireability-07
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 376047
[[35mlola[0m][I] fired transitions : 1108445
[[35mlola[0m][I] time used : 3
[[35mlola[0m][I] memory pages used : 3
[[35mlola[0m][I] LAUNCH task # 67 (type EXCL) for 66 ARMCacheCoherence-PT-none-LTLFireability-14
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 67 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 21
[[35mlola[0m][I] fired transitions : 49
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 ARMCacheCoherence-PT-none-LTLFireability-10
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 3/276 3/2000 ARMCacheCoherence-PT-none-LTLFireability-10 317863 m, 63572 m/sec, 987710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 12 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 8/276 6/2000 ARMCacheCoherence-PT-none-LTLFireability-10 853359 m, 107099 m/sec, 3011426 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 17 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 13/276 9/2000 ARMCacheCoherence-PT-none-LTLFireability-10 1377844 m, 104897 m/sec, 5134049 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 22 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 18/276 13/2000 ARMCacheCoherence-PT-none-LTLFireability-10 1877445 m, 99920 m/sec, 7217745 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 27 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 23/276 16/2000 ARMCacheCoherence-PT-none-LTLFireability-10 2352306 m, 94972 m/sec, 9248793 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 32 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 28/276 19/2000 ARMCacheCoherence-PT-none-LTLFireability-10 2790552 m, 87649 m/sec, 11191109 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 37 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 33/276 22/2000 ARMCacheCoherence-PT-none-LTLFireability-10 3238872 m, 89664 m/sec, 13232100 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 42 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 38/276 24/2000 ARMCacheCoherence-PT-none-LTLFireability-10 3678437 m, 87913 m/sec, 15275084 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 47 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 43/276 27/2000 ARMCacheCoherence-PT-none-LTLFireability-10 4104108 m, 85134 m/sec, 17309974 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 52 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 48/276 30/2000 ARMCacheCoherence-PT-none-LTLFireability-10 4520185 m, 83215 m/sec, 19340325 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 57 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 53/276 32/2000 ARMCacheCoherence-PT-none-LTLFireability-10 4925810 m, 81125 m/sec, 21371654 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 62 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 58/276 35/2000 ARMCacheCoherence-PT-none-LTLFireability-10 5323366 m, 79511 m/sec, 23422934 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 67 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 63/276 38/2000 ARMCacheCoherence-PT-none-LTLFireability-10 5713422 m, 78011 m/sec, 25485331 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 72 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 68/276 40/2000 ARMCacheCoherence-PT-none-LTLFireability-10 6096683 m, 76652 m/sec, 27564738 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 77 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 73/276 42/2000 ARMCacheCoherence-PT-none-LTLFireability-10 6471161 m, 74895 m/sec, 29673227 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 82 secs. Pages in use: 42
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 78/276 45/2000 ARMCacheCoherence-PT-none-LTLFireability-10 6837163 m, 73200 m/sec, 31801011 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 87 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 83/276 47/2000 ARMCacheCoherence-PT-none-LTLFireability-10 7193985 m, 71364 m/sec, 34005883 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 92 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 88/276 49/2000 ARMCacheCoherence-PT-none-LTLFireability-10 7549095 m, 71022 m/sec, 36189831 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 97 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 93/276 52/2000 ARMCacheCoherence-PT-none-LTLFireability-10 7893743 m, 68929 m/sec, 38447433 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 102 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 98/276 54/2000 ARMCacheCoherence-PT-none-LTLFireability-10 8238413 m, 68934 m/sec, 40713258 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 107 secs. Pages in use: 54
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 103/276 56/2000 ARMCacheCoherence-PT-none-LTLFireability-10 8576390 m, 67595 m/sec, 43049405 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 112 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 108/276 58/2000 ARMCacheCoherence-PT-none-LTLFireability-10 8911989 m, 67119 m/sec, 45387479 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 117 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 113/276 60/2000 ARMCacheCoherence-PT-none-LTLFireability-10 9240464 m, 65695 m/sec, 47777295 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 122 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 118/276 63/2000 ARMCacheCoherence-PT-none-LTLFireability-10 9564443 m, 64795 m/sec, 50215342 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 127 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 123/276 65/2000 ARMCacheCoherence-PT-none-LTLFireability-10 9890963 m, 65304 m/sec, 52664445 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 132 secs. Pages in use: 65
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 128/276 67/2000 ARMCacheCoherence-PT-none-LTLFireability-10 10210454 m, 63898 m/sec, 55150670 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 137 secs. Pages in use: 67
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 133/276 69/2000 ARMCacheCoherence-PT-none-LTLFireability-10 10529407 m, 63790 m/sec, 57623736 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 142 secs. Pages in use: 69
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 138/276 71/2000 ARMCacheCoherence-PT-none-LTLFireability-10 10844107 m, 62940 m/sec, 60153982 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 147 secs. Pages in use: 71
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 143/276 73/2000 ARMCacheCoherence-PT-none-LTLFireability-10 11147714 m, 60721 m/sec, 62755430 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 152 secs. Pages in use: 73
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 148/276 75/2000 ARMCacheCoherence-PT-none-LTLFireability-10 11453645 m, 61186 m/sec, 65329136 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 157 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 153/276 77/2000 ARMCacheCoherence-PT-none-LTLFireability-10 11761701 m, 61611 m/sec, 67871393 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 162 secs. Pages in use: 77
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 158/276 79/2000 ARMCacheCoherence-PT-none-LTLFireability-10 12074077 m, 62475 m/sec, 70441784 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 167 secs. Pages in use: 79
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 163/276 81/2000 ARMCacheCoherence-PT-none-LTLFireability-10 12377310 m, 60646 m/sec, 73078901 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 172 secs. Pages in use: 81
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 168/276 83/2000 ARMCacheCoherence-PT-none-LTLFireability-10 12694119 m, 63361 m/sec, 75636761 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 177 secs. Pages in use: 83
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 173/276 85/2000 ARMCacheCoherence-PT-none-LTLFireability-10 13003116 m, 61799 m/sec, 78234777 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 182 secs. Pages in use: 85
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 178/276 87/2000 ARMCacheCoherence-PT-none-LTLFireability-10 13302140 m, 59804 m/sec, 80868048 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 187 secs. Pages in use: 87
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 183/276 89/2000 ARMCacheCoherence-PT-none-LTLFireability-10 13613452 m, 62262 m/sec, 83500791 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 192 secs. Pages in use: 89
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 188/276 91/2000 ARMCacheCoherence-PT-none-LTLFireability-10 13921046 m, 61518 m/sec, 86165758 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 197 secs. Pages in use: 91
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 193/276 93/2000 ARMCacheCoherence-PT-none-LTLFireability-10 14226154 m, 61021 m/sec, 88758428 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 202 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 198/276 95/2000 ARMCacheCoherence-PT-none-LTLFireability-10 14535174 m, 61804 m/sec, 91289051 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 207 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 203/276 97/2000 ARMCacheCoherence-PT-none-LTLFireability-10 14826968 m, 58358 m/sec, 93947371 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 212 secs. Pages in use: 97
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 208/276 99/2000 ARMCacheCoherence-PT-none-LTLFireability-10 15126870 m, 59980 m/sec, 96586662 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 217 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 213/276 101/2000 ARMCacheCoherence-PT-none-LTLFireability-10 15431161 m, 60858 m/sec, 99214624 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 222 secs. Pages in use: 101
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 218/276 103/2000 ARMCacheCoherence-PT-none-LTLFireability-10 15734738 m, 60715 m/sec, 101842383 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 227 secs. Pages in use: 103
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 223/276 105/2000 ARMCacheCoherence-PT-none-LTLFireability-10 16046123 m, 62277 m/sec, 104413747 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 232 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 228/276 107/2000 ARMCacheCoherence-PT-none-LTLFireability-10 16352183 m, 61212 m/sec, 107029017 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 237 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 233/276 109/2000 ARMCacheCoherence-PT-none-LTLFireability-10 16659852 m, 61533 m/sec, 109657252 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 242 secs. Pages in use: 109
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 238/276 111/2000 ARMCacheCoherence-PT-none-LTLFireability-10 16975562 m, 63142 m/sec, 112263334 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 247 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 243/276 113/2000 ARMCacheCoherence-PT-none-LTLFireability-10 17286268 m, 62141 m/sec, 114760076 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 252 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 248/276 115/2000 ARMCacheCoherence-PT-none-LTLFireability-10 17572755 m, 57297 m/sec, 117180744 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 257 secs. Pages in use: 115
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 253/276 116/2000 ARMCacheCoherence-PT-none-LTLFireability-10 17849933 m, 55435 m/sec, 119670210 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 262 secs. Pages in use: 116
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 258/276 118/2000 ARMCacheCoherence-PT-none-LTLFireability-10 18138800 m, 57773 m/sec, 122342263 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 267 secs. Pages in use: 118
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 263/276 120/2000 ARMCacheCoherence-PT-none-LTLFireability-10 18429848 m, 58209 m/sec, 124969164 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 272 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 268/276 122/2000 ARMCacheCoherence-PT-none-LTLFireability-10 18704731 m, 54976 m/sec, 127613667 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 277 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 273/276 124/2000 ARMCacheCoherence-PT-none-LTLFireability-10 18981205 m, 55294 m/sec, 130177130 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 282 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 47 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-10 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 287 secs. Pages in use: 126
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 44 (type EXCL) for 43 ARMCacheCoherence-PT-none-LTLFireability-09
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 ARMCacheCoherence-PT-none-LTLFireability-10
[[35mlola[0m][I] time limit : 3313 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 44 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 47 LTL EXCL 5/276 4/5 ARMCacheCoherence-PT-none-LTLFireability-10 582611 m, -3679718 m/sec, 1948061 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 292 secs. Pages in use: 130
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 47 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-10 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 297 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 40 ARMCacheCoherence-PT-none-LTLFireability-08
[[35mlola[0m][I] time limit : 300 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 41 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 24 (type EXCL) for 19 ARMCacheCoherence-PT-none-LTLFireability-05
[[35mlola[0m][I] time limit : 330 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 5/330 4/2000 ARMCacheCoherence-PT-none-LTLFireability-05 523762 m, 104752 m/sec, 1523983 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 302 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 10/330 7/2000 ARMCacheCoherence-PT-none-LTLFireability-05 1039951 m, 103237 m/sec, 3511522 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 307 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 15/330 10/2000 ARMCacheCoherence-PT-none-LTLFireability-05 1531146 m, 98239 m/sec, 5477630 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 312 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 20/330 14/2000 ARMCacheCoherence-PT-none-LTLFireability-05 2006598 m, 95090 m/sec, 7461417 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 317 secs. Pages in use: 140
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 25/330 17/2000 ARMCacheCoherence-PT-none-LTLFireability-05 2467743 m, 92229 m/sec, 9448472 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 322 secs. Pages in use: 143
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 30/330 20/2000 ARMCacheCoherence-PT-none-LTLFireability-05 2941189 m, 94689 m/sec, 11542609 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 327 secs. Pages in use: 146
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 35/330 22/2000 ARMCacheCoherence-PT-none-LTLFireability-05 3383993 m, 88560 m/sec, 13560120 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 332 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 40/330 25/2000 ARMCacheCoherence-PT-none-LTLFireability-05 3830966 m, 89394 m/sec, 15635812 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 337 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 45/330 28/2000 ARMCacheCoherence-PT-none-LTLFireability-05 4270452 m, 87897 m/sec, 17727679 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 342 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 50/330 31/2000 ARMCacheCoherence-PT-none-LTLFireability-05 4693710 m, 84651 m/sec, 19809075 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 347 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 55/330 34/2000 ARMCacheCoherence-PT-none-LTLFireability-05 5112717 m, 83801 m/sec, 21926246 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 352 secs. Pages in use: 160
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 60/330 36/2000 ARMCacheCoherence-PT-none-LTLFireability-05 5523196 m, 82095 m/sec, 24055523 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 357 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 65/330 39/2000 ARMCacheCoherence-PT-none-LTLFireability-05 5924412 m, 80243 m/sec, 26191456 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 362 secs. Pages in use: 165
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 70/330 42/2000 ARMCacheCoherence-PT-none-LTLFireability-05 6317355 m, 78588 m/sec, 28345419 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 367 secs. Pages in use: 168
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 75/330 44/2000 ARMCacheCoherence-PT-none-LTLFireability-05 6703025 m, 77134 m/sec, 30530235 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 372 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 80/330 46/2000 ARMCacheCoherence-PT-none-LTLFireability-05 7080311 m, 75457 m/sec, 32739673 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 377 secs. Pages in use: 172
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 85/330 49/2000 ARMCacheCoherence-PT-none-LTLFireability-05 7442416 m, 72421 m/sec, 35023629 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 382 secs. Pages in use: 175
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 90/330 51/2000 ARMCacheCoherence-PT-none-LTLFireability-05 7796682 m, 70853 m/sec, 37335500 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 387 secs. Pages in use: 177
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 95/330 53/2000 ARMCacheCoherence-PT-none-LTLFireability-05 8162699 m, 73203 m/sec, 39620403 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 392 secs. Pages in use: 179
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 100/330 56/2000 ARMCacheCoherence-PT-none-LTLFireability-05 8518533 m, 71166 m/sec, 41972612 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 397 secs. Pages in use: 182
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 105/330 58/2000 ARMCacheCoherence-PT-none-LTLFireability-05 8866620 m, 69617 m/sec, 44332339 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 402 secs. Pages in use: 184
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 110/330 60/2000 ARMCacheCoherence-PT-none-LTLFireability-05 9212273 m, 69130 m/sec, 46723327 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 407 secs. Pages in use: 186
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 115/330 62/2000 ARMCacheCoherence-PT-none-LTLFireability-05 9548105 m, 67166 m/sec, 49196143 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 412 secs. Pages in use: 188
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 120/330 65/2000 ARMCacheCoherence-PT-none-LTLFireability-05 9871023 m, 64583 m/sec, 51736732 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 417 secs. Pages in use: 191
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 125/330 67/2000 ARMCacheCoherence-PT-none-LTLFireability-05 10206766 m, 67148 m/sec, 54182732 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 422 secs. Pages in use: 193
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 130/330 69/2000 ARMCacheCoherence-PT-none-LTLFireability-05 10539911 m, 66629 m/sec, 56650044 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 427 secs. Pages in use: 195
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 135/330 71/2000 ARMCacheCoherence-PT-none-LTLFireability-05 10864832 m, 64984 m/sec, 59282208 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 432 secs. Pages in use: 197
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 140/330 73/2000 ARMCacheCoherence-PT-none-LTLFireability-05 11186877 m, 64409 m/sec, 61839419 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 437 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 145/330 75/2000 ARMCacheCoherence-PT-none-LTLFireability-05 11495613 m, 61747 m/sec, 64467569 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 442 secs. Pages in use: 201
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 150/330 77/2000 ARMCacheCoherence-PT-none-LTLFireability-05 11807132 m, 62303 m/sec, 67082278 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 447 secs. Pages in use: 203
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 155/330 79/2000 ARMCacheCoherence-PT-none-LTLFireability-05 12133709 m, 65315 m/sec, 69687295 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 452 secs. Pages in use: 205
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 160/330 81/2000 ARMCacheCoherence-PT-none-LTLFireability-05 12457341 m, 64726 m/sec, 72306719 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 457 secs. Pages in use: 207
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 165/330 83/2000 ARMCacheCoherence-PT-none-LTLFireability-05 12778643 m, 64260 m/sec, 74907817 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 462 secs. Pages in use: 209
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 170/330 85/2000 ARMCacheCoherence-PT-none-LTLFireability-05 13087267 m, 61724 m/sec, 77553027 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 467 secs. Pages in use: 211
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 175/330 87/2000 ARMCacheCoherence-PT-none-LTLFireability-05 13394711 m, 61488 m/sec, 80232403 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 472 secs. Pages in use: 213
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 180/330 89/2000 ARMCacheCoherence-PT-none-LTLFireability-05 13698930 m, 60843 m/sec, 82845439 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 477 secs. Pages in use: 215
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 185/330 91/2000 ARMCacheCoherence-PT-none-LTLFireability-05 13997078 m, 59629 m/sec, 85427711 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 482 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 190/330 93/2000 ARMCacheCoherence-PT-none-LTLFireability-05 14294887 m, 59561 m/sec, 87991578 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 487 secs. Pages in use: 219
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 195/330 95/2000 ARMCacheCoherence-PT-none-LTLFireability-05 14590864 m, 59195 m/sec, 90547832 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 492 secs. Pages in use: 221
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 200/330 97/2000 ARMCacheCoherence-PT-none-LTLFireability-05 14893527 m, 60532 m/sec, 93097478 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 497 secs. Pages in use: 223
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 205/330 99/2000 ARMCacheCoherence-PT-none-LTLFireability-05 15158594 m, 53013 m/sec, 95412320 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 502 secs. Pages in use: 225
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 210/330 101/2000 ARMCacheCoherence-PT-none-LTLFireability-05 15462933 m, 60867 m/sec, 98013563 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 507 secs. Pages in use: 227
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 215/330 103/2000 ARMCacheCoherence-PT-none-LTLFireability-05 15767064 m, 60826 m/sec, 100624006 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 512 secs. Pages in use: 229
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 220/330 105/2000 ARMCacheCoherence-PT-none-LTLFireability-05 16079575 m, 62502 m/sec, 103128130 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 517 secs. Pages in use: 231
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 225/330 107/2000 ARMCacheCoherence-PT-none-LTLFireability-05 16379170 m, 59919 m/sec, 105747528 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 522 secs. Pages in use: 233
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 230/330 109/2000 ARMCacheCoherence-PT-none-LTLFireability-05 16676949 m, 59555 m/sec, 108305366 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 527 secs. Pages in use: 235
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 235/330 111/2000 ARMCacheCoherence-PT-none-LTLFireability-05 16981039 m, 60818 m/sec, 110850281 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 532 secs. Pages in use: 237
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 240/330 113/2000 ARMCacheCoherence-PT-none-LTLFireability-05 17291495 m, 62091 m/sec, 113476568 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 537 secs. Pages in use: 239
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 245/330 115/2000 ARMCacheCoherence-PT-none-LTLFireability-05 17600891 m, 61879 m/sec, 116253021 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 542 secs. Pages in use: 241
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 250/330 117/2000 ARMCacheCoherence-PT-none-LTLFireability-05 17912326 m, 62287 m/sec, 118971613 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 547 secs. Pages in use: 243
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 255/330 119/2000 ARMCacheCoherence-PT-none-LTLFireability-05 18210669 m, 59668 m/sec, 121680171 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 552 secs. Pages in use: 245
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 260/330 121/2000 ARMCacheCoherence-PT-none-LTLFireability-05 18504758 m, 58817 m/sec, 124433256 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 557 secs. Pages in use: 247
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 265/330 122/2000 ARMCacheCoherence-PT-none-LTLFireability-05 18796445 m, 58337 m/sec, 127232474 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 562 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 270/330 124/2000 ARMCacheCoherence-PT-none-LTLFireability-05 19101910 m, 61093 m/sec, 129948328 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 567 secs. Pages in use: 250
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 275/330 126/2000 ARMCacheCoherence-PT-none-LTLFireability-05 19407425 m, 61103 m/sec, 132547036 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 572 secs. Pages in use: 252
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 280/330 128/2000 ARMCacheCoherence-PT-none-LTLFireability-05 19695726 m, 57660 m/sec, 135192699 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 577 secs. Pages in use: 254
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 285/330 130/2000 ARMCacheCoherence-PT-none-LTLFireability-05 19959869 m, 52828 m/sec, 137903990 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 582 secs. Pages in use: 256
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 290/330 132/2000 ARMCacheCoherence-PT-none-LTLFireability-05 20240606 m, 56147 m/sec, 140694056 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 587 secs. Pages in use: 258
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 295/330 133/2000 ARMCacheCoherence-PT-none-LTLFireability-05 20495031 m, 50885 m/sec, 143478741 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 592 secs. Pages in use: 259
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 300/330 135/2000 ARMCacheCoherence-PT-none-LTLFireability-05 20776648 m, 56323 m/sec, 146283283 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 597 secs. Pages in use: 261
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 305/330 137/2000 ARMCacheCoherence-PT-none-LTLFireability-05 21061207 m, 56911 m/sec, 149121437 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 602 secs. Pages in use: 263
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 310/330 139/2000 ARMCacheCoherence-PT-none-LTLFireability-05 21359236 m, 59605 m/sec, 151907016 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 607 secs. Pages in use: 265
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 315/330 141/2000 ARMCacheCoherence-PT-none-LTLFireability-05 21657153 m, 59583 m/sec, 154669769 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 612 secs. Pages in use: 267
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 320/330 143/2000 ARMCacheCoherence-PT-none-LTLFireability-05 21947973 m, 58164 m/sec, 157471954 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 617 secs. Pages in use: 269
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 325/330 144/2000 ARMCacheCoherence-PT-none-LTLFireability-05 22195367 m, 49478 m/sec, 160171884 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 622 secs. Pages in use: 270
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 330/330 146/2000 ARMCacheCoherence-PT-none-LTLFireability-05 22433389 m, 47604 m/sec, 162988095 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 627 secs. Pages in use: 272
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 24 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-05 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 1 0 0 2 1 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 632 secs. Pages in use: 274
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 19 ARMCacheCoherence-PT-none-LTLFireability-05
[[35mlola[0m][I] time limit : 329 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 24 (type EXCL) for 19 ARMCacheCoherence-PT-none-LTLFireability-05
[[35mlola[0m][I] time limit : 2968 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 24 LTL EXCL 5/329 5/5 ARMCacheCoherence-PT-none-LTLFireability-05 617174 m, -4363243 m/sec, 1863194 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 637 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 24 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-05 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-06: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 642 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL) for 13 ARMCacheCoherence-PT-none-LTLFireability-03
[[35mlola[0m][I] time limit : 369 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 14 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 70 (type EXCL) for 69 ARMCacheCoherence-PT-none-LTLFireability-15
[[35mlola[0m][I] time limit : 422 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 70 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 ARMCacheCoherence-PT-none-LTLFireability-11
[[35mlola[0m][I] time limit : 493 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 50 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 26 ARMCacheCoherence-PT-none-LTLFireability-06
[[35mlola[0m][I] time limit : 591 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 ARMCacheCoherence-PT-none-LTLFireability-02
[[35mlola[0m][I] time limit : 739 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 11 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 16 ARMCacheCoherence-PT-none-LTLFireability-04
[[35mlola[0m][I] time limit : 986 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 5/986 1/2000 ARMCacheCoherence-PT-none-LTLFireability-04 40646 m, 8129 m/sec, 135184 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 647 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 10/986 1/2000 ARMCacheCoherence-PT-none-LTLFireability-04 82977 m, 8466 m/sec, 291140 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 652 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 15/986 1/2000 ARMCacheCoherence-PT-none-LTLFireability-04 125497 m, 8504 m/sec, 449548 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 657 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 20/986 2/2000 ARMCacheCoherence-PT-none-LTLFireability-04 165138 m, 7928 m/sec, 599111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 662 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 LTL EXCL 25/986 2/2000 ARMCacheCoherence-PT-none-LTLFireability-04 206067 m, 8185 m/sec, 756042 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 667 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 17 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 235048
[[35mlola[0m][I] fired transitions : 865344
[[35mlola[0m][I] time used : 28
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 8 (type EXCL) for 7 ARMCacheCoherence-PT-none-LTLFireability-01
[[35mlola[0m][I] time limit : 1465 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 8 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 53 (type EXCL) for 52 ARMCacheCoherence-PT-none-LTLFireability-12
[[35mlola[0m][I] time limit : 2930 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 53 (type EXCL) for ARMCacheCoherence-PT-none-LTLFireability-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 672 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 677 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 682 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 687 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 692 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 697 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 702 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 707 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 712 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 717 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 722 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 727 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 732 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 737 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 742 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 747 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 752 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 757 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 762 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 767 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 772 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 777 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 782 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 787 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 792 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 797 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 802 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 807 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 812 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 817 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 822 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 827 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 832 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 837 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 842 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 847 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 852 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 857 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 862 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 867 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 872 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 877 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 882 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 887 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 892 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 897 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 902 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 907 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 912 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 917 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 922 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 927 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 932 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 937 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 942 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 947 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 952 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 957 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 962 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 967 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 972 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 977 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 982 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 987 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 992 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 997 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1002 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1007 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1012 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1017 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1022 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1027 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1032 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1037 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1042 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1047 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1052 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1057 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1062 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1067 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1072 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1077 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1082 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1087 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1092 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1097 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1102 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1107 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1112 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1117 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1122 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1127 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1132 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1137 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1142 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1147 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1152 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1157 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1162 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1167 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1172 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1177 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1182 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1187 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1192 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1197 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1202 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1207 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1212 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1217 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1222 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1227 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1232 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1237 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1242 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1247 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1252 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1257 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1262 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1267 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1272 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1277 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1282 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1287 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1292 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1297 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1302 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1307 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1312 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1317 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1322 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1327 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1332 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1337 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1342 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1347 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1352 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1357 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1362 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1367 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1372 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1377 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1382 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1387 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1392 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1397 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1402 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1407 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1412 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1417 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1422 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1427 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1432 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1437 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1442 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1447 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1452 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1457 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1462 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1467 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1472 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1477 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1482 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1487 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1492 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1497 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1502 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1507 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1512 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1517 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1522 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1527 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1532 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1537 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1542 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1547 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1552 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1557 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1562 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1567 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1572 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1577 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1582 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1587 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1592 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1597 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1602 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1607 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1612 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1617 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1622 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1627 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1632 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1637 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1642 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1647 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1652 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1657 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1662 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1667 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1672 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1677 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1682 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1687 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1692 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1697 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1702 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1707 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1712 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1717 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1722 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1727 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1732 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1737 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1742 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1747 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1752 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1757 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1762 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1767 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1772 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1777 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1782 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1787 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1792 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1797 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1802 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1807 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1812 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1817 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1822 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1827 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1832 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1837 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1842 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1847 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1852 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1857 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1862 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1867 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1872 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1877 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1882 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1887 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1892 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1897 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1902 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1907 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1912 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1917 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1922 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1927 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1932 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1937 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1942 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1947 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1952 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1957 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1962 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1967 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1972 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1977 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1982 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1987 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1992 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1997 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2002 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2007 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2012 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2017 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2022 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2027 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2032 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-14: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-05: CONJ 0 0 0 0 3 0 1 0
[[35mlola[0m][.] ARMCacheCoherence-PT-none-LTLFireability-10: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2037 secs. Pages in use: 279
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-00: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mARMCacheCoherence-PT-none-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mARMCacheCoherence-PT-none-LTLFireability-06: CONJ false LTL model checker[0m
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ARMCacheCoherence-PT-none"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is ARMCacheCoherence-PT-none, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r005-smll-171620118400004"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ARMCacheCoherence-PT-none.tgz
mv ARMCacheCoherence-PT-none execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;