Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r003-smll-171620117400299.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool greatspnxred
Input is AirplaneLD-PT-2000, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r003-smll-171620117400299
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 48M
-rw-r--r-- 1 mcc users 2.0M Apr 12 06:09 CTLCardinality.txt
-rw-r--r-- 1 mcc users 6.7M Apr 12 06:09 CTLCardinality.xml
-rw-r--r-- 1 mcc users 729K Apr 12 04:45 CTLFireability.txt
-rw-r--r-- 1 mcc users 3.9M Apr 12 04:45 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 382K Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 962K Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 382K Apr 22 14:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 1.5M Apr 22 14:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8M Apr 12 10:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 13M Apr 12 10:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 994K Apr 12 08:39 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 5.1M Apr 12 08:39 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 107K Apr 22 14:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 191K Apr 22 14:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 8.7M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-00
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-01
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-02
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-03
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-04
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-05
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-06
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-07
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-08
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-09
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-10
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-11
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-12
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-13
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-14
FORMULA_NAME AirplaneLD-PT-2000-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1716423650483

Invoking MCC driver with
BK_TOOL=greatspnxred
BK_EXAMINATION=LTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-PT-2000
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool greatspn
Invoking reducer
Running Version 202405141337
[2024-05-23 00:20:52] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -timeout, 360, -rebuildPNML]
[2024-05-23 00:20:52] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-23 00:20:54] [INFO ] Load time of PNML (sax parser for PT used): 1257 ms
[2024-05-23 00:20:54] [INFO ] Transformed 14019 places.
[2024-05-23 00:20:54] [INFO ] Transformed 16008 transitions.
[2024-05-23 00:20:54] [INFO ] Found NUPN structural information;
[2024-05-23 00:20:54] [INFO ] Parsed PT model containing 14019 places and 16008 transitions and 61028 arcs in 1591 ms.
Parsed 16 properties from file /home/mcc/execution/LTLCardinality.xml in 92 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 1 formulas.
Reduce places removed 6002 places and 0 transitions.
FORMULA AirplaneLD-PT-2000-LTLCardinality-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-2000-LTLCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-2000-LTLCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-2000-LTLCardinality-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-2000-LTLCardinality-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-2000-LTLCardinality-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-2000-LTLCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-2000-LTLCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Initial state reduction rules removed 1 formulas.
FORMULA AirplaneLD-PT-2000-LTLCardinality-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-2000-LTLCardinality-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 2008 out of 8017 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 8017/8017 places, 16008/16008 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8015 transition count 16008
Discarding 5995 places :
Symmetric choice reduction at 1 with 5995 rule applications. Total rules 5997 place count 2020 transition count 10013
Iterating global reduction 1 with 5995 rules applied. Total rules applied 11992 place count 2020 transition count 10013
Ensure Unique test removed 5995 transitions
Reduce isomorphic transitions removed 5995 transitions.
Iterating post reduction 1 with 5995 rules applied. Total rules applied 17987 place count 2020 transition count 4018
Applied a total of 17987 rules in 632 ms. Remains 2020 /8017 variables (removed 5997) and now considering 4018/16008 (removed 11990) transitions.
// Phase 1: matrix 4018 rows 2020 cols
[2024-05-23 00:20:56] [INFO ] Computed 2 invariants in 811 ms
[2024-05-23 00:20:57] [INFO ] Implicit Places using invariants in 1720 ms returned []
[2024-05-23 00:20:57] [INFO ] Invariant cache hit.
[2024-05-23 00:21:05] [INFO ] Implicit Places using invariants and state equation in 8367 ms returned []
Implicit Place search using SMT with State Equation took 10152 ms to find 0 implicit places.
Running 2009 sub problems to find dead transitions.
[2024-05-23 00:21:05] [INFO ] Invariant cache hit.
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 2014/6038 variables, and 0 constraints, problems are : Problem set: 0 solved, 2009 unsolved in 30116 ms.
Refiners :[Positive P Invariants (semi-flows): 0/2 constraints, State Equation: 0/2020 constraints, PredecessorRefiner: 2009/9 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 2009 unsolved
Error getting values : (error "ParserException while parsing response: ((s1 1)
(s2 1)
(s4 1)
(s5 1)
(s6 1)
(s7 1)
(s8 1)
(s9 1)
(s10 1)
(s11 1)
(s12 1)
(s13 1)
(s14 1)
(s15 1)
(s16 1)
(s17 1)
(s18 1)
(s19 1)
(s20 1)
(s21 1)
(s22 1)
(s23 1)
(s24 1)
(s25 1)
(s26 1)
(s27 1)
(s28 1)
(s29 1)
(s30 1)
(s31 1)
(s32 1)
(s33 1)
(s34 1)
(s35 1)
(s36 1)
(s37 1)
(s38 1)
(s39 1)
(s40 1)
(s41 1)
(s42 1)
(s43 1)
(s44 1)
(s45 1)
(s46 1)
(s47 1)
(s48 1)
(s49 1)
(s50 1)
(s51 1)
(s52 1)
(s53 1)
(s54 1)
(s55 1)
(s56 1)
(s57 1)
(s58 1)
(s59 1)
(s60 1)
(s61 1)
(s62 1)
(s63 1)
(s64 1)
(s65 1)
(s66 1)
(s67 1)
(s68 1)
(s69 1)
(s70 1)
(s71 1)
(s72 1)
(s73 1)
(s74 1)
(s75 1)
(s76 1)
(s77 1)
(s78 1)
(s79 1)
(s80 1)
(s81 1)
(s82 1)
(s83 1)
(s84 1)
(s85 1)
(s86 1)
(s87 1)
(s88 1)
(s89 1)
(s90 1)
(s91 1)
(s92 1)
(s93 1)
(s94 1)
(s95 1)
(s96 1)
(s97 1)
(s98 1)
(s99 1)
(s100 1)
(s101 1)
(s102 1)
(s103 1)
(s104 1)
(s105 1)
(s106 1)
(s107 1)
(s108 1)
(s109 1)
(s110 1)
(s111 1)
(s112 1)
(s113 1)
(s114 1)
(s115 1)
(s116 1)
(s117 1)
(s118 1)
(s119 1)
(s120 1)
(s121 1)
(s122 1)
(s123 1)
(s124 1)
(s125 1)
(s126 1)
(s127 1)
(s128 1)
(s129 1)
(s130 1)
(s131 1)
(s132 1)
(s133 1)
(s134 1)
(s135 1)
(s136 1)
(s137 1)
(s138 1)
(s139 1)
(s140 1)
(s141 1)
(s142 1)
(s143 1)
(s144 1)
(s145 1)
(s146 1)
(s147 1)
(s148 1)
(s149 1)
(s150 1)
(s151 1)
(s152 1)
(s153 1)
(s154 1)
(s155 1)
(s156 1)
(s157 1)
(s158 1)
(s159 1)
(s160 1)
(s161 1)
(s162 1)
(s163 1)
(s164 1)
(s165 1)
(s166 1)
(s167 1)
(s168 1)
(s169 1)
(s170 1)
(s171 1)
(s172 1)
(s173 1)
(s174 1)
(s175 1)
(s176 1)
(s177 1)
(s178 1)
(s179 1)
(s180 1)
(s181 1)
(s182 1)
(s183 1)
(s184 1)
(s185 1)
(s186 1)
(s187 1)
(s188 1)
(s189 1)
(s190 1)
(s191 1)
(s192 1)
(s193 1)
(s194 1)
(s195 1)
(s196 1)
(s197 1)
(s198 1)
(s199 1)
(s200 1)
(s201 1)
(s202 1)
(s203 1)
(s204 1)
(s205 1)
(s206 1)
(s207 1)
(s208 1)
(s209 1)
(s210 1)
(s211 1)
(s212 1)
(s213 1)
(s214 1)
(s215 1)
(s216 1)
(s217 1)
(s218 1)
(s219 1)
(s220 1)
(s221 1)
(s222 1)
(s223 1)
(s224 1)
(s225 1)
(s226 1)
(s227 1)
(s228 1)
(s229 1)
(s230 1)
(s231 1)
(s232 1)
(s233 1)
(s234 1)
(s235 1)
(s236 1)
(s237 1)
(s238 1)
(s239 1)
(s240 1)
(s241 1)
(s242 1)
(s243 1)
(s244 1)
(s245 1)
(s246 1)
(s247 1)
(s248 1)
(s249 1)
(s250 1)
(s251 1)
(s252 1)
(s253 1)
(s254 1)
(s255 1)
(s256 1)
(s257 1)
(s258 1)
(s259 1)
(s260 1)
(s261 1)
(s262 1)
(s263 1)
(s264 1)
(s265 1)
(s266 1)
(s267 1)
(s268 1)
(s269 1)
(s270 1)
(s271 1)
(s272 1)
(s273 1)
(s274 1)
(s275 1)
(s276 1)
(s277 1)
(s278 1)
(s279 1)
(s280 1)
(s281 1)
(s282 1)
(s283 1)
(s284 1)
(s285 1)
(s286 1)
(s287 1)
(s288 1)
(s289 1)
(s290 1)
(s291 1)
(s292 1)
(s293 1)
(s294 1)
(s295 1)
(s296 1)
(s297 1)
(s298 1)
(s299 1)
(s300 1)
(s301 1)
(s302 1)
(s303 1)
(s304 1)
(s305 1)
(s306 1)
(s307 1)
(s308 1)
(s309 1)
(s310 1)
(s311 1)
(s312 1)
(s313 1)
(s314 1)
(s315 1)
(s316 1)
(s317 1)
(s318 1)
(s319 1)
(s320 1)
(s321 1)
(s322 1)
(s323 1)
(s324 1)
(s325 1)
(s326 1)
(s327 1)
(s328 1)
(s329 1)
(s330 1)
(s331 1)
(s332 1)
(s333 1)
(s334 1)
(s335 1)
(s336 1)
(s337 1)
(s338 1)
(s339 1)
(s340 1)
(s341 1)
(s342 1)
(s343 1)
(s344 1)
(s345 1)
(s346 1)
(s347 1)
(s348 1)
(s349 1)
(s350 1)
(s351 1)
(s352 1)
(s353 1)
(s354 1)
(s355 1)
(s356 1)
(s357 1)
(s358 1)
(s359 1)
(s360 1)
(s361 1)
(s362 1)
(s363 1)
(s364 1)
(s365 1)
(s366 1)
(s367 1)
(s368 1)
(s369 1)
(s370 1)
(s371 1)
(s372 1)
(s373 1)
(s374 1)
(s375 1)
(s376 1)
(s377 1)
(s378 1)
(s379 1)
(s380 1)
(s381 1)
(s382 1)
(s383 1)
(s384 1)
(s385 1)
(s386 1)
(s387 1)
(s388 1)
(s389 1)
(s390 1)
(s391 1)
(s392 1)
(s393 1)
(s394 1)
(s395 1)
(s396 1)
(s397 1)
(s398 1)
(s399 1)
(s400 1)
(s401 1)
(s402 1)
(s403 1)
(s404 1)
(s405 1)
(s406 1)
(s407 1)
(s408 1)
(s409 1)
(s410 1)
(s411 1)
(s412 1)
(s413 1)
(s414 1)
(s415 1)
(s416 1)
(s417 1)
(s418 1)
(s419 1)
(s420 1)
(s421 1)
(s422 1)
(s423 1)
(s424 1)
(s425 1)
(s426 1)
(s427 1)
(s428 1)
(s429 1)
(s430 1)
(s431 1)
(s432 1)
(s433 1)
(s434 1)
(s435 1)
(s436 1)
(s437 1)
(s438 1)
(s439 1)
(s440 1)
(s441 1)
(s442 1)
(s443 1)
(s444 1)
(s445 1)
(s446 1)
(s447 1)
(s448 1)
(s449 1)
(s450 1)
(s451 1)
(s452 1)
(s453 1)
(s454 1)
(s455 1)
(s456 1)
(s457 1)
(s458 1)
(s459 1)
(s460 1)
(s461 1)
(s462 1)
(s463 1)
(s464 1)
(s465 1)
(s466 1)
(s467 1)
(s468 1)
(s469 1)
(s470 1)
(s471 1)
(s472 1)
(s473 1)
(s474 1)
(s475 1)
(s476 1)
(s477 1)
(s478 1)
(s479 1)
(s480 1)
(s481 1)
(s482 1)
(s483 1)
(s484 1)
(s485 1)
(s486 1)
(s487 1)
(s488 1)
(s489 1)
(s490 1)
(s491 1)
(s492 1)
(s493 1)
(s494 1)
(s495 1)
(s496 1)
(s497 1)
(s498 1)
(s499 1)
(s500 1)
(s501 1)
(s502 1)
(s503 1)
(s504 1)
(s505 1)
(s506 1)
(s507 1)
(s508 1)
(s509 1)
(s510 1)
(s511 1)
(s512 1)
(s513 1)
(s514 1)
(s515 1)
(s516 1)
(s517 1)
(s518 1)
(s519 1)
(s520 1)
(s521 1)
(s522 1)
(s523 1)
(s524 1)
(s525 1)
(s526 1)
(s527 1)
(s528 1)
(s529 1)
(s530 1)
(s531 1)
(s532 1)
(s533 1)
(s534 1)
(s535 1)
(s536 1)
(s537 1)
(s538 1)
(s539 1)
(s540 1)
(s541 1)
(s542 1)
(s543 1)
(s544 1)
(s545 1)
(s546 1)
(s547 1)
(s548 1)
(s549 1)
(s550 1)
(s551 1)
(s552 1)
(s553 1)
(s554 1)
(s555 1)
(s556 1)
(s557 1)
(s558 1)
(s559 1)
(s560 1)
(s561 1)
(s562 1)
(s563 1)
(s564 1)
(s565 1)
(s566 1)
(s567 1)
(s568 1)
(s569 1)
(s570 1)
(s571 1)
(s572 1)
(s573 1)
(s574 1)
(s575 1)
(s576 1)
(s577 1)
(s578 1)
(s579 1)
(s580 1)
(s581 1)
(s582 1)
(s583 1)
(s584 1)
(s585 1)
(s586 1)
(s587 1)
(s588 1)
(s589 1)
(s590 1)
(s591 1)
(s592 1)
(s593 1)
(s594 1)
(s595 1)
(s596 1)
(s597 1)
(s598 1)
(s599 1)
(s600 1)
(s601 1)
(s602 1)
(s603 1)
(s604 1)
(s605 1)
(s606 1)
(s607 1)
(s608 1)
(s609 1)
(s610 1)
(s611 1)
(s612 1)
(s613 1)
(s614 1)
(s615 1)
(s616 1)
(s617 1)
(s618 1)
(s619 1)
(s620 1)
(s621 1)
(s622 1)
(s623 1)
(s624 1)
(s625 1)
(s626 1)
(s627 1)
(s628 1)
(s629 1)
(s630 1)
(s631 1)
(s632 1)
(s633 1)
(s634 1)
(s635 1)
(s636 1)
(s637 1)
(s638 1)
(s639 1)
(s640 1)
(s641 1)
(s642 1)
(s643 1)
(s644 1)
(s645 1)
(s646 1)
(s647 1)
(s648 1)
(s649 1)
(s650 1)
(s651 1)
(s652 1)
(s653 1)
(s654 1)
(s655 1)
(s656 1)
(s657 1)
(s658 1)
(s659 1)
(s660 1)
(s661 1)
(s662 1)
(s663 1)
(s664 1)
(s665 1)
(s666 1)
(s667 1)
(s668 1)
(s669 1)
(s670 1)
(s671 1)
(s672 1)
(s673 1)
(s674 1)
(s675 1)
(s676 1)
(s677 1)
(s678 1)
(s679 1)
(s680 1)
(s681 1)
(s682 1)
(s683 1)
(s684 1)
(s685 1)
(s686 1)
(s687 1)
(s688 1)
(s689 1)
(s690 1)
(s691 1)
(s692 1)
(s693 1)
(s694 1)
(s695 1)
(s696 1)
(s697 1)
(s698 1)
(s699 1)
(s700 1)
(s701 1)
(s702 1)
(s703 1)
(s704 1)
(s705 1)
(s706 1)
(s707 1)
(s708 1)
(s709 1)
(s710 1)
(s711 1)
(s712 1)
(s713 1)
(s714 1)
(s715 1)
(s716 1)
(s717 1)
(s718 1)
(s719 1)
(s720 1)
(s721 1)
(s722 1)
(s723 1)
(s724 1)
(s725 1)
(s726 1)
(s727 1)
(s728 1)
(s729 1)
(s730 1)
(s731 1)
(s732 1)
(s733 1)
(s734 1)
(s735 1)
(s736 1)
(s737 1)
(s738 1)
(s739 1)
(s740 1)
(s741 1)
(s742 1)
(s743 1)
(s744 1)
(s745 1)
(s746 1)
(s747 1)
(s748 1)
(s749 1)
(s750 1)
(s751 1)
(s752 1)
(s753 1)
(s754 1)
(s755 1)
(s756 1)
(s757 1)
(s758 1)
(s759 1)
(s760 1)
(s761 1)
(s762 1)
(s763 1)
(s764 1)
(s765 1)
(s766 1)
(s767 1)
(s768 1)
(s769 1)
(s770 1)
(s771 1)
(s772 1)
(s773 1)
(s774 1)
(s775 1)
(s776 1)
(s777 1)
(s778 1)
(s779 1)
(s780 1)
(s781 1)
(s782 1)
(s783 1)
(s784 1)
(s785 1)
(s786 1)
(s787 1)
(s788 1)
(s789 1)
(s790 1)
(s791 1)
(s792 1)
(s793 1)
(s794 1)
(s795 1)
(s796 1)
(s797 1)
(s798 1)
(s799 1)
(s800 1)
(s801 1)
(s802 1)
(s803 1)
(s804 1)
(s805 1)
(s806 1)
(s807 1)
(s808 1)
(s809 1)
(s810 1)
(s811 1)
(s812 1)
(s813 1)
(s814 1)
(s815 1)
(s816 1)
(s817 1)
(s818 1)
(s819 1)
(s820 1)
(s821 1)
(s822 1)
(s823 1)
(s824 1)
(s825 1)
(s826 1)
(s827 1)
(s828 1)
(s829 1)
(s830 1)
(s831 1)
(s832 1)
(s833 1)
(s834 1)
(s835 1)
(s836 1)
(s837 1)
(s838 1)
(s839 1)
(s840 1)
(s841 1)
(s842 1)
(s843 1)
(s844 1)
(s845 1)
(s846 1)
(s847 1)
(s848 1)
(s849 1)
(s850 1)
(s851 1)
(s852 1)
(s853 1)
(s854 1)
(s855 1)
(s856 1)
(s857 1)
(s858 1)
(s859 1)
(s860 1)
(s861 1)
(s862 1)
(s863 1)
(s864 1)
(s865 1)
(s866 1)
(s867 1)
(s868 1)
(s869 1)
(s870 1)
(s871 1)
(s872 1)
(s873 1)
(s874 1)
(s875 1)
(s876 1)
(s877 1)
(s878 1)
(s879 1)
(s880 1)
(s881 1)
(s882 1)
(s883 1)
(s884 1)
(s885 1)
(s886 1)
(s887 1)
(s888 1)
(s889 1)
(s890 1)
(s891 1)
(s892 1)
(s893 1)
(s894 1)
(s895 1)
(s896 1)
(s897 1)
(s898 1)
(s899 1)
(s900 1)
(s901 1)
(s902 1)
(s903 1)
(s904 1)
(s905 1)
(s906 1)
(s907 1)
(s908 1)
(s909 1)
(s910 1)
(s911 1)
(s912 1)
(s913 1)
(s914 1)
(s915 1)
(s916 1)
(s917 1)
(s918 1)
(s919 1)
(s920 1)
(s921 1)
(s922 1)
(s923 1)
(s924 1)
(s925 1)
(s926 1)
(s927 1)
(s928 1)
(s929 1)
(s930 1)
(s931 1)
(s932 1)
(s933 1)
(s934 1)
(s935 1)
(s936 1)
(s937 1)
(s938 1)
(s939 1)
(s940 1)
(s941 1)
(s942 1)
(s943 1)
(s944 1)
(s945 1)
(s946 1)
(s947 1)
(s948 1)
(s949 1)
(s950 1)
(s951 1)
(s952 1)
(s953 1)
(s954 1)
(s955 1)
(s956 1)
(s957 1)
(s958 1)
(s959 1)
(s960 1)
(s961 1)
(s962 1)
(s963 1)
(s964 1)
(s965 1)
(s966 1)
(s967 1)
(s968 1)
(s969 1)
(s970 1)
(s971 1)
(s972 1)
(s973 1)
(s974 1)
(s975 1)
(s976 1)
(s977 1)
(s978 1)
(s979 1)
(s980 1)
(s981 1)
(s982 1)
(s983 1)
(s984 1)
(s985 1)
(s986 1)
(s987 1)
(s988 1)
(s989 1)
(s990 1)
(s991 1)
(s992 1)
(s993 1)
(s994 1)
(s995 1)
(s996 1)
(s997 1)
(s998 1)
(s999 1)
(s1000 1)
(s1001 1)
(s1002 1)
(s1003 1)
(s1004 1)
(s1005 1)
(s1006 1)
(s1007 1)
(s1008 1)
(s1009 1)
(s1010 1)
(s1011 1)
(s1012 1)
(s1013 1)
(s1014 1)
(s1015 1)
(s1016 1)
(s1017 1)
(s1018 1)
(s1019 1)
(s1020 1)
(s1021 1)
(s1022 1)
(s1023 1)
(s1024 1)
(s1025 1)
(s1026 1)
(s1027 1)
(s1028 1)
(s1029 1)
(s1030 1)
(s1031 1)
(s1032 1)
(s1033 1)
(s1034 1)
(s1035 1)
(s1036 1)
(s1037 1)
(s1038 1)
(s1039 1)
(s1040 1)
(s1041 1)
(s1042 1)
(s1043 1)
(s1044 1)
(s1045 1)
(s1046 1)
(s1047 1)
(s1048 1)
(s1049 1)
(s1050 1)
(s1051 1)
(s1052 1)
(s1053 1)
(s1054 1)
(s1055 1)
(s1056 1)
(s1057 1)
(s1058 1)
(s1059 1)
(s1060 1)
(s1061 1)
(s1062 1)
(s1063 1)
(s1064 1)
(s1065 1)
(s1066 1)
(s1067 1)
(s1068 1)
(s1069 1)
(s1070 1)
(s1071 1)
(s1072 1)
(s1073 1)
(s1074 1)
(s1075 1)
(s1076 1)
(s1077 1)
(s1078 1)
(s1079 1)
(s1080 1)
(s1081 1)
(s1082 1)
(s1083 1)
(s1084 1)
(s1085 1)
(s1086 1)
(s1087 1)
(s1088 1)
(s1089 1)
(s1090 1)
(s1091 1)
(s1092 1)
(s1093 1)
(s1094 1)
(s1095 1)
(s1096 1)
(s1097 1)
(s1098 1)
(s1099 1)
(s1100 1)
(s1101 1)
(s1102 1)
(s1103 1)
(s1104 1)
(s1105 1)
(s1106 1)
(s1107 1)
(s1108 1)
(s1109 1)
(s1110 1)
(s1111 1)
(s1112 1)
(s1113 1)
(s1114 1)
(s1115 1)
(s1116 1)
(s1117 1)
(s1118 1)
(s1119 1)
(s1120 1)
(s1121 1)
(s1122 1)
(s1123 1)
(s1124 1)
(s1125 1)
(s1126 1)
(s1127 1)
(s1128 1)
(s1129 1)
(s1130 1)
(s1131 1)
(s1132 1)
(s1133 1)
(s1134 1)
(s1135 1)
(s1136 1)
(s1137 1)
(s1138 1)
(s1139 1)
(s1140 1)
(s1141 1)
(s1142 1)
(s1143 1)
(s1144 1)
(s1145 1)
(s1146 1)
(s1147 1)
(s1148 1)
(s1149 1)
(s1150 1)
(s1151 1)
(s1152 1)
(s1153 1)
(s1154 1)
(s1155 1)
(s1156 1)
(s1157 1)
(s1158 1)
(s1159 1)
(s1160 1)
(s1161 1)
(s1162 1)
(s1163 1)
(s1164 1)
(s1165 1)
(s1166 1)
(s1167 1)
(s1168 1)
(s1169 1)
(s1170 1)
(s1171 1)
(s1172 1)
(s1173 1)
(s1174 1)
(s1175 1)
(s1176 1)
(s1177 1)
(s1178 1)
(s1179 1)
(s1180 1)
(s1181 1)
(s1182 1)
(s1183 1)
(s1184 1)
(s1185 1)
(s1186 1)
(s1187 1)
(s1188 1)
(s1189 1)
(s1190 1)
(s1191 1)
(s1192 1)
(s1193 1)
(s1194 1)
(s1195 1)
(s1196 1)
(s1197 1)
(s1198 1)
(s1199 1)
(s1200 1)
(s1201 1)
(s1202 1)
(s1203 1)
(s1204 1)
(s1205 1)
(s1206 1)
(s1207 1)
(s1208 1)
(s1209 1)
(s1210 1)
(s1211 1)
(s1212 1)
(s1213 1)
(s1214 1)
(s1215 1)
(s1216 1)
(s1217 1)
(s1218 1)
(s1219 1)
(s1220 1)
(s1221 1)
(s1222 1)
(s1223 1)
(s1224 1)
(s1225 1)
(s1226 1)
(s1227 1)
(s1228 1)
(s1229 1)
(s1230 1)
(s1231 1)
(s1232 1)
(s1233 1)
(s1234 1)
(s1235 1)
(s1236 1)
(s1237 1)
(s1238 1)
(s1239 1)
(s1240 1)
(s1241 1)
(s1242 1)
(s1243 1)
(s1244 1)
(s1245 1)
(s1246 1)
(s1247 1)
(s1248 1)
(s1249 1)
(s1250 1)
(s1251 1)
(s1252 1)
(s1253 1)
(s1254 1)
(s1255 1)
(s1256 1)
(s1257 1)
(s1258 1)
(s1259 1)
(s1260 1)
(s1261 1)
(s1262 1)
(s1263 1)
(s1264 1)
(s1265 1)
(s1266 1)
(s1267 1)
(s1268 1)
(s1269 1)
(s1270 1)
(s1271 1)
(s1272 1)
(s1273 1)
(s1274 1)
(s1275 1)
(s1276 1)
(s1277 1)
(s1278 1)
(s1279 1)
(s1280 1)
(s1281 1)
(s1282 1)
(s1283 1)
(s1284 1)
(s1285 1)
(s1286 1)
(s1287 1)
(s1288 1)
(s1289 1)
(s1290 1)
(s1291 1)
(s1292 1)
(s1293 1)
(s1294 1)
(s1295 1)
(s1296 1)
(s1297 1)
(s1298 1)
(s1299 1)
(s1300 1)
(s1301 1)
(s1302 1)
(s1303 1)
(s1304 1)
(s1305 1)
(s1306 1)
(s1307 1)
(s1308 1)
(s1309 1)
(s1310 1)
(s1311 1)
(s1312 1)
(s1313 1)
(s1314 1)
(s1315 1)
(s1316 1)
(s1317 1)
(s1318 1)
(s1319 1)
(s1320 1)
(s1321 1)
(s1322 1)
(s1323 1)
(s1324 1)
(s1325 1)
(s1326 1)
(s1327 1)
(s1328 1)
(s1329 1)
(s1330 1)
(s1331 1)
(s1332 1)
(s1333 1)
(s1334 1)
(s1335 1)
(s1336 1)
(s1337 1)
(s1338 1)
(s1339 1)
(s1340 1)
(s1341 1)
(s1342 1)
(s1343 1)
(s1344 1)
(s1345 1)
(s1346 1)
(s1347 1)
(s1348 1)
(s1349 1)
(s1350 1)
(s1351 1)
(s1352 1)
(s1353 1)
(s1354 1)
(s1355 1)
(s1356 1)
(s1357 1)
(s1358 1)
(s1359 1)
(s1360 1)
(s1361 1)
(s1362 1)
(s1363 1)
(s1364 1)
(s1365 1)
(s1366 1)
(s1367 1)
(s1368 1)
(s1369 1)
(s1370 1)
(s1371 1)
(s1372 1)
(s1373 1)
(s1374 1)
(s1375 1)
(s1376 1)
(s1377 1)
(s1378 1)
(s1379 1)
(s1380 1)
(s1381 1)
(s1382 1)
(s1383 1)
(s1384 1)
(s1385 1)
(s1386 1)
(s1387 1)
(s1388 1)
(s1389 1)
(s1390 1)
(s1391 1)
(s1392 1)
(s1393 1)
(s1394 1)
(s1395 1)
(s1396 1)
(s1397 1)
(s1398 1)
(s1399 1)
(s1400 1)
(s1401 1)
(s1402 1)
(s1403 1)
(s1404 1)
(s1405 1)
(s1406 1)
(s1407 1)
(s1408 1)
(s1409 1)
(s1410 1)
(s1411 1)
(s1412 1)
(s1413 1)
(s1414 1)
(s1415 1)
(s1416 1)
(s1417 1)
(s1418 1)
(s1419 1)
(s1420 1)
(s1421 1)
(s1422 1)
(s1423 1)
(s1424 1)
(s1425 1)
(s1426 1)
(s1427 1)
(s1428 1)
(s1429 1)
(s1430 1)
(s1431 1)
(s1432 1)
(s1433 1)
(s1434 1)
(s1435 1)
(s1436 1)
(s1437 1)
(s1438 1)
(s1439 1)
(s1440 1)
(s1441 1)
(s1442 1)
(s1443 1)
(s1444 1)
(s1445 1)
(s1446 1)
(s1447 1)
(s1448 1)
(s1449 1)
(s1450 1)
(s1451 1)
(s1452 1)
(s1453 1)
(s1454 1)
(s1455 1)
(s1456 1)
(s1457 1)
(s1458 1)
(s1459 1)
(s1460 1)
(s1461 1)
(s1462 1)
(s1463 1)
(s1464 1)
(s1465 1)
(s1466 1)
(s1467 1)
(s1468 1)
(s1469 1)
(s1470 1)
(s1471 1)
(s1472 1)
(s1473 1)
(s1474 1)
(s1475 1)
(s1476 1)
(s1477 1)
(s1478 1)
(s1479 1)
(s1480 1)
(s1481 1)
(s1482 1)
(s1483 1)
(s1484 1)
(s1485 1)
(s1486 1)
(s1487 1)
(s1488 1)
(s1489 1)
(s1490 1)
(s1491 1)
(s1492 1)
(s1493 1)
(s1494 1)
(s1495 1)
(s1496 1)
(s1497 1)
(s1498 1)
(s1499 1)
(s1500 1)
(s1501 1)
(s1502 1)
(s1503 1)
(s1504 1)
(s1505 1)
(s1506 1)
(s1507 1)
(s1508 1)
(s1509 1)
(s1510 1)
(s1511 1)
(s1512 1)
(s1513 1)
(s1514 1)
(s1515 1)
(s1516 1)
(s1517 1)
(s1518 1)
(s1519 1)
(s1520 1)
(s1521 1)
(s1522 1)
(s1523 1)
(s1524 1)
(s1525 1)
(s1526 1)
(s1527 1)
(s1528 1)
(s1529 1)
(s1530 1)
(s1531 1)
(s1532 1)
(s1533 1)
(s1534 1)
(s1535 1)
(s1536 1)
(s1537 1)
(s1538 1)
(s1539 1)
(s1540 1)
(s1541 1)
(s1542 1)
(s1543 1)
(s1544 1)
(s1545 1)
(s1546 1)
(s1547 1)
(s1548 1)
(s1549 1)
(s1550 1)
(s1551 1)
(s1552 1)
(s1553 1)
(s1554 1)
(s1555 1)
(s1556 1)
(s1557 1)
(s1558 1)
(s1559 1)
(s1560 1)
(s1561 1)
(s1562 1)
(s1563 1)
(s1564 1)
(s1565 1)
(s1566 1)
(s1567 1)
(s1568 1)
(s1569 1)
(s1570 1)
(s1571 1)
(s1572 1)
(s1573 1)
(s1574 1)
(s1575 1)
(s1576 1)
(s1577 1)
(s1578 1)
(s1579 1)
(s1580 1)
(s1581 1)
(s1582 1)
(s1583 1)
(s1584 1)
(s1585 1)
(s1586 1)
(s1587 1)
(s1588 1)
(s1589 1)
(s1590 1)
(s1591 1)
(s1592 1)
(s1593 1)
(s1594 1)
(s1595 1)
(s1596 1)
(s1597 1)
(s1598 1)
(s1599 1)
(s1600 1)
(s1601 1)
(s1602 1)
(s1603 1)
(s1604 1)
(s1605 1)
(s1606 1)
(s1607 1)
(s1608 1)
(s1609 1)
(s1610 1)
(s1611 1)
(s1612 1)
(s1613 1)
(s1614 1)
(s1615 1)
(s1616 1)
(s1617 1)
(s1618 1)
(s1619 1)
(s1620 1)
(s1621 1)
(s1622 1)
(s1623 1)
(s1624 1)
(s1625 1)
(s1626 1)
(s1627 1)
(s1628 1)
(s1629 1)
(s1630 1)
(s1631 1)
(s1632 1)
(s1633 1)
(s1634 1)
(s1635 1)
(s1636 1)
(s1637 1)
(s1638 1)
(s1639 1)
(s1640 1)
(s1641 1)
(s1642 1)
(s1643 1)
(s1644 1)
(s1645 1)
(s1646 1)
(s1647 1)
(s1648 1)
(s1649 1)
(s1650 1)
(s1651 1)
(s1652 1)
(s1653 1)
(s1654 1)
(s1655 1)
(s1656 1)
(s1657 1)
(s1658 1)
(s1659 1)
(s1660 1)
(s1661 1)
(s1662 1)
(s1663 1)
(s1664 1)
(s1665 1)
(s1666 1)
(s1667 1)
(s1668 1)
(s1669 1)
(s1670 1)
(s1671 1)
(s1672 1)
(s1673 1)
(s1674 1)
(s1675 1)
(s1676 1)
(s1677 1)
(s1678 1)
(s1679 1)
(s1680 1)
(s1681 1)
(s1682 1)
(s1683 1)
(s1684 1)
(s1685 1)
(s1686 1)
(s1687 1)
(s1688 1)
(s1689 1)
(s1690 1)
(s1691 1)
(s1692 1)
(s1693 1)
(s1694 1)
(s1695 1)
(s1696 1)
(s1697 1)
(s1698 1)
(s1699 1)
(s1700 1)
(s1701 1)
(s1702 1)
(s1703 1)
(s1704 1)
(s1705 1)
(s1706 1)
(s1707 1)
(s1708 1)
(s1709 1)
(s1710 1)
(s1711 1)
(s1712 1)
(s1713 1)
(s1714 1)
(s1715 1)
(s1716 1)
(s1717 1)
(s1718 1)
(s1719 1)
(s1720 1)
(s1721 1)
(s1722 1)
(s1723 1)
(s1724 1)
(s1725 1)
(s1726 1)
(s1727 1)
(s1728 1)
(s1729 1)
(s1730 1)
(s1731 1)
(s1732 1)
(s1733 1)
(s1734 1)
(s1735 1)
(s1736 1)
(s1737 1)
(s1738 1)
(s1739 1)
(s1740 1)
(s1741 1)
(s1742 1)
(s1743 1)
(s1744 1)
(s1745 1)
(s1746 1)
(s1747 1)
(s1748 1)
(s1749 1)
(s1750 1)
(s1751 1)
(s1752 1)
(s1753 1)
(s1754 1)
(s1755 1)
(s1756 1)
(s1757 1)
(s1758 1)
(s1759 1)
(s1760 1)
(s1761 1)
(s1762 1)
(s1763 1)
(s1764 1)
(s1765 1)
(s1766 1)
(s1767 1)
(s1768 1)
(s1769 1)
(s1770 1)
(s1771 1)
(s1772 1)
(s1773 1)
(s1774 1)
(s1775 1)
(s1776 1)
(s1777 1)
(s1778 1)
(s1779 1)
(s1780 1)
(s1781 1)
(s1782 1)
(s1783 1)
(s1784 1)
(s1785 1)
(s1786 1)
(s1787 1)
(s1788 1)
(s1789 1)
(s1790 1)
(s1791 1)
(s1792 1)
(s1793 1)
(s1794 1)
(s1795 1)
(s1796 1)
(s1797 1)
(s1798 1)
(s1799 1)
(s1800 1)
(s1801 1)
(s1802 1)
(s1803 1)
(s1804 1)
(s1805 1)
(s1806 1)
(s1807 1)
(s1808 1)
(s1809 1)
(s1810 1)
(s1811 1)
(s1812 1)
(s1813 1)
(s1814 1)
(s1815 1)
(s1816 1)
(s1817 1)
(s1818 1)
(s1819 1)
(s1820 1)
(s1821 1)
(s1822 1)
(s1823 1)
(s1824 1)
(s1825 1)
(s1826 1)
(s1827 1)
(s1828 1)
(s1829 1)
(s1830 1)
(s1831 1)
(s1832 1)
(s1833 1)
(s1834 1)
(s1835 1)
(s1836 1)
(s1837 1)
(s1838 1)
(s1839 1)
(s1840 1)
(s1841 1)
(s1842 1)
(s1843 1)
(s1844 1)
(s1845 1)
(s1846 1)
(s1847 1)
(s1848 1)
(s1849 1)
(s1850 1)
(s1851 1)
(s1852 1)
(s1853 1)
(s1854 1)
(s1855 1)
(s1856 1)
(s1857 1)
(s1858 1)
(s1859 1)
(s1860 1)
(s1861 1)
(s1862 1)
(s1863 1)
(s1864 1)
(s1865 1)
(s1866 1)
(s1867 1)
(s1868 1)
(s1869 1)
(s1870 1)
(s1871 1)
(s1872 1)
(s1873 1)
(s1874 1)
(s1875 1)
(s1876 1)
(s1877 1)
(s1878 1)
(s1879 1)
(s1880 1)
(s1881 1)
(s1882 1)
(s1883 1)
(s1884 1)
(s1885 1)
(s1886 1)
(s1887 1)
(s1888 1)
(s1889 1)
(s1890 1)
(s1891 1)
(s1892 1)
(s1893 1)
(s1894 1)
(s1895 1)
(s1896 1)
(s1897 1)
(s1898 1)
(s1899 1)
(s1900 1)
(s1901 1)
(s1902 1)
(s1903 1)
(s1904 1)
(s1905 1)
(s1906 1)
(s1907 1)
(s1908 1)
(s1909 1)
(s1910 1)
(s1911 1)
(s1912 1)
(s1913 1)
(s1914 1)
(s1915 1)
(s1916 1)
(s1917 1)
(s1918 1)
(s1919 1)
(s1920 1)
(s1921 1)
(s1922 1)
(s1923 1)
(s1924 1)
(s1925 1)
(s1926 1)
(s1927 1)
(s1928 1)
(s1929 1)
(s1930 1)
(s1931 1)
(s1932 1)
(s1933 1)
(s1934 1)
(s1935 1)
(s1936 1)
(s1937 1)
(s1938 1)
(s1939 1)
(s1940 1)
(s1941 1)
(s1942 1)
(s1943 1)
(s1944 1)
(s1945 timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 2014/6038 variables, and 0 constraints, problems are : Problem set: 0 solved, 2009 unsolved in 30075 ms.
Refiners :[Positive P Invariants (semi-flows): 0/2 constraints, State Equation: 0/2020 constraints, PredecessorRefiner: 2000/9 constraints, Known Traps: 0/0 constraints]
After SMT, in 92700ms problems are : Problem set: 0 solved, 2009 unsolved
Search for dead transitions found 0 dead transitions in 92789ms
Starting structural reductions in LTL mode, iteration 1 : 2020/8017 places, 4018/16008 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 103641 ms. Remains : 2020/8017 places, 4018/16008 transitions.
Support contains 2008 out of 2020 places after structural reductions.
[2024-05-23 00:22:39] [INFO ] Flatten gal took : 478 ms
[2024-05-23 00:22:39] [INFO ] Flatten gal took : 197 ms
[2024-05-23 00:22:40] [INFO ] Input system was already deterministic with 4018 transitions.
RANDOM walk for 268 steps (30 resets) in 216 ms. (1 steps per ms) remains 0/8 properties
Computed a total of 2020 stabilizing places and 4018 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 2020 transition count 4018
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 1 out of 2020 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 2020/2020 places, 4018/4018 transitions.
Graph (complete) has 4027 edges and 2020 vertex of which 17 are kept as prefixes of interest. Removing 2003 places using SCC suffix rule.16 ms
Discarding 2003 places :
Also discarding 4000 output transitions
Drop transitions (Output transitions of discarded places.) removed 4000 transitions
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 3 place count 15 transition count 16
Iterating global reduction 0 with 2 rules applied. Total rules applied 5 place count 15 transition count 16
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 7 place count 15 transition count 14
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 1 with 1 Pre rules applied. Total rules applied 7 place count 15 transition count 13
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 1 with 2 rules applied. Total rules applied 9 place count 14 transition count 13
Applied a total of 9 rules in 48 ms. Remains 14 /2020 variables (removed 2006) and now considering 13/4018 (removed 4005) transitions.
// Phase 1: matrix 13 rows 14 cols
[2024-05-23 00:22:40] [INFO ] Computed 1 invariants in 0 ms
[2024-05-23 00:22:40] [INFO ] Implicit Places using invariants in 42 ms returned [13]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 47 ms to find 1 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 13/2020 places, 13/4018 transitions.
Graph (complete) has 11 edges and 13 vertex of which 12 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.0 ms
Discarding 1 places :
Also discarding 1 output transitions
Drop transitions (Output transitions of discarded places.) removed 1 transitions
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 12 transition count 11
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 11 transition count 11
Applied a total of 3 rules in 3 ms. Remains 11 /13 variables (removed 2) and now considering 11/13 (removed 2) transitions.
// Phase 1: matrix 11 rows 11 cols
[2024-05-23 00:22:40] [INFO ] Computed 0 invariants in 0 ms
[2024-05-23 00:22:40] [INFO ] Implicit Places using invariants in 29 ms returned []
[2024-05-23 00:22:40] [INFO ] Invariant cache hit.
[2024-05-23 00:22:40] [INFO ] Implicit Places using invariants and state equation in 59 ms returned [0]
Discarding 1 places :
Implicit Place search using SMT with State Equation took 90 ms to find 1 implicit places.
Starting structural reductions in SI_LTL mode, iteration 2 : 10/2020 places, 11/4018 transitions.
Applied a total of 0 rules in 1 ms. Remains 10 /10 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in SI_LTL mode , in 3 iterations and 190 ms. Remains : 10/2020 places, 11/4018 transitions.
Stuttering acceptance computed with spot in 202 ms :[(NOT p0)]
Running random walk in product with property : AirplaneLD-PT-2000-LTLCardinality-01
Product exploration explored 100000 steps with 20493 reset in 485 ms.
Product exploration explored 100000 steps with 20522 reset in 231 ms.
Computed a total of 10 stabilizing places and 11 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 10 transition count 11
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [p0, (X p0), (X (X p0)), (F (G p0))]
False Knowledge obtained : []
Property proved to be true thanks to knowledge (Minato strategy)
Knowledge based reduction with 4 factoid took 34 ms. Reduced automaton from 1 states, 2 edges and 1 AP (stutter insensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA AirplaneLD-PT-2000-LTLCardinality-01 TRUE TECHNIQUES KNOWLEDGE
Treatment of property AirplaneLD-PT-2000-LTLCardinality-01 finished in 1289 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 2 out of 2020 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 2020/2020 places, 4018/4018 transitions.
Graph (complete) has 4027 edges and 2020 vertex of which 2 are kept as prefixes of interest. Removing 2018 places using SCC suffix rule.11 ms
Discarding 2018 places :
Also discarding 4013 output transitions
Drop transitions (Output transitions of discarded places.) removed 4013 transitions
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 4 place count 2 transition count 2
Applied a total of 4 rules in 21 ms. Remains 2 /2020 variables (removed 2018) and now considering 2/4018 (removed 4016) transitions.
// Phase 1: matrix 2 rows 2 cols
[2024-05-23 00:22:41] [INFO ] Computed 0 invariants in 0 ms
[2024-05-23 00:22:41] [INFO ] Implicit Places using invariants in 19 ms returned []
[2024-05-23 00:22:41] [INFO ] Invariant cache hit.
[2024-05-23 00:22:41] [INFO ] Implicit Places using invariants and state equation in 21 ms returned []
Implicit Place search using SMT with State Equation took 42 ms to find 0 implicit places.
[2024-05-23 00:22:41] [INFO ] Redundant transitions in 1 ms returned []
Running 0 sub problems to find dead transitions.
Search for dead transitions found 0 dead transitions in 0ms
Starting structural reductions in SI_LTL mode, iteration 1 : 2/2020 places, 2/4018 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 70 ms. Remains : 2/2020 places, 2/4018 transitions.
Stuttering acceptance computed with spot in 37 ms :[(NOT p0)]
Running random walk in product with property : AirplaneLD-PT-2000-LTLCardinality-02
Product exploration explored 100000 steps with 33333 reset in 189 ms.
Product exploration explored 100000 steps with 33333 reset in 100 ms.
Computed a total of 2 stabilizing places and 2 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 2 transition count 2
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [p0, (X (X p0)), (F (G p0))]
False Knowledge obtained : [(X p0), (X (NOT p0))]
Property proved to be true thanks to knowledge (Minato strategy)
Knowledge based reduction with 3 factoid took 14 ms. Reduced automaton from 1 states, 2 edges and 1 AP (stutter insensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA AirplaneLD-PT-2000-LTLCardinality-02 TRUE TECHNIQUES KNOWLEDGE
Treatment of property AirplaneLD-PT-2000-LTLCardinality-02 finished in 458 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(G((X(G(p1))&&p0))))'
Support contains 2002 out of 2020 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2020/2020 places, 4018/4018 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 2019 transition count 4018
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 2018 transition count 4017
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 2018 transition count 4017
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 4 place count 2018 transition count 4016
Applied a total of 4 rules in 26 ms. Remains 2018 /2020 variables (removed 2) and now considering 4016/4018 (removed 2) transitions.
// Phase 1: matrix 4016 rows 2018 cols
[2024-05-23 00:22:43] [INFO ] Computed 1 invariants in 1239 ms
[2024-05-23 00:22:44] [INFO ] Implicit Places using invariants in 1730 ms returned []
[2024-05-23 00:22:44] [INFO ] Invariant cache hit.
[2024-05-23 00:22:53] [INFO ] Implicit Places using invariants and state equation in 9173 ms returned []
Implicit Place search using SMT with State Equation took 10906 ms to find 0 implicit places.
Running 2008 sub problems to find dead transitions.
[2024-05-23 00:22:53] [INFO ] Invariant cache hit.
Error getting values : (error "ParserException while parsing response: (timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 2013/6034 variables, and 0 constraints, problems are : Problem set: 0 solved, 2008 unsolved in 30041 ms.
Refiners :[Generalized P Invariants (flows): 0/1 constraints, State Equation: 0/2018 constraints, PredecessorRefiner: 2008/8 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 2008 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 2013/6034 variables, and 0 constraints, problems are : Problem set: 0 solved, 2008 unsolved in 30067 ms.
Refiners :[Generalized P Invariants (flows): 0/1 constraints, State Equation: 0/2018 constraints, PredecessorRefiner: 2000/8 constraints, Known Traps: 0/0 constraints]
After SMT, in 88763ms problems are : Problem set: 0 solved, 2008 unsolved
Search for dead transitions found 0 dead transitions in 88796ms
Starting structural reductions in LTL mode, iteration 1 : 2018/2020 places, 4016/4018 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 99737 ms. Remains : 2018/2020 places, 4016/4018 transitions.
Stuttering acceptance computed with spot in 210 ms :[true, (OR (NOT p1) (NOT p0)), (OR (NOT p0) (NOT p1)), (OR (NOT p1) (NOT p0))]
Running random walk in product with property : AirplaneLD-PT-2000-LTLCardinality-04
Entered a terminal (fully accepting) state of product in 1 steps with 0 reset in 3 ms.
FORMULA AirplaneLD-PT-2000-LTLCardinality-04 FALSE TECHNIQUES STUTTER_TEST
Treatment of property AirplaneLD-PT-2000-LTLCardinality-04 finished in 99992 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(p0))'
Support contains 2 out of 2020 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2020/2020 places, 4018/4018 transitions.
Discarding 2000 places :
Symmetric choice reduction at 0 with 2000 rule applications. Total rules 2000 place count 20 transition count 2018
Iterating global reduction 0 with 2000 rules applied. Total rules applied 4000 place count 20 transition count 2018
Ensure Unique test removed 2000 transitions
Reduce isomorphic transitions removed 2000 transitions.
Iterating post reduction 0 with 2000 rules applied. Total rules applied 6000 place count 20 transition count 18
Applied a total of 6000 rules in 97 ms. Remains 20 /2020 variables (removed 2000) and now considering 18/4018 (removed 4000) transitions.
// Phase 1: matrix 18 rows 20 cols
[2024-05-23 00:24:22] [INFO ] Computed 2 invariants in 0 ms
[2024-05-23 00:24:22] [INFO ] Implicit Places using invariants in 45 ms returned []
[2024-05-23 00:24:22] [INFO ] Invariant cache hit.
[2024-05-23 00:24:22] [INFO ] Implicit Places using invariants and state equation in 53 ms returned []
Implicit Place search using SMT with State Equation took 103 ms to find 0 implicit places.
Running 9 sub problems to find dead transitions.
[2024-05-23 00:24:22] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/14 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 9 unsolved
At refinement iteration 1 (OVERLAPS) 2/16 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 9 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/16 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 9 unsolved
At refinement iteration 3 (OVERLAPS) 18/34 variables, 16/18 constraints. Problems are: Problem set: 0 solved, 9 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/34 variables, 0/18 constraints. Problems are: Problem set: 0 solved, 9 unsolved
At refinement iteration 5 (OVERLAPS) 4/38 variables, 4/22 constraints. Problems are: Problem set: 0 solved, 9 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/38 variables, 0/22 constraints. Problems are: Problem set: 0 solved, 9 unsolved
At refinement iteration 7 (OVERLAPS) 0/38 variables, 0/22 constraints. Problems are: Problem set: 0 solved, 9 unsolved
No progress, stopping.
After SMT solving in domain Real declared 38/38 variables, and 22 constraints, problems are : Problem set: 0 solved, 9 unsolved in 265 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, State Equation: 20/20 constraints, PredecessorRefiner: 9/9 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 9 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/14 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 9 unsolved
At refinement iteration 1 (OVERLAPS) 2/16 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 9 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/16 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 9 unsolved
At refinement iteration 3 (OVERLAPS) 18/34 variables, 16/18 constraints. Problems are: Problem set: 0 solved, 9 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/34 variables, 9/27 constraints. Problems are: Problem set: 0 solved, 9 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/34 variables, 0/27 constraints. Problems are: Problem set: 0 solved, 9 unsolved
At refinement iteration 6 (OVERLAPS) 4/38 variables, 4/31 constraints. Problems are: Problem set: 0 solved, 9 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/38 variables, 0/31 constraints. Problems are: Problem set: 0 solved, 9 unsolved
At refinement iteration 8 (OVERLAPS) 0/38 variables, 0/31 constraints. Problems are: Problem set: 0 solved, 9 unsolved
No progress, stopping.
After SMT solving in domain Int declared 38/38 variables, and 31 constraints, problems are : Problem set: 0 solved, 9 unsolved in 203 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, State Equation: 20/20 constraints, PredecessorRefiner: 9/9 constraints, Known Traps: 0/0 constraints]
After SMT, in 475ms problems are : Problem set: 0 solved, 9 unsolved
Search for dead transitions found 0 dead transitions in 476ms
Starting structural reductions in LTL mode, iteration 1 : 20/2020 places, 18/4018 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 678 ms. Remains : 20/2020 places, 18/4018 transitions.
Stuttering acceptance computed with spot in 108 ms :[(NOT p0), (NOT p0), true]
Running random walk in product with property : AirplaneLD-PT-2000-LTLCardinality-10
Entered a terminal (fully accepting) state of product in 1 steps with 0 reset in 0 ms.
FORMULA AirplaneLD-PT-2000-LTLCardinality-10 FALSE TECHNIQUES STUTTER_TEST
Treatment of property AirplaneLD-PT-2000-LTLCardinality-10 finished in 807 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((G(p0)||G(p1))))'
Support contains 4 out of 2020 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 2020/2020 places, 4018/4018 transitions.
Graph (complete) has 4027 edges and 2020 vertex of which 14 are kept as prefixes of interest. Removing 2006 places using SCC suffix rule.13 ms
Discarding 2006 places :
Also discarding 4002 output transitions
Drop transitions (Output transitions of discarded places.) removed 4002 transitions
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 14 transition count 15
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 3 place count 13 transition count 14
Iterating global reduction 1 with 1 rules applied. Total rules applied 4 place count 13 transition count 14
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 5 place count 13 transition count 13
Applied a total of 5 rules in 30 ms. Remains 13 /2020 variables (removed 2007) and now considering 13/4018 (removed 4005) transitions.
// Phase 1: matrix 13 rows 13 cols
[2024-05-23 00:24:23] [INFO ] Computed 1 invariants in 10 ms
[2024-05-23 00:24:23] [INFO ] Implicit Places using invariants in 36 ms returned [12]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 38 ms to find 1 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 12/2020 places, 13/4018 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 12 transition count 12
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 11 transition count 12
Applied a total of 2 rules in 2 ms. Remains 11 /12 variables (removed 1) and now considering 12/13 (removed 1) transitions.
// Phase 1: matrix 12 rows 11 cols
[2024-05-23 00:24:23] [INFO ] Computed 0 invariants in 0 ms
[2024-05-23 00:24:23] [INFO ] Implicit Places using invariants in 23 ms returned []
[2024-05-23 00:24:23] [INFO ] Invariant cache hit.
[2024-05-23 00:24:23] [INFO ] Implicit Places using invariants and state equation in 34 ms returned []
Implicit Place search using SMT with State Equation took 60 ms to find 0 implicit places.
Starting structural reductions in SI_LTL mode, iteration 2 : 11/2020 places, 12/4018 transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 130 ms. Remains : 11/2020 places, 12/4018 transitions.
Stuttering acceptance computed with spot in 47 ms :[(AND (NOT p0) (NOT p1))]
Running random walk in product with property : AirplaneLD-PT-2000-LTLCardinality-13
Stuttering criterion allowed to conclude after 49 steps with 7 reset in 1 ms.
FORMULA AirplaneLD-PT-2000-LTLCardinality-13 FALSE TECHNIQUES STUTTER_TEST
Treatment of property AirplaneLD-PT-2000-LTLCardinality-13 finished in 197 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(p0)))'
Support contains 1 out of 2020 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2020/2020 places, 4018/4018 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 2019 transition count 4018
Discarding 2000 places :
Symmetric choice reduction at 1 with 2000 rule applications. Total rules 2001 place count 19 transition count 2018
Iterating global reduction 1 with 2000 rules applied. Total rules applied 4001 place count 19 transition count 2018
Ensure Unique test removed 2000 transitions
Reduce isomorphic transitions removed 2000 transitions.
Iterating post reduction 1 with 2000 rules applied. Total rules applied 6001 place count 19 transition count 18
Applied a total of 6001 rules in 87 ms. Remains 19 /2020 variables (removed 2001) and now considering 18/4018 (removed 4000) transitions.
// Phase 1: matrix 18 rows 19 cols
[2024-05-23 00:24:23] [INFO ] Computed 1 invariants in 1 ms
[2024-05-23 00:24:23] [INFO ] Implicit Places using invariants in 39 ms returned [18]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 40 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 18/2020 places, 18/4018 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 127 ms. Remains : 18/2020 places, 18/4018 transitions.
Stuttering acceptance computed with spot in 142 ms :[(NOT p0), (NOT p0), true, (NOT p0)]
Running random walk in product with property : AirplaneLD-PT-2000-LTLCardinality-15
Entered a terminal (fully accepting) state of product in 14 steps with 4 reset in 0 ms.
FORMULA AirplaneLD-PT-2000-LTLCardinality-15 FALSE TECHNIQUES STUTTER_TEST
Treatment of property AirplaneLD-PT-2000-LTLCardinality-15 finished in 287 ms.
All properties solved by simple procedures.
Total runtime 210808 ms.
ITS solved all properties within timeout

BK_STOP 1716423864048

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLCardinality -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-2000"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="greatspnxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool greatspnxred"
echo " Input is AirplaneLD-PT-2000, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r003-smll-171620117400299"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-2000.tgz
mv AirplaneLD-PT-2000 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;