Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r003-smll-171620117300242.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................
=====================================================================
Generated by BenchKit 2-5568
Executing tool greatspnxred
Input is AirplaneLD-PT-0010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r003-smll-171620117300242
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 608K
-rw-r--r-- 1 mcc users 12K Apr 12 03:32 CTLCardinality.txt
-rw-r--r-- 1 mcc users 87K Apr 12 03:32 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.5K Apr 12 03:29 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Apr 12 03:29 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 6.6K Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 32K Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 21K Apr 22 14:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 30K Apr 12 03:36 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 170K Apr 12 03:36 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 12 03:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Apr 12 03:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.6K Apr 22 14:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 48K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-00
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-01
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-02
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-03
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-04
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-05
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-06
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-07
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-08
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-09
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-10
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-11
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-12
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-13
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-14
FORMULA_NAME AirplaneLD-PT-0010-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1716418851613

Invoking MCC driver with
BK_TOOL=greatspnxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-PT-0010
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool greatspn
Invoking reducer
Running Version 202405141337
[2024-05-22 23:00:54] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-22 23:00:54] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-22 23:00:55] [INFO ] Load time of PNML (sax parser for PT used): 169 ms
[2024-05-22 23:00:55] [INFO ] Transformed 89 places.
[2024-05-22 23:00:55] [INFO ] Transformed 88 transitions.
[2024-05-22 23:00:55] [INFO ] Found NUPN structural information;
[2024-05-22 23:00:55] [INFO ] Parsed PT model containing 89 places and 88 transitions and 333 arcs in 582 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 35 ms.
Reduce places removed 32 places and 0 transitions.
Support contains 54 out of 57 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 57/57 places, 88/88 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 54 transition count 88
Applied a total of 3 rules in 45 ms. Remains 54 /57 variables (removed 3) and now considering 88/88 (removed 0) transitions.
// Phase 1: matrix 88 rows 54 cols
[2024-05-22 23:00:55] [INFO ] Computed 1 invariants in 32 ms
[2024-05-22 23:00:56] [INFO ] Implicit Places using invariants in 686 ms returned []
[2024-05-22 23:00:56] [INFO ] Invariant cache hit.
[2024-05-22 23:00:56] [INFO ] Implicit Places using invariants and state equation in 230 ms returned []
Implicit Place search using SMT with State Equation took 1037 ms to find 0 implicit places.
Running 44 sub problems to find dead transitions.
[2024-05-22 23:00:56] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/49 variables, 49/49 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/49 variables, 0/49 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 2 (OVERLAPS) 1/50 variables, 1/50 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/50 variables, 1/51 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/50 variables, 0/51 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 5 (OVERLAPS) 88/138 variables, 50/101 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/138 variables, 0/101 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 7 (OVERLAPS) 4/142 variables, 4/105 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/142 variables, 4/109 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/142 variables, 0/109 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 10 (OVERLAPS) 0/142 variables, 0/109 constraints. Problems are: Problem set: 0 solved, 44 unsolved
No progress, stopping.
After SMT solving in domain Real declared 142/142 variables, and 109 constraints, problems are : Problem set: 0 solved, 44 unsolved in 2241 ms.
Refiners :[Domain max(s): 54/54 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 54/54 constraints, PredecessorRefiner: 44/44 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 44 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/49 variables, 49/49 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/49 variables, 0/49 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 2 (OVERLAPS) 1/50 variables, 1/50 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/50 variables, 1/51 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/50 variables, 0/51 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 5 (OVERLAPS) 88/138 variables, 50/101 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/138 variables, 44/145 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/138 variables, 0/145 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 8 (OVERLAPS) 4/142 variables, 4/149 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/142 variables, 4/153 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/142 variables, 0/153 constraints. Problems are: Problem set: 0 solved, 44 unsolved
At refinement iteration 11 (OVERLAPS) 0/142 variables, 0/153 constraints. Problems are: Problem set: 0 solved, 44 unsolved
No progress, stopping.
After SMT solving in domain Int declared 142/142 variables, and 153 constraints, problems are : Problem set: 0 solved, 44 unsolved in 2633 ms.
Refiners :[Domain max(s): 54/54 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 54/54 constraints, PredecessorRefiner: 44/44 constraints, Known Traps: 0/0 constraints]
After SMT, in 5162ms problems are : Problem set: 0 solved, 44 unsolved
Search for dead transitions found 0 dead transitions in 5217ms
Starting structural reductions in LTL mode, iteration 1 : 54/57 places, 88/88 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6382 ms. Remains : 54/57 places, 88/88 transitions.
Support contains 54 out of 54 places after structural reductions.
[2024-05-22 23:01:02] [INFO ] Flatten gal took : 116 ms
[2024-05-22 23:01:02] [INFO ] Flatten gal took : 59 ms
[2024-05-22 23:01:02] [INFO ] Input system was already deterministic with 88 transitions.
Reduction of identical properties reduced properties to check from 42 to 37
RANDOM walk for 40000 steps (5029 resets) in 2666 ms. (14 steps per ms) remains 7/37 properties
BEST_FIRST walk for 40003 steps (358 resets) in 415 ms. (96 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40004 steps (368 resets) in 591 ms. (67 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40004 steps (274 resets) in 276 ms. (144 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40004 steps (324 resets) in 142 ms. (279 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40003 steps (353 resets) in 130 ms. (305 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40004 steps (254 resets) in 114 ms. (347 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40003 steps (211 resets) in 36 ms. (1081 steps per ms) remains 7/7 properties
[2024-05-22 23:01:04] [INFO ] Invariant cache hit.
Problem AtomicPropp34 is UNSAT
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/18 variables, 18/18 constraints. Problems are: Problem set: 1 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/18 variables, 0/18 constraints. Problems are: Problem set: 1 solved, 6 unsolved
Problem AtomicPropp2 is UNSAT
At refinement iteration 2 (OVERLAPS) 1/19 variables, 1/19 constraints. Problems are: Problem set: 2 solved, 5 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/19 variables, 1/20 constraints. Problems are: Problem set: 2 solved, 5 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/19 variables, 0/20 constraints. Problems are: Problem set: 2 solved, 5 unsolved
Problem AtomicPropp21 is UNSAT
Problem AtomicPropp25 is UNSAT
Problem AtomicPropp35 is UNSAT
At refinement iteration 5 (OVERLAPS) 85/104 variables, 19/39 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/104 variables, 0/39 constraints. Problems are: Problem set: 5 solved, 2 unsolved
Problem AtomicPropp22 is UNSAT
Problem AtomicPropp37 is UNSAT
After SMT solving in domain Real declared 139/142 variables, and 72 constraints, problems are : Problem set: 7 solved, 0 unsolved in 192 ms.
Refiners :[Domain max(s): 19/54 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 52/54 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints]
After SMT, in 225ms problems are : Problem set: 7 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 7 atomic propositions for a total of 16 simplifications.
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-05-22 23:01:04] [INFO ] Flatten gal took : 11 ms
[2024-05-22 23:01:04] [INFO ] Flatten gal took : 12 ms
[2024-05-22 23:01:04] [INFO ] Input system was already deterministic with 88 transitions.
Computed a total of 54 stabilizing places and 88 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 54 transition count 88
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 88/88 transitions.
Discarding 35 places :
Symmetric choice reduction at 0 with 35 rule applications. Total rules 35 place count 19 transition count 53
Iterating global reduction 0 with 35 rules applied. Total rules applied 70 place count 19 transition count 53
Ensure Unique test removed 35 transitions
Reduce isomorphic transitions removed 35 transitions.
Iterating post reduction 0 with 35 rules applied. Total rules applied 105 place count 19 transition count 18
Applied a total of 105 rules in 24 ms. Remains 19 /54 variables (removed 35) and now considering 18/88 (removed 70) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 19/54 places, 18/88 transitions.
[2024-05-22 23:01:04] [INFO ] Flatten gal took : 2 ms
[2024-05-22 23:01:04] [INFO ] Flatten gal took : 5 ms
[2024-05-22 23:01:05] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 88/88 transitions.
Discarding 25 places :
Symmetric choice reduction at 0 with 25 rule applications. Total rules 25 place count 29 transition count 63
Iterating global reduction 0 with 25 rules applied. Total rules applied 50 place count 29 transition count 63
Ensure Unique test removed 25 transitions
Reduce isomorphic transitions removed 25 transitions.
Iterating post reduction 0 with 25 rules applied. Total rules applied 75 place count 29 transition count 38
Applied a total of 75 rules in 2 ms. Remains 29 /54 variables (removed 25) and now considering 38/88 (removed 50) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 29/54 places, 38/88 transitions.
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 10 ms
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 4 ms
[2024-05-22 23:01:05] [INFO ] Input system was already deterministic with 38 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 88/88 transitions.
Discarding 23 places :
Symmetric choice reduction at 0 with 23 rule applications. Total rules 23 place count 31 transition count 65
Iterating global reduction 0 with 23 rules applied. Total rules applied 46 place count 31 transition count 65
Ensure Unique test removed 23 transitions
Reduce isomorphic transitions removed 23 transitions.
Iterating post reduction 0 with 23 rules applied. Total rules applied 69 place count 31 transition count 42
Applied a total of 69 rules in 25 ms. Remains 31 /54 variables (removed 23) and now considering 42/88 (removed 46) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 31/54 places, 42/88 transitions.
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 3 ms
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 3 ms
[2024-05-22 23:01:05] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 88/88 transitions.
Discarding 30 places :
Symmetric choice reduction at 0 with 30 rule applications. Total rules 30 place count 24 transition count 58
Iterating global reduction 0 with 30 rules applied. Total rules applied 60 place count 24 transition count 58
Ensure Unique test removed 30 transitions
Reduce isomorphic transitions removed 30 transitions.
Iterating post reduction 0 with 30 rules applied. Total rules applied 90 place count 24 transition count 28
Applied a total of 90 rules in 2 ms. Remains 24 /54 variables (removed 30) and now considering 28/88 (removed 60) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 24/54 places, 28/88 transitions.
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 2 ms
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 9 ms
[2024-05-22 23:01:05] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 88/88 transitions.
Discarding 35 places :
Symmetric choice reduction at 0 with 35 rule applications. Total rules 35 place count 19 transition count 53
Iterating global reduction 0 with 35 rules applied. Total rules applied 70 place count 19 transition count 53
Ensure Unique test removed 35 transitions
Reduce isomorphic transitions removed 35 transitions.
Iterating post reduction 0 with 35 rules applied. Total rules applied 105 place count 19 transition count 18
Applied a total of 105 rules in 2 ms. Remains 19 /54 variables (removed 35) and now considering 18/88 (removed 70) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 19/54 places, 18/88 transitions.
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 2 ms
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 2 ms
[2024-05-22 23:01:05] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 88/88 transitions.
Discarding 35 places :
Symmetric choice reduction at 0 with 35 rule applications. Total rules 35 place count 19 transition count 53
Iterating global reduction 0 with 35 rules applied. Total rules applied 70 place count 19 transition count 53
Ensure Unique test removed 35 transitions
Reduce isomorphic transitions removed 35 transitions.
Iterating post reduction 0 with 35 rules applied. Total rules applied 105 place count 19 transition count 18
Applied a total of 105 rules in 1 ms. Remains 19 /54 variables (removed 35) and now considering 18/88 (removed 70) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 19/54 places, 18/88 transitions.
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 2 ms
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 1 ms
[2024-05-22 23:01:05] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 88/88 transitions.
Discarding 29 places :
Symmetric choice reduction at 0 with 29 rule applications. Total rules 29 place count 25 transition count 59
Iterating global reduction 0 with 29 rules applied. Total rules applied 58 place count 25 transition count 59
Ensure Unique test removed 29 transitions
Reduce isomorphic transitions removed 29 transitions.
Iterating post reduction 0 with 29 rules applied. Total rules applied 87 place count 25 transition count 30
Applied a total of 87 rules in 2 ms. Remains 25 /54 variables (removed 29) and now considering 30/88 (removed 58) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/54 places, 30/88 transitions.
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 2 ms
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 19 ms
[2024-05-22 23:01:05] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 88/88 transitions.
Graph (complete) has 67 edges and 54 vertex of which 2 are kept as prefixes of interest. Removing 52 places using SCC suffix rule.16 ms
Discarding 52 places :
Also discarding 58 output transitions
Drop transitions (Output transitions of discarded places.) removed 58 transitions
Ensure Unique test removed 28 transitions
Reduce isomorphic transitions removed 28 transitions.
Iterating post reduction 0 with 28 rules applied. Total rules applied 29 place count 2 transition count 2
Applied a total of 29 rules in 29 ms. Remains 2 /54 variables (removed 52) and now considering 2/88 (removed 86) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 29 ms. Remains : 2/54 places, 2/88 transitions.
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 1 ms
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 1 ms
[2024-05-22 23:01:05] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 88/88 transitions.
Graph (complete) has 67 edges and 54 vertex of which 30 are kept as prefixes of interest. Removing 24 places using SCC suffix rule.1 ms
Discarding 24 places :
Also discarding 40 output transitions
Drop transitions (Output transitions of discarded places.) removed 40 transitions
Discarding 18 places :
Symmetric choice reduction at 0 with 18 rule applications. Total rules 19 place count 12 transition count 30
Iterating global reduction 0 with 18 rules applied. Total rules applied 37 place count 12 transition count 30
Ensure Unique test removed 18 transitions
Reduce isomorphic transitions removed 18 transitions.
Iterating post reduction 0 with 18 rules applied. Total rules applied 55 place count 12 transition count 12
Applied a total of 55 rules in 3 ms. Remains 12 /54 variables (removed 42) and now considering 12/88 (removed 76) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 12/54 places, 12/88 transitions.
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 1 ms
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 1 ms
[2024-05-22 23:01:05] [INFO ] Input system was already deterministic with 12 transitions.
RANDOM walk for 140 steps (21 resets) in 5 ms. (23 steps per ms) remains 0/1 properties
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 88/88 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 26 transition count 60
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 26 transition count 60
Ensure Unique test removed 28 transitions
Reduce isomorphic transitions removed 28 transitions.
Iterating post reduction 0 with 28 rules applied. Total rules applied 84 place count 26 transition count 32
Applied a total of 84 rules in 18 ms. Remains 26 /54 variables (removed 28) and now considering 32/88 (removed 56) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 18 ms. Remains : 26/54 places, 32/88 transitions.
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 2 ms
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 3 ms
[2024-05-22 23:01:05] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 88/88 transitions.
Discarding 35 places :
Symmetric choice reduction at 0 with 35 rule applications. Total rules 35 place count 19 transition count 53
Iterating global reduction 0 with 35 rules applied. Total rules applied 70 place count 19 transition count 53
Ensure Unique test removed 35 transitions
Reduce isomorphic transitions removed 35 transitions.
Iterating post reduction 0 with 35 rules applied. Total rules applied 105 place count 19 transition count 18
Applied a total of 105 rules in 2 ms. Remains 19 /54 variables (removed 35) and now considering 18/88 (removed 70) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 19/54 places, 18/88 transitions.
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 18 ms
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 1 ms
[2024-05-22 23:01:05] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 88/88 transitions.
Discarding 33 places :
Symmetric choice reduction at 0 with 33 rule applications. Total rules 33 place count 21 transition count 55
Iterating global reduction 0 with 33 rules applied. Total rules applied 66 place count 21 transition count 55
Ensure Unique test removed 33 transitions
Reduce isomorphic transitions removed 33 transitions.
Iterating post reduction 0 with 33 rules applied. Total rules applied 99 place count 21 transition count 22
Applied a total of 99 rules in 5 ms. Remains 21 /54 variables (removed 33) and now considering 22/88 (removed 66) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 21/54 places, 22/88 transitions.
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 2 ms
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 18 ms
[2024-05-22 23:01:05] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 88/88 transitions.
Discarding 33 places :
Symmetric choice reduction at 0 with 33 rule applications. Total rules 33 place count 21 transition count 55
Iterating global reduction 0 with 33 rules applied. Total rules applied 66 place count 21 transition count 55
Ensure Unique test removed 33 transitions
Reduce isomorphic transitions removed 33 transitions.
Iterating post reduction 0 with 33 rules applied. Total rules applied 99 place count 21 transition count 22
Applied a total of 99 rules in 5 ms. Remains 21 /54 variables (removed 33) and now considering 22/88 (removed 66) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 21/54 places, 22/88 transitions.
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 19 ms
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 3 ms
[2024-05-22 23:01:05] [INFO ] Input system was already deterministic with 22 transitions.
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 27 ms
[2024-05-22 23:01:05] [INFO ] Flatten gal took : 13 ms
[2024-05-22 23:01:05] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 7 ms.
[2024-05-22 23:01:05] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 54 places, 88 transitions and 195 arcs took 13 ms.
Total runtime 10881 ms.
There are residual formulas that ITS could not solve within timeout
----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2023
----------------------------------------------------------------------

Running AirplaneLD-PT-0010

IS_COLORED=
IS_NUPN=

LOADING PETRI NET FILE /home/mcc/execution/414/model.pnml (PNML) ...
PNML VERSION 2009, P/T NET.
COLOR CLASSES: 0
CONSTANTS: 0
PLACES: 54
TRANSITIONS: 88
COLOR VARS: 0
MEASURES: 0
LOADING TIME: [User 0.003s, Sys 0.000s]


SAVING FILE /home/mcc/execution/414/model (.net / .def) ...
EXPORT TIME: [User 0.000s, Sys 0.000s]


----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2022, University of Torino, Italy.
website: https://github.com/greatspn/SOURCES

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 550
MODEL NAME: /home/mcc/execution/414/model
54 places, 88 transitions.

Creating all event NSFs..
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Creating all event NSFs..
Building monolithic NSF...
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-04 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-00 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-06 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-07 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-10 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-12 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-02 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-01 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-15 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-05 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-13 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-PT-0010-CTLFireability-2024-14 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
Ok.
EXITCODE: 0
----------------------------------------------------------------------

BK_STOP 1716418868658

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-0010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="greatspnxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool greatspnxred"
echo " Input is AirplaneLD-PT-0010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r003-smll-171620117300242"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-0010.tgz
mv AirplaneLD-PT-0010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;