About the Execution of LoLa+red for PGCD-PT-D04N025
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 3515.460 | 90798.00 | 91640.00 | 723.60 | F??FFFTTFFTTTTTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r519-tall-167987245300465.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is PGCD-PT-D04N025, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r519-tall-167987245300465
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 468K
-rw-r--r-- 1 mcc users 6.6K Mar 23 15:25 CTLCardinality.txt
-rw-r--r-- 1 mcc users 72K Mar 23 15:25 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.3K Mar 23 15:23 CTLFireability.txt
-rw-r--r-- 1 mcc users 37K Mar 23 15:23 CTLFireability.xml
-rw-r--r-- 1 mcc users 5.1K Mar 23 07:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 34K Mar 23 07:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Mar 23 07:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 23 07:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 26 22:42 NewModel
-rw-r--r-- 1 mcc users 12K Mar 23 15:25 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 127K Mar 23 15:25 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.7K Mar 23 15:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 81K Mar 23 15:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Mar 23 07:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.7K Mar 23 07:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 26 22:42 instance
-rw-r--r-- 1 mcc users 6 Mar 26 22:42 iscolored
-rw-r--r-- 1 mcc users 9.3K Mar 31 16:48 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-00
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-01
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-02
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-03
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-04
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-05
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-06
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-07
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-08
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-09
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-10
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-11
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-12
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-13
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-14
FORMULA_NAME PGCD-PT-D04N025-CTLCardinality-15
=== Now, execution of the tool begins
BK_START 1680818445862
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PGCD-PT-D04N025
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2023-04-06 22:00:47] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-04-06 22:00:47] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-04-06 22:00:47] [INFO ] Load time of PNML (sax parser for PT used): 21 ms
[2023-04-06 22:00:47] [INFO ] Transformed 15 places.
[2023-04-06 22:00:47] [INFO ] Transformed 15 transitions.
[2023-04-06 22:00:47] [INFO ] Parsed PT model containing 15 places and 15 transitions and 70 arcs in 80 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 12 ms.
Initial state reduction rules removed 1 formulas.
FORMULA PGCD-PT-D04N025-CTLCardinality-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 15 out of 15 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 8 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
// Phase 1: matrix 15 rows 15 cols
[2023-04-06 22:00:47] [INFO ] Computed 6 invariants in 9 ms
[2023-04-06 22:00:47] [INFO ] Dead Transitions using invariants and state equation in 141 ms found 0 transitions.
[2023-04-06 22:00:47] [INFO ] Invariant cache hit.
[2023-04-06 22:00:47] [INFO ] Implicit Places using invariants in 28 ms returned []
[2023-04-06 22:00:47] [INFO ] Invariant cache hit.
[2023-04-06 22:00:47] [INFO ] State equation strengthened by 5 read => feed constraints.
[2023-04-06 22:00:47] [INFO ] Implicit Places using invariants and state equation in 38 ms returned []
Implicit Place search using SMT with State Equation took 68 ms to find 0 implicit places.
[2023-04-06 22:00:47] [INFO ] Invariant cache hit.
[2023-04-06 22:00:47] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 272 ms. Remains : 15/15 places, 15/15 transitions.
Support contains 15 out of 15 places after structural reductions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 14 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 4 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Incomplete random walk after 10005 steps, including 2 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 66) seen :63
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 3) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] After 35ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:1
[2023-04-06 22:00:48] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-06 22:00:48] [INFO ] [Nat]Absence check using 2 positive and 4 generalized place invariants in 1 ms returned sat
[2023-04-06 22:00:48] [INFO ] After 33ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 2 atomic propositions for a total of 15 simplifications.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 3 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 3 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 5 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 31 ms. Remains : 15/15 places, 15/15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 2 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 15/15 places, 15/15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 2 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 36 ms. Remains : 15/15 places, 15/15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 2 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] Dead Transitions using invariants and state equation in 30 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 15/15 places, 15/15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 2 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 2 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] Dead Transitions using invariants and state equation in 22 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 25 ms. Remains : 15/15 places, 15/15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 2 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 29 ms. Remains : 15/15 places, 15/15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 2 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 2 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 0 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 15/15 places, 15/15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 28 ms. Remains : 15/15 places, 15/15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 6 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 15/15 places, 15/15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] Dead Transitions using invariants and state equation in 29 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 15/15 places, 15/15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 2 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29 ms. Remains : 15/15 places, 15/15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] Dead Transitions using invariants and state equation in 22 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 15/15 places, 15/15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 27 ms. Remains : 15/15 places, 15/15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 0 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 15/15 places, 15/15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 15/15 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 15/15 (removed 0) transitions.
[2023-04-06 22:00:48] [INFO ] Invariant cache hit.
[2023-04-06 22:00:48] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 15/15 places, 15/15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Input system was already deterministic with 15 transitions.
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Flatten gal took : 1 ms
[2023-04-06 22:00:48] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 8 ms.
[2023-04-06 22:00:48] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 15 places, 15 transitions and 70 arcs took 0 ms.
Total runtime 1543 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT PGCD-PT-D04N025
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
FORMULA PGCD-PT-D04N025-CTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-PT-D04N025-CTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-PT-D04N025-CTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-PT-D04N025-CTLCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-PT-D04N025-CTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-PT-D04N025-CTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-PT-D04N025-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-PT-D04N025-CTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-PT-D04N025-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-PT-D04N025-CTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-PT-D04N025-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-PT-D04N025-CTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PGCD-PT-D04N025-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1680818536660
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
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lola: rewrite Frontend/Parser/formula_rewrite.k:703
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lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
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lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
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PGCD-PT-D04N025-CTLCardinality-13: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-14: CTL true CTL model checker
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PGCD-PT-D04N025-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-02: AGEF 0 0 0 0 1 0 1 0
PGCD-PT-D04N025-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-04: AFAG 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-07: EU 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 10/356 16/32 PGCD-PT-D04N025-CTLCardinality-10 3577424 m, 88458 m/sec, 19953734 t fired, .
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lola: FINISHED task # 31 (type EXCL) for PGCD-PT-D04N025-CTLCardinality-10
lola: result : true
lola: markings : 3601756
lola: fired transitions : 26368280
lola: time used : 14.000000
lola: memory pages used : 16
lola: LAUNCH task # 28 (type EXCL) for 27 PGCD-PT-D04N025-CTLCardinality-09
lola: time limit : 394 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PGCD-PT-D04N025-CTLCardinality-08: AXAG false state space /EXEF
PGCD-PT-D04N025-CTLCardinality-10: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-11: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-13: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-14: CTL true CTL model checker
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PGCD-PT-D04N025-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-02: AGEF 0 0 0 0 1 0 1 0
PGCD-PT-D04N025-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-04: AFAG 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-07: EU 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-09: CTL 0 0 1 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 1/394 3/32 PGCD-PT-D04N025-CTLCardinality-09 611606 m, 122321 m/sec, 1762537 t fired, .
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lola: FINISHED task # 28 (type EXCL) for PGCD-PT-D04N025-CTLCardinality-09
lola: result : false
lola: markings : 659130
lola: fired transitions : 1896777
lola: time used : 1.000000
lola: memory pages used : 3
lola: LAUNCH task # 19 (type EXCL) for 18 PGCD-PT-D04N025-CTLCardinality-06
lola: time limit : 443 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for PGCD-PT-D04N025-CTLCardinality-06
lola: result : true
lola: markings : 281478
lola: fired transitions : 1523916
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 10 (type EXCL) for 9 PGCD-PT-D04N025-CTLCardinality-03
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lola: FINISHED task # 10 (type EXCL) for PGCD-PT-D04N025-CTLCardinality-03
lola: result : false
lola: markings : 627
lola: fired transitions : 1310
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 PGCD-PT-D04N025-CTLCardinality-01
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lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PGCD-PT-D04N025-CTLCardinality-03: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-06: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-08: AXAG false state space /EXEF
PGCD-PT-D04N025-CTLCardinality-09: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-10: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-11: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-13: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-14: CTL true CTL model checker
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PGCD-PT-D04N025-CTLCardinality-01: CTL 0 0 1 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-02: AGEF 0 0 0 0 1 0 1 0
PGCD-PT-D04N025-CTLCardinality-04: AFAG 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-07: EU 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 4/591 8/32 PGCD-PT-D04N025-CTLCardinality-01 1860780 m, 372156 m/sec, 8015571 t fired, .
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PGCD-PT-D04N025-CTLCardinality-03: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-06: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-08: AXAG false state space /EXEF
PGCD-PT-D04N025-CTLCardinality-09: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-10: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-11: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-13: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-14: CTL true CTL model checker
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PGCD-PT-D04N025-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-01: CTL 0 0 1 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-02: AGEF 0 0 0 0 1 0 1 0
PGCD-PT-D04N025-CTLCardinality-04: AFAG 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-07: EU 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 9/591 17/32 PGCD-PT-D04N025-CTLCardinality-01 3975598 m, 422963 m/sec, 16891647 t fired, .
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PGCD-PT-D04N025-CTLCardinality-03: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-06: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-08: AXAG false state space /EXEF
PGCD-PT-D04N025-CTLCardinality-09: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-10: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-11: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-13: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-14: CTL true CTL model checker
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PGCD-PT-D04N025-CTLCardinality-02: AGEF 0 0 0 0 1 0 1 0
PGCD-PT-D04N025-CTLCardinality-04: AFAG 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-07: EU 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 14/591 24/32 PGCD-PT-D04N025-CTLCardinality-01 5644920 m, 333864 m/sec, 24291854 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PGCD-PT-D04N025-CTLCardinality-03: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-06: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-08: AXAG false state space /EXEF
PGCD-PT-D04N025-CTLCardinality-09: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-10: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-11: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-13: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-14: CTL true CTL model checker
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PGCD-PT-D04N025-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-01: CTL 0 0 0 0 1 0 1 0
PGCD-PT-D04N025-CTLCardinality-02: AGEF 0 0 0 0 1 0 1 0
PGCD-PT-D04N025-CTLCardinality-04: AFAG 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-07: EU 0 1 0 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
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lola: FINISHED task # 13 (type EXCL) for PGCD-PT-D04N025-CTLCardinality-04
lola: result : false
lola: markings : 365
lola: fired transitions : 726
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 PGCD-PT-D04N025-CTLCardinality-07
lola: time limit : 882 sec
lola: memory limit: 32 pages
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lola: result : true
lola: markings : 24
lola: fired transitions : 45
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lola: memory pages used : 1
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lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for PGCD-PT-D04N025-CTLCardinality-12
lola: result : true
lola: markings : 2530
lola: fired transitions : 15715
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 PGCD-PT-D04N025-CTLCardinality-00
lola: time limit : 1765 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PGCD-PT-D04N025-CTLCardinality-03: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-04: AFAG false CTL model checker
PGCD-PT-D04N025-CTLCardinality-06: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-07: EU true state space /EU
PGCD-PT-D04N025-CTLCardinality-08: AXAG false state space /EXEF
PGCD-PT-D04N025-CTLCardinality-09: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-10: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-11: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-12: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-13: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PGCD-PT-D04N025-CTLCardinality-00: CTL 0 0 1 0 1 0 0 0
PGCD-PT-D04N025-CTLCardinality-01: CTL 0 0 0 0 1 0 1 0
PGCD-PT-D04N025-CTLCardinality-02: AGEF 0 0 0 0 1 0 1 0
PGCD-PT-D04N025-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/1765 9/32 PGCD-PT-D04N025-CTLCardinality-00 2081147 m, 416229 m/sec, 11118304 t fired, .
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lola: FINISHED task # 1 (type EXCL) for PGCD-PT-D04N025-CTLCardinality-00
lola: result : false
lola: markings : 3594059
lola: fired transitions : 18450124
lola: time used : 9.000000
lola: memory pages used : 16
lola: LAUNCH task # 16 (type EXCL) for 15 PGCD-PT-D04N025-CTLCardinality-05
lola: time limit : 3521 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PGCD-PT-D04N025-CTLCardinality-00: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-03: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-04: AFAG false CTL model checker
PGCD-PT-D04N025-CTLCardinality-06: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-07: EU true state space /EU
PGCD-PT-D04N025-CTLCardinality-08: AXAG false state space /EXEF
PGCD-PT-D04N025-CTLCardinality-09: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-10: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-11: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-12: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-13: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PGCD-PT-D04N025-CTLCardinality-01: CTL 0 0 0 0 1 0 1 0
PGCD-PT-D04N025-CTLCardinality-02: AGEF 0 0 0 0 1 0 1 0
PGCD-PT-D04N025-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
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16 CTL EXCL 1/3521 2/32 PGCD-PT-D04N025-CTLCardinality-05 409800 m, 81960 m/sec, 1290835 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PGCD-PT-D04N025-CTLCardinality-00: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-03: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-04: AFAG false CTL model checker
PGCD-PT-D04N025-CTLCardinality-06: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-07: EU true state space /EU
PGCD-PT-D04N025-CTLCardinality-08: AXAG false state space /EXEF
PGCD-PT-D04N025-CTLCardinality-09: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-10: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-11: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-12: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-13: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PGCD-PT-D04N025-CTLCardinality-01: CTL 0 0 0 0 1 0 1 0
PGCD-PT-D04N025-CTLCardinality-02: AGEF 0 0 0 0 1 0 1 0
PGCD-PT-D04N025-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 6/3521 9/32 PGCD-PT-D04N025-CTLCardinality-05 1951788 m, 308397 m/sec, 12539988 t fired, .
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lola: FINISHED task # 16 (type EXCL) for PGCD-PT-D04N025-CTLCardinality-05
lola: result : false
lola: markings : 2141385
lola: fired transitions : 14743603
lola: time used : 7.000000
lola: memory pages used : 10
lola: Portfolio finished: no open tasks 15
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PGCD-PT-D04N025-CTLCardinality-00: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-01: CTL unknown AGGR
PGCD-PT-D04N025-CTLCardinality-02: AGEF unknown AGGR
PGCD-PT-D04N025-CTLCardinality-03: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-04: AFAG false CTL model checker
PGCD-PT-D04N025-CTLCardinality-05: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-06: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-07: EU true state space /EU
PGCD-PT-D04N025-CTLCardinality-08: AXAG false state space /EXEF
PGCD-PT-D04N025-CTLCardinality-09: CTL false CTL model checker
PGCD-PT-D04N025-CTLCardinality-10: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-11: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-12: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-13: CTL true CTL model checker
PGCD-PT-D04N025-CTLCardinality-14: CTL true CTL model checker
Time elapsed: 86 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PGCD-PT-D04N025"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is PGCD-PT-D04N025, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r519-tall-167987245300465"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PGCD-PT-D04N025.tgz
mv PGCD-PT-D04N025 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;