fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r519-tall-167987245200394
Last Updated
May 14, 2023

About the Execution of LoLa+red for PGCD-COL-D02N100

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
8343.367 150728.00 141930.00 893.50 FT??T??FF?T?FF?T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r519-tall-167987245200394.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is PGCD-COL-D02N100, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r519-tall-167987245200394
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 376K
-rw-r--r-- 1 mcc users 5.8K Mar 23 15:25 CTLCardinality.txt
-rw-r--r-- 1 mcc users 59K Mar 23 15:25 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.7K Mar 23 15:21 CTLFireability.txt
-rw-r--r-- 1 mcc users 43K Mar 23 15:21 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Mar 23 07:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Mar 23 07:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Mar 23 07:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 23 07:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 26 22:42 NewModel
-rw-r--r-- 1 mcc users 7.5K Mar 23 15:28 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 77K Mar 23 15:28 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.7K Mar 23 15:27 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 71K Mar 23 15:27 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 23 07:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 23 07:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 equiv_pt
-rw-r--r-- 1 mcc users 8 Mar 26 22:42 instance
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 iscolored
-rw-r--r-- 1 mcc users 11K Mar 31 16:48 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-00
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-01
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-02
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-03
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-04
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-05
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-06
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-07
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-08
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-09
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-10
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-11
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-12
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-13
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-14
FORMULA_NAME PGCD-COL-D02N100-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1680810921366

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PGCD-COL-D02N100
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2023-04-06 19:55:23] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-04-06 19:55:23] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-04-06 19:55:23] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-04-06 19:55:23] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-04-06 19:55:23] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 409 ms
[2023-04-06 19:55:23] [INFO ] Imported 3 HL places and 3 HL transitions for a total of 9 PT places and 9.0 transition bindings in 19 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
[2023-04-06 19:55:23] [INFO ] Built PT skeleton of HLPN with 3 places and 3 transitions 14 arcs in 4 ms.
[2023-04-06 19:55:23] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
All 16 properties of the HLPN use transition enablings in a way that makes the skeleton too coarse.
Arc [2:1*[(MOD (ADD $x 1) 3)]] contains successor/predecessor on variables of sort CD
[2023-04-06 19:55:23] [INFO ] Unfolded HLPN to a Petri net with 9 places and 9 transitions 42 arcs in 6 ms.
[2023-04-06 19:55:23] [INFO ] Unfolded 16 HLPN properties in 1 ms.
Support contains 9 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 5 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
// Phase 1: matrix 9 rows 9 cols
[2023-04-06 19:55:23] [INFO ] Computed 4 invariants in 5 ms
[2023-04-06 19:55:23] [INFO ] Dead Transitions using invariants and state equation in 149 ms found 0 transitions.
[2023-04-06 19:55:23] [INFO ] Invariant cache hit.
[2023-04-06 19:55:23] [INFO ] Implicit Places using invariants in 26 ms returned []
[2023-04-06 19:55:23] [INFO ] Invariant cache hit.
[2023-04-06 19:55:23] [INFO ] State equation strengthened by 3 read => feed constraints.
[2023-04-06 19:55:23] [INFO ] Implicit Places using invariants and state equation in 43 ms returned []
Implicit Place search using SMT with State Equation took 71 ms to find 0 implicit places.
[2023-04-06 19:55:23] [INFO ] Invariant cache hit.
[2023-04-06 19:55:23] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 283 ms. Remains : 9/9 places, 9/9 transitions.
Support contains 9 out of 9 places after structural reductions.
[2023-04-06 19:55:24] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 15 ms
FORMULA PGCD-COL-D02N100-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 7 ms
[2023-04-06 19:55:24] [INFO ] Input system was already deterministic with 9 transitions.
Incomplete random walk after 10084 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=296 ) properties (out of 18) seen :16
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-04-06 19:55:24] [INFO ] Invariant cache hit.
[2023-04-06 19:55:24] [INFO ] [Real]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-04-06 19:55:24] [INFO ] [Real]Absence check using 2 positive and 2 generalized place invariants in 2 ms returned sat
[2023-04-06 19:55:24] [INFO ] After 39ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:1
[2023-04-06 19:55:24] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-06 19:55:24] [INFO ] [Nat]Absence check using 2 positive and 2 generalized place invariants in 1 ms returned sat
[2023-04-06 19:55:24] [INFO ] After 71ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 2 atomic propositions for a total of 15 simplifications.
[2023-04-06 19:55:24] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 4 ms
FORMULA PGCD-COL-D02N100-CTLFireability-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 4 ms
[2023-04-06 19:55:24] [INFO ] Input system was already deterministic with 9 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 3 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 19:55:24] [INFO ] Invariant cache hit.
[2023-04-06 19:55:24] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 39 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:24] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 19:55:24] [INFO ] Invariant cache hit.
[2023-04-06 19:55:24] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 1 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 19:55:24] [INFO ] Invariant cache hit.
[2023-04-06 19:55:24] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 19:55:24] [INFO ] Invariant cache hit.
[2023-04-06 19:55:24] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 1 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 19:55:24] [INFO ] Invariant cache hit.
[2023-04-06 19:55:24] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 27 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 19:55:24] [INFO ] Invariant cache hit.
[2023-04-06 19:55:24] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 19:55:24] [INFO ] Invariant cache hit.
[2023-04-06 19:55:24] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 19:55:24] [INFO ] Invariant cache hit.
[2023-04-06 19:55:24] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 0 ms
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 19:55:24] [INFO ] Invariant cache hit.
[2023-04-06 19:55:24] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:24] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 19:55:24] [INFO ] Invariant cache hit.
[2023-04-06 19:55:24] [INFO ] Dead Transitions using invariants and state equation in 23 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 23 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 19:55:24] [INFO ] Invariant cache hit.
[2023-04-06 19:55:24] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 1 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 19:55:24] [INFO ] Invariant cache hit.
[2023-04-06 19:55:24] [INFO ] Dead Transitions using invariants and state equation in 29 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 19:55:24] [INFO ] Invariant cache hit.
[2023-04-06 19:55:24] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:24] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 19:55:24] [INFO ] Invariant cache hit.
[2023-04-06 19:55:25] [INFO ] Dead Transitions using invariants and state equation in 23 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 19:55:25] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:25] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:25] [INFO ] Input system was already deterministic with 9 transitions.
[2023-04-06 19:55:25] [INFO ] Flatten gal took : 3 ms
[2023-04-06 19:55:25] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:25] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-04-06 19:55:25] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 9 places, 9 transitions and 42 arcs took 0 ms.
Total runtime 1919 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT PGCD-COL-D02N100
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA PGCD-COL-D02N100-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PGCD-COL-D02N100-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PGCD-COL-D02N100-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PGCD-COL-D02N100-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PGCD-COL-D02N100-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PGCD-COL-D02N100-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PGCD-COL-D02N100-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1680811072094

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
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lola: rewrite Frontend/Parser/formula_rewrite.k:325
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PGCD-COL-D02N100-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 AGEF EXCL 5/1161 16/32 PGCD-COL-D02N100-CTLFireability-03 4057015 m, 811403 m/sec, 8415040 t fired, .

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PGCD-COL-D02N100-CTLFireability-04: CTL true CTL model checker
PGCD-COL-D02N100-CTLFireability-07: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-10: CTL true CTL model checker
PGCD-COL-D02N100-CTLFireability-12: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-13: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PGCD-COL-D02N100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D02N100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-03: EFAG 0 0 1 0 1 0 0 0
PGCD-COL-D02N100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D02N100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 AGEF EXCL 10/1161 28/32 PGCD-COL-D02N100-CTLFireability-03 7198898 m, 628376 m/sec, 15752438 t fired, .

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PGCD-COL-D02N100-CTLFireability-04: CTL true CTL model checker
PGCD-COL-D02N100-CTLFireability-07: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-10: CTL true CTL model checker
PGCD-COL-D02N100-CTLFireability-12: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-13: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PGCD-COL-D02N100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D02N100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-03: EFAG 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D02N100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: time limit : 1735 sec
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lola: FINISHED task # 1 (type EXCL) for PGCD-COL-D02N100-CTLFireability-00
lola: result : false
lola: markings : 2002
lola: fired transitions : 3044
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PGCD-COL-D02N100-CTLFireability-00: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-04: CTL true CTL model checker
PGCD-COL-D02N100-CTLFireability-07: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-10: CTL true CTL model checker
PGCD-COL-D02N100-CTLFireability-12: CTL false CTL model checker
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PGCD-COL-D02N100-CTLFireability-15: CTL true CTL model checker

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PGCD-COL-D02N100-CTLFireability-03: EFAG 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
PGCD-COL-D02N100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 5/3470 12/32 PGCD-COL-D02N100-CTLFireability-05 2811082 m, 562216 m/sec, 8792285 t fired, .

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PGCD-COL-D02N100-CTLFireability-00: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-04: CTL true CTL model checker
PGCD-COL-D02N100-CTLFireability-07: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-10: CTL true CTL model checker
PGCD-COL-D02N100-CTLFireability-12: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-13: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-15: CTL true CTL model checker

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PGCD-COL-D02N100-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
PGCD-COL-D02N100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 10/3470 23/32 PGCD-COL-D02N100-CTLFireability-05 5307195 m, 499222 m/sec, 16671872 t fired, .

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PGCD-COL-D02N100-CTLFireability-00: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-04: CTL true CTL model checker
PGCD-COL-D02N100-CTLFireability-07: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-10: CTL true CTL model checker
PGCD-COL-D02N100-CTLFireability-12: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-13: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PGCD-COL-D02N100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-03: EFAG 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D02N100-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PGCD-COL-D02N100-CTLFireability-00: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-02: CTL unknown AGGR
PGCD-COL-D02N100-CTLFireability-03: EFAG unknown AGGR
PGCD-COL-D02N100-CTLFireability-04: CTL true CTL model checker
PGCD-COL-D02N100-CTLFireability-05: CTL unknown AGGR
PGCD-COL-D02N100-CTLFireability-06: CTL unknown AGGR
PGCD-COL-D02N100-CTLFireability-07: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-09: CTL unknown AGGR
PGCD-COL-D02N100-CTLFireability-10: CTL true CTL model checker
PGCD-COL-D02N100-CTLFireability-11: CTL unknown AGGR
PGCD-COL-D02N100-CTLFireability-12: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-13: CTL false CTL model checker
PGCD-COL-D02N100-CTLFireability-14: CTL unknown AGGR
PGCD-COL-D02N100-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PGCD-COL-D02N100"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is PGCD-COL-D02N100, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r519-tall-167987245200394"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PGCD-COL-D02N100.tgz
mv PGCD-COL-D02N100 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;