Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r519-tall-167987245200346.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Murphy-PT-D2N100, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r519-tall-167987245200346
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 524K
-rw-r--r-- 1 mcc users 6.6K Mar 23 15:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Mar 23 15:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Mar 23 15:21 CTLFireability.txt
-rw-r--r-- 1 mcc users 55K Mar 23 15:21 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.4K Mar 23 07:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Mar 23 07:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Mar 23 07:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Mar 23 07:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 26 22:42 NewModel
-rw-r--r-- 1 mcc users 16K Mar 23 15:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 178K Mar 23 15:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Mar 23 15:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 69K Mar 23 15:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Mar 23 07:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.3K Mar 23 07:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 26 22:42 instance
-rw-r--r-- 1 mcc users 6 Mar 26 22:42 iscolored
-rw-r--r-- 1 mcc users 12K Mar 31 16:48 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-00
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-01
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-02
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-03
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-04
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-05
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-06
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-07
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-08
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-09
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-10
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-11
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-12
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-13
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-14
FORMULA_NAME Murphy-PT-D2N100-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1680855500815

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Murphy-PT-D2N100
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2023-04-07 08:18:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-04-07 08:18:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-04-07 08:18:22] [INFO ] Load time of PNML (sax parser for PT used): 21 ms
[2023-04-07 08:18:22] [INFO ] Transformed 18 places.
[2023-04-07 08:18:22] [INFO ] Transformed 21 transitions.
[2023-04-07 08:18:22] [INFO ] Parsed PT model containing 18 places and 21 transitions and 81 arcs in 79 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Initial state reduction rules removed 1 formulas.
FORMULA Murphy-PT-D2N100-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 18 out of 18 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 8 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
// Phase 1: matrix 21 rows 18 cols
[2023-04-07 08:18:22] [INFO ] Computed 4 invariants in 10 ms
[2023-04-07 08:18:22] [INFO ] Dead Transitions using invariants and state equation in 169 ms found 0 transitions.
[2023-04-07 08:18:22] [INFO ] Invariant cache hit.
[2023-04-07 08:18:22] [INFO ] Implicit Places using invariants in 20 ms returned []
[2023-04-07 08:18:22] [INFO ] Invariant cache hit.
[2023-04-07 08:18:22] [INFO ] State equation strengthened by 6 read => feed constraints.
[2023-04-07 08:18:22] [INFO ] Implicit Places using invariants and state equation in 41 ms returned []
Implicit Place search using SMT with State Equation took 63 ms to find 0 implicit places.
[2023-04-07 08:18:22] [INFO ] Invariant cache hit.
[2023-04-07 08:18:22] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 298 ms. Remains : 18/18 places, 21/21 transitions.
Support contains 18 out of 18 places after structural reductions.
[2023-04-07 08:18:22] [INFO ] Flatten gal took : 14 ms
[2023-04-07 08:18:22] [INFO ] Flatten gal took : 5 ms
[2023-04-07 08:18:22] [INFO ] Input system was already deterministic with 21 transitions.
Incomplete random walk after 10094 steps, including 2 resets, run finished after 92 ms. (steps per millisecond=109 ) properties (out of 43) seen :37
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
[2023-04-07 08:18:23] [INFO ] Invariant cache hit.
[2023-04-07 08:18:23] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-07 08:18:23] [INFO ] [Real]Absence check using 2 positive and 2 generalized place invariants in 0 ms returned sat
[2023-04-07 08:18:23] [INFO ] After 86ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:6
[2023-04-07 08:18:23] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-07 08:18:23] [INFO ] [Nat]Absence check using 2 positive and 2 generalized place invariants in 0 ms returned sat
[2023-04-07 08:18:23] [INFO ] After 19ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :6
[2023-04-07 08:18:23] [INFO ] State equation strengthened by 6 read => feed constraints.
[2023-04-07 08:18:23] [INFO ] After 11ms SMT Verify possible using 6 Read/Feed constraints in natural domain returned unsat :0 sat :6
[2023-04-07 08:18:23] [INFO ] After 29ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :6
Attempting to minimize the solution found.
Minimization took 16 ms.
[2023-04-07 08:18:23] [INFO ] After 113ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :6
Fused 6 Parikh solutions to 4 different solutions.
Parikh walk visited 0 properties in 37 ms.
Support contains 8 out of 18 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 4 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:23] [INFO ] Invariant cache hit.
[2023-04-07 08:18:23] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 49 ms. Remains : 18/18 places, 21/21 transitions.
Incomplete random walk after 10066 steps, including 2 resets, run finished after 57 ms. (steps per millisecond=176 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 6) seen :0
Interrupted probabilistic random walk after 264648 steps, run timeout after 3001 ms. (steps per millisecond=88 ) properties seen :{}
Probabilistic random walk after 264648 steps, saw 173280 distinct states, run finished after 3002 ms. (steps per millisecond=88 ) properties seen :0
Running SMT prover for 6 properties.
[2023-04-07 08:18:26] [INFO ] Invariant cache hit.
[2023-04-07 08:18:26] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-07 08:18:26] [INFO ] [Real]Absence check using 2 positive and 2 generalized place invariants in 1 ms returned sat
[2023-04-07 08:18:26] [INFO ] After 49ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:6
[2023-04-07 08:18:26] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-07 08:18:26] [INFO ] [Nat]Absence check using 2 positive and 2 generalized place invariants in 1 ms returned sat
[2023-04-07 08:18:27] [INFO ] After 21ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :6
[2023-04-07 08:18:27] [INFO ] State equation strengthened by 6 read => feed constraints.
[2023-04-07 08:18:27] [INFO ] After 11ms SMT Verify possible using 6 Read/Feed constraints in natural domain returned unsat :0 sat :6
[2023-04-07 08:18:27] [INFO ] After 36ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :6
Attempting to minimize the solution found.
Minimization took 12 ms.
[2023-04-07 08:18:27] [INFO ] After 100ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :6
Fused 6 Parikh solutions to 4 different solutions.
Parikh walk visited 0 properties in 18 ms.
Support contains 8 out of 18 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1 ms. Remains : 18/18 places, 21/21 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:27] [INFO ] Invariant cache hit.
[2023-04-07 08:18:27] [INFO ] Implicit Places using invariants in 24 ms returned [6, 7, 8]
Discarding 3 places :
Implicit Place search using SMT only with invariants took 26 ms to find 3 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 1 : 15/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 21/21 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 2 iterations and 28 ms. Remains : 15/18 places, 21/21 transitions.
Incomplete random walk after 10020 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 6) seen :0
Interrupted probabilistic random walk after 328393 steps, run timeout after 3001 ms. (steps per millisecond=109 ) properties seen :{}
Probabilistic random walk after 328393 steps, saw 211994 distinct states, run finished after 3001 ms. (steps per millisecond=109 ) properties seen :0
Running SMT prover for 6 properties.
// Phase 1: matrix 21 rows 15 cols
[2023-04-07 08:18:30] [INFO ] Computed 1 invariants in 3 ms
[2023-04-07 08:18:30] [INFO ] [Real]Absence check using 1 positive place invariants in 0 ms returned sat
[2023-04-07 08:18:30] [INFO ] After 66ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:6
[2023-04-07 08:18:30] [INFO ] [Nat]Absence check using 1 positive place invariants in 0 ms returned sat
[2023-04-07 08:18:30] [INFO ] After 16ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :6
[2023-04-07 08:18:30] [INFO ] State equation strengthened by 6 read => feed constraints.
[2023-04-07 08:18:30] [INFO ] After 13ms SMT Verify possible using 6 Read/Feed constraints in natural domain returned unsat :0 sat :6
[2023-04-07 08:18:30] [INFO ] After 27ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :6
Attempting to minimize the solution found.
Minimization took 9 ms.
[2023-04-07 08:18:30] [INFO ] After 87ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :6
Parikh walk visited 0 properties in 25 ms.
Support contains 8 out of 15 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 15/15 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 21/21 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1 ms. Remains : 15/15 places, 21/21 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 15/15 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 15 /15 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:30] [INFO ] Invariant cache hit.
[2023-04-07 08:18:30] [INFO ] Implicit Places using invariants in 23 ms returned []
[2023-04-07 08:18:30] [INFO ] Invariant cache hit.
[2023-04-07 08:18:30] [INFO ] State equation strengthened by 6 read => feed constraints.
[2023-04-07 08:18:30] [INFO ] Implicit Places using invariants and state equation in 30 ms returned []
Implicit Place search using SMT with State Equation took 54 ms to find 0 implicit places.
[2023-04-07 08:18:30] [INFO ] Redundant transitions in 0 ms returned []
[2023-04-07 08:18:30] [INFO ] Invariant cache hit.
[2023-04-07 08:18:30] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 86 ms. Remains : 15/15 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 21/21 (removed 0) transitions.
Running SMT prover for 6 properties.
[2023-04-07 08:18:30] [INFO ] Invariant cache hit.
[2023-04-07 08:18:30] [INFO ] [Real]Absence check using 1 positive place invariants in 1 ms returned sat
[2023-04-07 08:18:30] [INFO ] After 51ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:6
[2023-04-07 08:18:30] [INFO ] [Nat]Absence check using 1 positive place invariants in 0 ms returned sat
[2023-04-07 08:18:30] [INFO ] After 25ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :6
[2023-04-07 08:18:30] [INFO ] State equation strengthened by 6 read => feed constraints.
[2023-04-07 08:18:30] [INFO ] After 12ms SMT Verify possible using 6 Read/Feed constraints in natural domain returned unsat :0 sat :6
[2023-04-07 08:18:30] [INFO ] After 24ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :6
Attempting to minimize the solution found.
Minimization took 11 ms.
[2023-04-07 08:18:30] [INFO ] After 95ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :6
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 7 ms
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 6 ms
[2023-04-07 08:18:30] [INFO ] Input system was already deterministic with 21 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
// Phase 1: matrix 21 rows 18 cols
[2023-04-07 08:18:30] [INFO ] Computed 4 invariants in 1 ms
[2023-04-07 08:18:30] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 28 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 5 ms
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:30] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:30] [INFO ] Invariant cache hit.
[2023-04-07 08:18:30] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:18:30] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:30] [INFO ] Invariant cache hit.
[2023-04-07 08:18:30] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:30] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:30] [INFO ] Invariant cache hit.
[2023-04-07 08:18:30] [INFO ] Dead Transitions using invariants and state equation in 21 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 23 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:30] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:30] [INFO ] Invariant cache hit.
[2023-04-07 08:18:30] [INFO ] Dead Transitions using invariants and state equation in 22 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 24 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:30] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:30] [INFO ] Invariant cache hit.
[2023-04-07 08:18:30] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:18:30] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:30] [INFO ] Invariant cache hit.
[2023-04-07 08:18:30] [INFO ] Dead Transitions using invariants and state equation in 23 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:30] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:30] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 2 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:30] [INFO ] Invariant cache hit.
[2023-04-07 08:18:31] [INFO ] Dead Transitions using invariants and state equation in 23 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 25 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:31] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:31] [INFO ] Invariant cache hit.
[2023-04-07 08:18:31] [INFO ] Dead Transitions using invariants and state equation in 21 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 21 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:18:31] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:31] [INFO ] Invariant cache hit.
[2023-04-07 08:18:31] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:18:31] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:31] [INFO ] Invariant cache hit.
[2023-04-07 08:18:31] [INFO ] Dead Transitions using invariants and state equation in 38 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 38 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:18:31] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:31] [INFO ] Invariant cache hit.
[2023-04-07 08:18:31] [INFO ] Dead Transitions using invariants and state equation in 21 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 21 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:18:31] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:31] [INFO ] Invariant cache hit.
[2023-04-07 08:18:31] [INFO ] Dead Transitions using invariants and state equation in 29 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 30 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:31] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:31] [INFO ] Invariant cache hit.
[2023-04-07 08:18:31] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:18:31] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 08:18:31] [INFO ] Invariant cache hit.
[2023-04-07 08:18:31] [INFO ] Dead Transitions using invariants and state equation in 23 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 23 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:18:31] [INFO ] Input system was already deterministic with 21 transitions.
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:31] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:18:31] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-04-07 08:18:31] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 18 places, 21 transitions and 81 arcs took 0 ms.
Total runtime 9055 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Murphy-PT-D2N100
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA Murphy-PT-D2N100-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D2N100-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D2N100-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D2N100-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D2N100-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D2N100-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D2N100-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D2N100-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1680855667572

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 10 (type EXCL) for 9 Murphy-PT-D2N100-CTLFireability-03
lola: time limit : 116 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 65 (type FNDP) for 43 Murphy-PT-D2N100-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type EQUN) for 43 Murphy-PT-D2N100-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 68 (type SRCH) for 43 Murphy-PT-D2N100-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 68 (type SRCH) for Murphy-PT-D2N100-CTLFireability-13
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 65 (type FNDP) for Murphy-PT-D2N100-CTLFireability-13
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 66 (type EQUN) for Murphy-PT-D2N100-CTLFireability-13 (obsolete)
lola: planning for (null) stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 66 (type EQUN) for Murphy-PT-D2N100-CTLFireability-13
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-PT-D2N100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Murphy-PT-D2N100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Murphy-PT-D2N100-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-PT-D2N100-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
Murphy-PT-D2N100-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Murphy-PT-D2N100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Murphy-PT-D2N100-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Murphy-PT-D2N100-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Murphy-PT-D2N100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Murphy-PT-D2N100-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Murphy-PT-D2N100-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Murphy-PT-D2N100-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Murphy-PT-D2N100-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
Murphy-PT-D2N100-CTLFireability-13: CONJ 0 1 0 0 9 0 0 3
Murphy-PT-D2N100-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/225 15/32 Murphy-PT-D2N100-CTLFireability-03 3500566 m, 700113 m/sec, 6068184 t fired, .

Time elapsed: 5 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

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Murphy-PT-D2N100-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-PT-D2N100-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Murphy-PT-D2N100-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-07: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 5/3460 15/32 Murphy-PT-D2N100-CTLFireability-04 3462766 m, 692553 m/sec, 6385286 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-PT-D2N100-CTLFireability-02: CTL false CTL model checker
Murphy-PT-D2N100-CTLFireability-08: CTL false CTL model checker
Murphy-PT-D2N100-CTLFireability-09: CTL false CTL model checker
Murphy-PT-D2N100-CTLFireability-10: CTL true CTL model checker
Murphy-PT-D2N100-CTLFireability-11: CTL false CTL model checker
Murphy-PT-D2N100-CTLFireability-12: CONJ false CTL model checker
Murphy-PT-D2N100-CTLFireability-13: CONJ false CTL model checker
Murphy-PT-D2N100-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-PT-D2N100-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Murphy-PT-D2N100-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-07: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 10/3460 27/32 Murphy-PT-D2N100-CTLFireability-04 6343176 m, 576082 m/sec, 11813670 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-PT-D2N100-CTLFireability-02: CTL false CTL model checker
Murphy-PT-D2N100-CTLFireability-08: CTL false CTL model checker
Murphy-PT-D2N100-CTLFireability-09: CTL false CTL model checker
Murphy-PT-D2N100-CTLFireability-10: CTL true CTL model checker
Murphy-PT-D2N100-CTLFireability-11: CTL false CTL model checker
Murphy-PT-D2N100-CTLFireability-12: CONJ false CTL model checker
Murphy-PT-D2N100-CTLFireability-13: CONJ false CTL model checker
Murphy-PT-D2N100-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-PT-D2N100-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Murphy-PT-D2N100-CTLFireability-07: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-PT-D2N100-CTLFireability-00: CTL unknown AGGR
Murphy-PT-D2N100-CTLFireability-01: CTL unknown AGGR
Murphy-PT-D2N100-CTLFireability-02: CTL false CTL model checker
Murphy-PT-D2N100-CTLFireability-03: CTL unknown AGGR
Murphy-PT-D2N100-CTLFireability-04: CTL unknown AGGR
Murphy-PT-D2N100-CTLFireability-05: CTL unknown AGGR
Murphy-PT-D2N100-CTLFireability-06: CTL unknown AGGR
Murphy-PT-D2N100-CTLFireability-07: CTL unknown AGGR
Murphy-PT-D2N100-CTLFireability-08: CTL false CTL model checker
Murphy-PT-D2N100-CTLFireability-09: CTL false CTL model checker
Murphy-PT-D2N100-CTLFireability-10: CTL true CTL model checker
Murphy-PT-D2N100-CTLFireability-11: CTL false CTL model checker
Murphy-PT-D2N100-CTLFireability-12: CONJ false CTL model checker
Murphy-PT-D2N100-CTLFireability-13: CONJ false CTL model checker
Murphy-PT-D2N100-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Murphy-PT-D2N100"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Murphy-PT-D2N100, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r519-tall-167987245200346"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Murphy-PT-D2N100.tgz
mv Murphy-PT-D2N100 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;