fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r519-tall-167987245100330
Last Updated
May 14, 2023

About the Execution of LoLa+red for Murphy-PT-D1N010

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
326.743 7798.00 15471.00 324.90 TFFFTFTTFTFTTFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r519-tall-167987245100330.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Murphy-PT-D1N010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r519-tall-167987245100330
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 524K
-rw-r--r-- 1 mcc users 7.6K Mar 23 15:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K Mar 23 15:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K Mar 23 15:21 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Mar 23 15:21 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Mar 23 07:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Mar 23 07:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Mar 23 07:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 23 07:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 26 22:42 NewModel
-rw-r--r-- 1 mcc users 13K Mar 23 15:23 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 145K Mar 23 15:23 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Mar 23 15:23 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 112K Mar 23 15:23 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 23 07:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Mar 23 07:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 26 22:42 instance
-rw-r--r-- 1 mcc users 6 Mar 26 22:42 iscolored
-rw-r--r-- 1 mcc users 7.6K Mar 31 16:48 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-00
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-01
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-02
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-03
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-04
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-05
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-06
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-07
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-08
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-09
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-10
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-11
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-12
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-13
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-14
FORMULA_NAME Murphy-PT-D1N010-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1680854637918

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Murphy-PT-D1N010
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2023-04-07 08:03:59] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-04-07 08:03:59] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-04-07 08:03:59] [INFO ] Load time of PNML (sax parser for PT used): 21 ms
[2023-04-07 08:03:59] [INFO ] Transformed 12 places.
[2023-04-07 08:03:59] [INFO ] Transformed 14 transitions.
[2023-04-07 08:03:59] [INFO ] Parsed PT model containing 12 places and 14 transitions and 54 arcs in 140 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Support contains 12 out of 12 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 9 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
// Phase 1: matrix 14 rows 12 cols
[2023-04-07 08:03:59] [INFO ] Computed 3 invariants in 8 ms
[2023-04-07 08:03:59] [INFO ] Dead Transitions using invariants and state equation in 144 ms found 0 transitions.
[2023-04-07 08:03:59] [INFO ] Invariant cache hit.
[2023-04-07 08:03:59] [INFO ] Implicit Places using invariants in 24 ms returned []
[2023-04-07 08:03:59] [INFO ] Invariant cache hit.
[2023-04-07 08:03:59] [INFO ] State equation strengthened by 4 read => feed constraints.
[2023-04-07 08:03:59] [INFO ] Implicit Places using invariants and state equation in 38 ms returned []
Implicit Place search using SMT with State Equation took 64 ms to find 0 implicit places.
[2023-04-07 08:03:59] [INFO ] Invariant cache hit.
[2023-04-07 08:03:59] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 267 ms. Remains : 12/12 places, 14/14 transitions.
Support contains 12 out of 12 places after structural reductions.
[2023-04-07 08:04:00] [INFO ] Flatten gal took : 13 ms
[2023-04-07 08:04:00] [INFO ] Flatten gal took : 4 ms
[2023-04-07 08:04:00] [INFO ] Input system was already deterministic with 14 transitions.
Incomplete random walk after 10010 steps, including 2 resets, run finished after 237 ms. (steps per millisecond=42 ) properties (out of 31) seen :25
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
[2023-04-07 08:04:00] [INFO ] Invariant cache hit.
[2023-04-07 08:04:00] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-07 08:04:00] [INFO ] [Real]Absence check using 2 positive and 1 generalized place invariants in 0 ms returned sat
[2023-04-07 08:04:00] [INFO ] After 69ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:6
[2023-04-07 08:04:00] [INFO ] [Nat]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-04-07 08:04:00] [INFO ] [Nat]Absence check using 2 positive and 1 generalized place invariants in 0 ms returned sat
[2023-04-07 08:04:00] [INFO ] After 21ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :6
[2023-04-07 08:04:00] [INFO ] State equation strengthened by 4 read => feed constraints.
[2023-04-07 08:04:00] [INFO ] After 15ms SMT Verify possible using 4 Read/Feed constraints in natural domain returned unsat :0 sat :6
[2023-04-07 08:04:00] [INFO ] After 32ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :6
Attempting to minimize the solution found.
Minimization took 15 ms.
[2023-04-07 08:04:00] [INFO ] After 108ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :6
Parikh walk visited 0 properties in 7 ms.
Support contains 7 out of 12 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 5 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
[2023-04-07 08:04:00] [INFO ] Invariant cache hit.
[2023-04-07 08:04:00] [INFO ] Dead Transitions using invariants and state equation in 22 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 28 ms. Remains : 12/12 places, 14/14 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 6) seen :0
Probably explored full state space saw : 39780 states, properties seen :0
Probabilistic random walk after 307764 steps, saw 39780 distinct states, run finished after 758 ms. (steps per millisecond=406 ) properties seen :0
Explored full state space saw : 39780 states, properties seen :0
Exhaustive walk after 307764 steps, saw 39780 distinct states, run finished after 768 ms. (steps per millisecond=400 ) properties seen :0
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 6 atomic propositions for a total of 16 simplifications.
[2023-04-07 08:04:02] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 12 ms
FORMULA Murphy-PT-D1N010-CTLFireability-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Murphy-PT-D1N010-CTLFireability-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 3 ms
[2023-04-07 08:04:02] [INFO ] Input system was already deterministic with 14 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
[2023-04-07 08:04:02] [INFO ] Invariant cache hit.
[2023-04-07 08:04:02] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29 ms. Remains : 12/12 places, 14/14 transitions.
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 3 ms
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:04:02] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 1 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
[2023-04-07 08:04:02] [INFO ] Invariant cache hit.
[2023-04-07 08:04:02] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 12/12 places, 14/14 transitions.
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 2 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
[2023-04-07 08:04:02] [INFO ] Invariant cache hit.
[2023-04-07 08:04:02] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 27 ms. Remains : 12/12 places, 14/14 transitions.
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 1 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
[2023-04-07 08:04:02] [INFO ] Invariant cache hit.
[2023-04-07 08:04:02] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29 ms. Remains : 12/12 places, 14/14 transitions.
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
[2023-04-07 08:04:02] [INFO ] Invariant cache hit.
[2023-04-07 08:04:02] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 12/12 places, 14/14 transitions.
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
[2023-04-07 08:04:02] [INFO ] Invariant cache hit.
[2023-04-07 08:04:02] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 12/12 places, 14/14 transitions.
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
[2023-04-07 08:04:02] [INFO ] Invariant cache hit.
[2023-04-07 08:04:02] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29 ms. Remains : 12/12 places, 14/14 transitions.
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
[2023-04-07 08:04:02] [INFO ] Invariant cache hit.
[2023-04-07 08:04:02] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 12/12 places, 14/14 transitions.
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
[2023-04-07 08:04:02] [INFO ] Invariant cache hit.
[2023-04-07 08:04:02] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 12/12 places, 14/14 transitions.
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
[2023-04-07 08:04:02] [INFO ] Invariant cache hit.
[2023-04-07 08:04:02] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 12/12 places, 14/14 transitions.
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
[2023-04-07 08:04:02] [INFO ] Invariant cache hit.
[2023-04-07 08:04:02] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 12/12 places, 14/14 transitions.
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:02] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
[2023-04-07 08:04:02] [INFO ] Invariant cache hit.
[2023-04-07 08:04:02] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 34 ms. Remains : 12/12 places, 14/14 transitions.
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 2 ms
[2023-04-07 08:04:02] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:03] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
[2023-04-07 08:04:03] [INFO ] Invariant cache hit.
[2023-04-07 08:04:03] [INFO ] Dead Transitions using invariants and state equation in 21 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 22 ms. Remains : 12/12 places, 14/14 transitions.
[2023-04-07 08:04:03] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:03] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:03] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 14/14 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 14/14 (removed 0) transitions.
[2023-04-07 08:04:03] [INFO ] Invariant cache hit.
[2023-04-07 08:04:03] [INFO ] Dead Transitions using invariants and state equation in 21 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 22 ms. Remains : 12/12 places, 14/14 transitions.
[2023-04-07 08:04:03] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:03] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:03] [INFO ] Input system was already deterministic with 14 transitions.
[2023-04-07 08:04:03] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:03] [INFO ] Flatten gal took : 1 ms
[2023-04-07 08:04:03] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-04-07 08:04:03] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 12 places, 14 transitions and 54 arcs took 0 ms.
Total runtime 3718 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Murphy-PT-D1N010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA Murphy-PT-D1N010-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D1N010-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D1N010-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D1N010-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D1N010-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D1N010-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D1N010-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D1N010-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D1N010-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D1N010-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D1N010-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D1N010-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D1N010-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-PT-D1N010-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1680854645716

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:207
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:207
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 4 (type EXCL) for 3 Murphy-PT-D1N010-CTLFireability-02
lola: time limit : 116 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 68 (type FNDP) for 18 Murphy-PT-D1N010-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type EQUN) for 18 Murphy-PT-D1N010-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type SRCH) for 18 Murphy-PT-D1N010-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 68 (type FNDP) for Murphy-PT-D1N010-CTLFireability-08
lola: Created skeleton in 0.000000 secs.
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 69 (type EQUN) for Murphy-PT-D1N010-CTLFireability-08 (obsolete)
lola: CANCELED task # 71 (type SRCH) for Murphy-PT-D1N010-CTLFireability-08 (obsolete)
lola: FINISHED task # 71 (type SRCH) for Murphy-PT-D1N010-CTLFireability-08
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 74 (type FNDP) for 43 Murphy-PT-D1N010-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/373/CTLFireability-69.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 69 (type EQUN) for Murphy-PT-D1N010-CTLFireability-08
lola: result : true
lola: FINISHED task # 4 (type EXCL) for Murphy-PT-D1N010-CTLFireability-02
lola: result : false
lola: markings : 39780
lola: fired transitions : 672577
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 58 (type EXCL) for 57 Murphy-PT-D1N010-CTLFireability-13
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 58 (type EXCL) for Murphy-PT-D1N010-CTLFireability-13
lola: result : false
lola: markings : 39780
lola: fired transitions : 307769
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 55 (type EXCL) for 54 Murphy-PT-D1N010-CTLFireability-12
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: FINISHED task # 55 (type EXCL) for Murphy-PT-D1N010-CTLFireability-12
lola: result : true
lola: markings : 460
lola: fired transitions : 1520
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 50 (type EXCL) for 43 Murphy-PT-D1N010-CTLFireability-11
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for Murphy-PT-D1N010-CTLFireability-11
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 74 (type FNDP) for Murphy-PT-D1N010-CTLFireability-11 (obsolete)
lola: LAUNCH task # 41 (type EXCL) for 40 Murphy-PT-D1N010-CTLFireability-10
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 74 (type FNDP) for Murphy-PT-D1N010-CTLFireability-11
lola: result : unknown
lola: fired transitions : 2187291
lola: tried executions : 4
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 41 (type EXCL) for Murphy-PT-D1N010-CTLFireability-10
lola: result : false
lola: markings : 39780
lola: fired transitions : 534460
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 29 Murphy-PT-D1N010-CTLFireability-09
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for Murphy-PT-D1N010-CTLFireability-09
lola: result : false
lola: markings : 39780
lola: fired transitions : 301541
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 29 Murphy-PT-D1N010-CTLFireability-09
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for Murphy-PT-D1N010-CTLFireability-09
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 18 Murphy-PT-D1N010-CTLFireability-08
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for Murphy-PT-D1N010-CTLFireability-08
lola: result : true
lola: markings : 25
lola: fired transitions : 26
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 Murphy-PT-D1N010-CTLFireability-07
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for Murphy-PT-D1N010-CTLFireability-07
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 Murphy-PT-D1N010-CTLFireability-06
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for Murphy-PT-D1N010-CTLFireability-06
lola: result : true
lola: markings : 39780
lola: fired transitions : 304468
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 Murphy-PT-D1N010-CTLFireability-05
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for Murphy-PT-D1N010-CTLFireability-05
lola: result : false
lola: markings : 39780
lola: fired transitions : 489377
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 67 (type EXCL) for 18 Murphy-PT-D1N010-CTLFireability-08
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 67 (type EXCL) for Murphy-PT-D1N010-CTLFireability-08
lola: result : true
lola: markings : 4
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 66 (type EXCL) for 0 Murphy-PT-D1N010-CTLFireability-01
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 66 (type EXCL) for Murphy-PT-D1N010-CTLFireability-01
lola: result : true
lola: markings : 32045
lola: fired transitions : 108785
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 61 (type EXCL) for 60 Murphy-PT-D1N010-CTLFireability-14
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 61 (type EXCL) for Murphy-PT-D1N010-CTLFireability-14
lola: result : false
lola: markings : 2
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 Murphy-PT-D1N010-CTLFireability-03
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for Murphy-PT-D1N010-CTLFireability-03
lola: result : false
lola: markings : 15795
lola: fired transitions : 51683
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 64 (type EXCL) for 63 Murphy-PT-D1N010-CTLFireability-15
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 64 (type EXCL) for Murphy-PT-D1N010-CTLFireability-15
lola: result : true
lola: markings : 754
lola: fired transitions : 1769
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-PT-D1N010-CTLFireability-01: EFAG false tscc_search
Murphy-PT-D1N010-CTLFireability-02: CTL false CTL model checker
Murphy-PT-D1N010-CTLFireability-03: CTL false CTL model checker
Murphy-PT-D1N010-CTLFireability-05: CTL false CTL model checker
Murphy-PT-D1N010-CTLFireability-06: CTL true CTL model checker
Murphy-PT-D1N010-CTLFireability-07: CTL true CTL model checker
Murphy-PT-D1N010-CTLFireability-08: CONJ false state space / EG
Murphy-PT-D1N010-CTLFireability-09: DISJ true state space /EXEF
Murphy-PT-D1N010-CTLFireability-10: CTL false CTL model checker
Murphy-PT-D1N010-CTLFireability-11: DISJ true CTL model checker
Murphy-PT-D1N010-CTLFireability-12: CTL true CTL model checker
Murphy-PT-D1N010-CTLFireability-13: CTL false CTL model checker
Murphy-PT-D1N010-CTLFireability-14: CTL false CTL model checker
Murphy-PT-D1N010-CTLFireability-15: CTL true CTL model checker


Time elapsed: 1 secs. Pages in use: 2

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Murphy-PT-D1N010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Murphy-PT-D1N010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r519-tall-167987245100330"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Murphy-PT-D1N010.tgz
mv Murphy-PT-D1N010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;