About the Execution of LoLa+red for Murphy-COL-D4N050
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 3927.983 | 64142.00 | 97074.00 | 450.30 | FFTF?FTTTFTTTTFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r519-tall-167987245100322.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Murphy-COL-D4N050, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r519-tall-167987245100322
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 396K
-rw-r--r-- 1 mcc users 5.7K Mar 23 15:21 CTLCardinality.txt
-rw-r--r-- 1 mcc users 58K Mar 23 15:21 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.1K Mar 23 15:20 CTLFireability.txt
-rw-r--r-- 1 mcc users 33K Mar 23 15:20 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.0K Mar 23 07:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 21K Mar 23 07:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Mar 23 07:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 23 07:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 26 22:42 NewModel
-rw-r--r-- 1 mcc users 12K Mar 23 15:23 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 125K Mar 23 15:23 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Mar 23 15:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 41K Mar 23 15:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 23 07:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 23 07:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 equiv_pt
-rw-r--r-- 1 mcc users 7 Mar 26 22:42 instance
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 iscolored
-rw-r--r-- 1 mcc users 20K Mar 31 16:48 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-00
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-01
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-02
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-03
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-04
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-05
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-06
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-07
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-08
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-09
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-10
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-11
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-12
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-13
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-14
FORMULA_NAME Murphy-COL-D4N050-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1680853221794
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Murphy-COL-D4N050
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2023-04-07 07:40:23] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-04-07 07:40:23] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-04-07 07:40:23] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-04-07 07:40:23] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-04-07 07:40:23] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 417 ms
[2023-04-07 07:40:23] [INFO ] Imported 6 HL places and 7 HL transitions for a total of 30 PT places and 35.0 transition bindings in 89 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 11 ms.
[2023-04-07 07:40:23] [INFO ] Built PT skeleton of HLPN with 6 places and 7 transitions 27 arcs in 4 ms.
[2023-04-07 07:40:23] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Initial state reduction rules removed 1 formulas.
FORMULA Murphy-COL-D4N050-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 4 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 0 stable transitions
Finished random walk after 6 steps, including 0 resets, run visited all 4 properties in 7 ms. (steps per millisecond=0 )
Parikh walk visited 0 properties in 0 ms.
[2023-04-07 07:40:23] [INFO ] Flatten gal took : 13 ms
[2023-04-07 07:40:23] [INFO ] Flatten gal took : 1 ms
Arc [2:1*[(MOD (ADD $x 1) 5)]] contains successor/predecessor on variables of sort CD
[2023-04-07 07:40:23] [INFO ] Unfolded HLPN to a Petri net with 30 places and 35 transitions 135 arcs in 7 ms.
[2023-04-07 07:40:23] [INFO ] Unfolded 15 HLPN properties in 0 ms.
Support contains 30 out of 30 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 6 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
// Phase 1: matrix 35 rows 30 cols
[2023-04-07 07:40:24] [INFO ] Computed 6 invariants in 4 ms
[2023-04-07 07:40:24] [INFO ] Dead Transitions using invariants and state equation in 163 ms found 0 transitions.
[2023-04-07 07:40:24] [INFO ] Invariant cache hit.
[2023-04-07 07:40:24] [INFO ] Implicit Places using invariants in 24 ms returned []
[2023-04-07 07:40:24] [INFO ] Invariant cache hit.
[2023-04-07 07:40:24] [INFO ] State equation strengthened by 10 read => feed constraints.
[2023-04-07 07:40:24] [INFO ] Implicit Places using invariants and state equation in 56 ms returned []
Implicit Place search using SMT with State Equation took 85 ms to find 0 implicit places.
[2023-04-07 07:40:24] [INFO ] Invariant cache hit.
[2023-04-07 07:40:24] [INFO ] Dead Transitions using invariants and state equation in 39 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 296 ms. Remains : 30/30 places, 35/35 transitions.
Support contains 30 out of 30 places after structural reductions.
[2023-04-07 07:40:24] [INFO ] Flatten gal took : 8 ms
[2023-04-07 07:40:24] [INFO ] Flatten gal took : 8 ms
[2023-04-07 07:40:24] [INFO ] Input system was already deterministic with 35 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 115 ms. (steps per millisecond=86 ) properties (out of 18) seen :13
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 58 ms. (steps per millisecond=172 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-04-07 07:40:24] [INFO ] Invariant cache hit.
[2023-04-07 07:40:24] [INFO ] [Real]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-04-07 07:40:24] [INFO ] [Real]Absence check using 2 positive and 4 generalized place invariants in 0 ms returned sat
[2023-04-07 07:40:24] [INFO ] After 45ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:4
[2023-04-07 07:40:24] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-07 07:40:24] [INFO ] [Nat]Absence check using 2 positive and 4 generalized place invariants in 6 ms returned sat
[2023-04-07 07:40:24] [INFO ] After 35ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :4
[2023-04-07 07:40:24] [INFO ] State equation strengthened by 10 read => feed constraints.
[2023-04-07 07:40:24] [INFO ] After 31ms SMT Verify possible using 10 Read/Feed constraints in natural domain returned unsat :1 sat :4
[2023-04-07 07:40:24] [INFO ] After 71ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :4
Attempting to minimize the solution found.
Minimization took 29 ms.
[2023-04-07 07:40:25] [INFO ] After 195ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :4
Fused 5 Parikh solutions to 4 different solutions.
Parikh walk visited 0 properties in 42 ms.
Support contains 25 out of 30 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 5 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:25] [INFO ] Invariant cache hit.
[2023-04-07 07:40:25] [INFO ] Dead Transitions using invariants and state equation in 40 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 46 ms. Remains : 30/30 places, 35/35 transitions.
Incomplete random walk after 10047 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=257 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 282251 steps, run timeout after 3001 ms. (steps per millisecond=94 ) properties seen :{}
Probabilistic random walk after 282251 steps, saw 193697 distinct states, run finished after 3002 ms. (steps per millisecond=94 ) properties seen :0
Running SMT prover for 4 properties.
[2023-04-07 07:40:28] [INFO ] Invariant cache hit.
[2023-04-07 07:40:28] [INFO ] [Real]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-04-07 07:40:28] [INFO ] [Real]Absence check using 2 positive and 4 generalized place invariants in 1 ms returned sat
[2023-04-07 07:40:28] [INFO ] After 38ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-04-07 07:40:28] [INFO ] [Nat]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-04-07 07:40:28] [INFO ] [Nat]Absence check using 2 positive and 4 generalized place invariants in 2 ms returned sat
[2023-04-07 07:40:28] [INFO ] After 27ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-04-07 07:40:28] [INFO ] State equation strengthened by 10 read => feed constraints.
[2023-04-07 07:40:28] [INFO ] After 24ms SMT Verify possible using 10 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-04-07 07:40:28] [INFO ] After 53ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 29 ms.
[2023-04-07 07:40:28] [INFO ] After 143ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 27 ms.
Support contains 25 out of 30 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 2 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 2 ms. Remains : 30/30 places, 35/35 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:28] [INFO ] Invariant cache hit.
[2023-04-07 07:40:28] [INFO ] Implicit Places using invariants in 21 ms returned []
[2023-04-07 07:40:28] [INFO ] Invariant cache hit.
[2023-04-07 07:40:28] [INFO ] State equation strengthened by 10 read => feed constraints.
[2023-04-07 07:40:28] [INFO ] Implicit Places using invariants and state equation in 33 ms returned []
Implicit Place search using SMT with State Equation took 55 ms to find 0 implicit places.
[2023-04-07 07:40:28] [INFO ] Redundant transitions in 0 ms returned []
[2023-04-07 07:40:28] [INFO ] Invariant cache hit.
[2023-04-07 07:40:28] [INFO ] Dead Transitions using invariants and state equation in 30 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 91 ms. Remains : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
Running SMT prover for 4 properties.
[2023-04-07 07:40:28] [INFO ] Invariant cache hit.
[2023-04-07 07:40:28] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-07 07:40:28] [INFO ] [Real]Absence check using 2 positive and 4 generalized place invariants in 1 ms returned sat
[2023-04-07 07:40:28] [INFO ] After 26ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-04-07 07:40:28] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-07 07:40:28] [INFO ] [Nat]Absence check using 2 positive and 4 generalized place invariants in 3 ms returned sat
[2023-04-07 07:40:28] [INFO ] After 33ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-04-07 07:40:28] [INFO ] State equation strengthened by 10 read => feed constraints.
[2023-04-07 07:40:28] [INFO ] After 21ms SMT Verify possible using 10 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-04-07 07:40:28] [INFO ] Deduced a trap composed of 2 places in 24 ms of which 1 ms to minimize.
[2023-04-07 07:40:28] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 32 ms
[2023-04-07 07:40:28] [INFO ] Deduced a trap composed of 2 places in 18 ms of which 2 ms to minimize.
[2023-04-07 07:40:28] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 24 ms
[2023-04-07 07:40:28] [INFO ] After 105ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 21 ms.
[2023-04-07 07:40:28] [INFO ] After 192ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Successfully simplified 1 atomic propositions for a total of 15 simplifications.
[2023-04-07 07:40:28] [INFO ] Flatten gal took : 4 ms
[2023-04-07 07:40:28] [INFO ] Flatten gal took : 8 ms
[2023-04-07 07:40:28] [INFO ] Input system was already deterministic with 35 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:28] [INFO ] Invariant cache hit.
[2023-04-07 07:40:28] [INFO ] Dead Transitions using invariants and state equation in 41 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 41 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:40:28] [INFO ] Flatten gal took : 4 ms
[2023-04-07 07:40:28] [INFO ] Flatten gal took : 3 ms
[2023-04-07 07:40:28] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:28] [INFO ] Invariant cache hit.
[2023-04-07 07:40:28] [INFO ] Dead Transitions using invariants and state equation in 30 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:40:28] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:28] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:28] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:28] [INFO ] Invariant cache hit.
[2023-04-07 07:40:29] [INFO ] Dead Transitions using invariants and state equation in 42 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:29] [INFO ] Invariant cache hit.
[2023-04-07 07:40:29] [INFO ] Dead Transitions using invariants and state equation in 29 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 1 ms
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:29] [INFO ] Invariant cache hit.
[2023-04-07 07:40:29] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 1 ms
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:29] [INFO ] Invariant cache hit.
[2023-04-07 07:40:29] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 3 ms
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 2 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:29] [INFO ] Invariant cache hit.
[2023-04-07 07:40:29] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 30 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 1 ms
[2023-04-07 07:40:29] [INFO ] Input system was already deterministic with 35 transitions.
Finished random walk after 609 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=609 )
FORMULA Murphy-COL-D4N050-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Parikh walk visited 0 properties in 0 ms.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:29] [INFO ] Invariant cache hit.
[2023-04-07 07:40:29] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 4 ms
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:29] [INFO ] Invariant cache hit.
[2023-04-07 07:40:29] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 28 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Input system was already deterministic with 35 transitions.
Finished random walk after 56 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=56 )
FORMULA Murphy-COL-D4N050-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Parikh walk visited 0 properties in 0 ms.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:29] [INFO ] Invariant cache hit.
[2023-04-07 07:40:29] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:29] [INFO ] Invariant cache hit.
[2023-04-07 07:40:29] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:29] [INFO ] Invariant cache hit.
[2023-04-07 07:40:29] [INFO ] Dead Transitions using invariants and state equation in 39 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 41 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 1 ms
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:29] [INFO ] Invariant cache hit.
[2023-04-07 07:40:29] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 1 ms
[2023-04-07 07:40:29] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:29] [INFO ] Invariant cache hit.
[2023-04-07 07:40:29] [INFO ] Dead Transitions using invariants and state equation in 30 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 30 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 1 ms
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:40:29] [INFO ] Invariant cache hit.
[2023-04-07 07:40:29] [INFO ] Dead Transitions using invariants and state equation in 29 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:40:29] [INFO ] Input system was already deterministic with 35 transitions.
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 3 ms
[2023-04-07 07:40:29] [INFO ] Flatten gal took : 4 ms
[2023-04-07 07:40:29] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-04-07 07:40:29] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 30 places, 35 transitions and 135 arcs took 1 ms.
Total runtime 6281 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Murphy-COL-D4N050
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability
FORMULA Murphy-COL-D4N050-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N050-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N050-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N050-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N050-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N050-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N050-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N050-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N050-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N050-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N050-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N050-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1680853285936
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 12 (type EXCL) for 11 Murphy-COL-D4N050-CTLFireability-01
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 72 (type FNDP) for 52 Murphy-COL-D4N050-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 73 (type EQUN) for 52 Murphy-COL-D4N050-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type SRCH) for 52 Murphy-COL-D4N050-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 78 (type SRCH) for Murphy-COL-D4N050-CTLFireability-15
lola: result : unknown
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 69 (type FNDP) for 41 Murphy-COL-D4N050-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 72 (type FNDP) for Murphy-COL-D4N050-CTLFireability-15
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 73 (type EQUN) for Murphy-COL-D4N050-CTLFireability-15 (obsolete)
lola: LAUNCH task # 71 (type EQUN) for 41 Murphy-COL-D4N050-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SRCH) for 41 Murphy-COL-D4N050-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 76 (type SRCH) for Murphy-COL-D4N050-CTLFireability-13
lola: result : unknown
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/375/CTLFireability-73.sara.
sara: try reading problem file /home/mcc/execution/375/CTLFireability-71.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: warning, failure of lp_solve (at job 2)
sara: warning, failure of lp_solve (at job 2)
lola: FINISHED task # 73 (type EQUN) for Murphy-COL-D4N050-CTLFireability-15
lola: result : true
sara: warning, failure of lp_solve (at job 2)
sara: warning, failure of lp_solve (at job 2)
sara: warning, failure of lp_solve (at job 2)
lola: FINISHED task # 71 (type EQUN) for Murphy-COL-D4N050-CTLFireability-13
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N050-CTLFireability-15: DISJ true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N050-CTLFireability-00: CONJ 0 3 0 0 3 0 0 0
Murphy-COL-D4N050-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-13: DISJ 0 3 1 0 5 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
12 CTL EXCL 5/225 11/32 Murphy-COL-D4N050-CTLFireability-01 2215021 m, 443004 m/sec, 8919122 t fired, .
69 EF FNDP 5/3600 0/5 Murphy-COL-D4N050-CTLFireability-13 6893391 t fired, 7 attempts, .
Time elapsed: 5 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 13
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N050-CTLFireability-15: DISJ true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N050-CTLFireability-00: CONJ 0 3 0 0 3 0 0 0
Murphy-COL-D4N050-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-13: DISJ 0 3 1 0 5 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
12 CTL EXCL 10/225 21/32 Murphy-COL-D4N050-CTLFireability-01 4251975 m, 407390 m/sec, 17459924 t fired, .
69 EF FNDP 10/3600 0/5 Murphy-COL-D4N050-CTLFireability-13 13510836 t fired, 14 attempts, .
Time elapsed: 10 secs. Pages in use: 21
# running tasks: 2 of 4 Visible: 13
lola: FINISHED task # 12 (type EXCL) for Murphy-COL-D4N050-CTLFireability-01
lola: result : false
lola: markings : 5794324
lola: fired transitions : 23483979
lola: time used : 14.000000
lola: memory pages used : 28
lola: LAUNCH task # 67 (type EXCL) for 41 Murphy-COL-D4N050-CTLFireability-13
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: FINISHED task # 67 (type EXCL) for Murphy-COL-D4N050-CTLFireability-13
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 41 Murphy-COL-D4N050-CTLFireability-13
lola: time limit : 256 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N050-CTLFireability-01: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-15: DISJ true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N050-CTLFireability-00: CONJ 0 3 0 0 3 0 0 0
Murphy-COL-D4N050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-13: DISJ 0 1 2 0 6 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 1/256 4/32 Murphy-COL-D4N050-CTLFireability-13 619126 m, 123825 m/sec, 1655635 t fired, .
69 EF FNDP 15/3600 0/5 Murphy-COL-D4N050-CTLFireability-13 20054392 t fired, 21 attempts, .
Time elapsed: 15 secs. Pages in use: 28
# running tasks: 2 of 4 Visible: 13
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N050-CTLFireability-01: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-15: DISJ true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N050-CTLFireability-00: CONJ 0 3 0 0 3 0 0 0
Murphy-COL-D4N050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-13: DISJ 0 1 2 0 6 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 6/256 16/32 Murphy-COL-D4N050-CTLFireability-13 3152841 m, 506743 m/sec, 9631422 t fired, .
69 EF FNDP 20/3600 0/5 Murphy-COL-D4N050-CTLFireability-13 26460894 t fired, 27 attempts, .
Time elapsed: 20 secs. Pages in use: 28
# running tasks: 2 of 4 Visible: 13
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N050-CTLFireability-01: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-15: DISJ true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N050-CTLFireability-00: CONJ 0 3 0 0 3 0 0 0
Murphy-COL-D4N050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-13: DISJ 0 1 2 0 6 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 11/256 28/32 Murphy-COL-D4N050-CTLFireability-13 5745567 m, 518545 m/sec, 17568158 t fired, .
69 EF FNDP 25/3600 0/5 Murphy-COL-D4N050-CTLFireability-13 32803644 t fired, 33 attempts, .
Time elapsed: 25 secs. Pages in use: 28
# running tasks: 2 of 4 Visible: 13
lola: FINISHED task # 46 (type EXCL) for Murphy-COL-D4N050-CTLFireability-13
lola: result : true
lola: markings : 5794323
lola: fired transitions : 17689693
lola: time used : 12.000000
lola: memory pages used : 28
lola: CANCELED task # 69 (type FNDP) for Murphy-COL-D4N050-CTLFireability-13 (obsolete)
lola: LAUNCH task # 39 (type EXCL) for 38 Murphy-COL-D4N050-CTLFireability-12
lola: time limit : 297 sec
lola: memory limit: 32 pages
lola: FINISHED task # 69 (type FNDP) for Murphy-COL-D4N050-CTLFireability-13
lola: result : unknown
lola: fired transitions : 33514693
lola: tried executions : 35
lola: time used : 26.000000
lola: memory pages used : 0
lola: FINISHED task # 39 (type EXCL) for Murphy-COL-D4N050-CTLFireability-12
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 35 Murphy-COL-D4N050-CTLFireability-11
lola: time limit : 324 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for Murphy-COL-D4N050-CTLFireability-11
lola: result : true
lola: markings : 301
lola: fired transitions : 1204
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 33 (type EXCL) for 32 Murphy-COL-D4N050-CTLFireability-10
lola: time limit : 357 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for Murphy-COL-D4N050-CTLFireability-10
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 30 (type EXCL) for 29 Murphy-COL-D4N050-CTLFireability-09
lola: time limit : 397 sec
lola: memory limit: 32 pages
lola: FINISHED task # 30 (type EXCL) for Murphy-COL-D4N050-CTLFireability-09
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 27 (type EXCL) for 26 Murphy-COL-D4N050-CTLFireability-07
lola: time limit : 446 sec
lola: memory limit: 32 pages
lola: FINISHED task # 27 (type EXCL) for Murphy-COL-D4N050-CTLFireability-07
lola: result : true
lola: markings : 308
lola: fired transitions : 663
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 23 Murphy-COL-D4N050-CTLFireability-05
lola: time limit : 510 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for Murphy-COL-D4N050-CTLFireability-05
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 21 (type EXCL) for 20 Murphy-COL-D4N050-CTLFireability-04
lola: time limit : 595 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N050-CTLFireability-01: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-05: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-07: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-09: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-10: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-11: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-12: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-13: DISJ true DISJ
Murphy-COL-D4N050-CTLFireability-15: DISJ true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N050-CTLFireability-00: CONJ 0 3 0 0 3 0 0 0
Murphy-COL-D4N050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
21 CTL EXCL 4/595 6/32 Murphy-COL-D4N050-CTLFireability-04 1352034 m, 270406 m/sec, 3166976 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N050-CTLFireability-01: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-05: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-07: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-09: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-10: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-11: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-12: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-13: DISJ true DISJ
Murphy-COL-D4N050-CTLFireability-15: DISJ true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N050-CTLFireability-00: CONJ 0 3 0 0 3 0 0 0
Murphy-COL-D4N050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
21 CTL EXCL 9/595 13/32 Murphy-COL-D4N050-CTLFireability-04 2912767 m, 312146 m/sec, 6709106 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N050-CTLFireability-01: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-05: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-07: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-09: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-10: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-11: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-12: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-13: DISJ true DISJ
Murphy-COL-D4N050-CTLFireability-15: DISJ true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N050-CTLFireability-00: CONJ 0 3 0 0 3 0 0 0
Murphy-COL-D4N050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
21 CTL EXCL 14/595 19/32 Murphy-COL-D4N050-CTLFireability-04 4313272 m, 280101 m/sec, 9944832 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N050-CTLFireability-01: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-05: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-07: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-09: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-10: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-11: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-12: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-13: DISJ true DISJ
Murphy-COL-D4N050-CTLFireability-15: DISJ true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N050-CTLFireability-00: CONJ 0 3 0 0 3 0 0 0
Murphy-COL-D4N050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
21 CTL EXCL 19/595 25/32 Murphy-COL-D4N050-CTLFireability-04 5700898 m, 277525 m/sec, 13145891 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N050-CTLFireability-01: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-05: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-07: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-09: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-10: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-11: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-12: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-13: DISJ true DISJ
Murphy-COL-D4N050-CTLFireability-15: DISJ true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N050-CTLFireability-00: CONJ 0 3 0 0 3 0 0 0
Murphy-COL-D4N050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
21 CTL EXCL 24/595 31/32 Murphy-COL-D4N050-CTLFireability-04 7092227 m, 278265 m/sec, 16349069 t fired, .
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lola: CANCELED task # 21 (type EXCL) for Murphy-COL-D4N050-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N050-CTLFireability-01: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-05: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-07: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-09: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-10: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-11: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-12: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-13: DISJ true DISJ
Murphy-COL-D4N050-CTLFireability-15: DISJ true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N050-CTLFireability-00: CONJ 0 3 0 0 3 0 0 0
Murphy-COL-D4N050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N050-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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# running tasks: 1 of 4 Visible: 13
lola: LAUNCH task # 18 (type EXCL) for 17 Murphy-COL-D4N050-CTLFireability-03
lola: time limit : 709 sec
lola: memory limit: 32 pages
lola: FINISHED task # 18 (type EXCL) for Murphy-COL-D4N050-CTLFireability-03
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 15 (type EXCL) for 14 Murphy-COL-D4N050-CTLFireability-02
lola: time limit : 886 sec
lola: memory limit: 32 pages
lola: FINISHED task # 15 (type EXCL) for Murphy-COL-D4N050-CTLFireability-02
lola: result : true
lola: markings : 29163
lola: fired transitions : 30250
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 9 (type EXCL) for 0 Murphy-COL-D4N050-CTLFireability-00
lola: time limit : 1181 sec
lola: memory limit: 32 pages
lola: FINISHED task # 9 (type EXCL) for Murphy-COL-D4N050-CTLFireability-00
lola: result : false
lola: markings : 300
lola: fired transitions : 649
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 13
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N050-CTLFireability-00: CONJ false CTL model checker
Murphy-COL-D4N050-CTLFireability-01: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-02: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-03: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-04: CTL unknown AGGR
Murphy-COL-D4N050-CTLFireability-05: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-07: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-09: CTL false CTL model checker
Murphy-COL-D4N050-CTLFireability-10: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-11: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-12: CTL true CTL model checker
Murphy-COL-D4N050-CTLFireability-13: DISJ true DISJ
Murphy-COL-D4N050-CTLFireability-15: DISJ true findpath
Time elapsed: 55 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Murphy-COL-D4N050"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Murphy-COL-D4N050, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r519-tall-167987245100322"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Murphy-COL-D4N050.tgz
mv Murphy-COL-D4N050 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;