About the Execution of LoLa+red for Murphy-COL-D4N025
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
5573.695 | 89785.00 | 94596.00 | 575.90 | ?T??FTTFFTF?FTTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r519-tall-167987245100314.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Murphy-COL-D4N025, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r519-tall-167987245100314
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 460K
-rw-r--r-- 1 mcc users 7.8K Mar 23 15:21 CTLCardinality.txt
-rw-r--r-- 1 mcc users 87K Mar 23 15:21 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Mar 23 15:20 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Mar 23 15:20 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K Mar 23 07:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Mar 23 07:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Mar 23 07:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Mar 23 07:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 26 22:42 NewModel
-rw-r--r-- 1 mcc users 9.0K Mar 23 15:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 95K Mar 23 15:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Mar 23 15:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 78K Mar 23 15:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 23 07:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 23 07:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 equiv_pt
-rw-r--r-- 1 mcc users 7 Mar 26 22:42 instance
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 iscolored
-rw-r--r-- 1 mcc users 20K Mar 31 16:48 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-00
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-01
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-02
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-03
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-04
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-05
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-06
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-07
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-08
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-09
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-10
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-11
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-12
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-13
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-14
FORMULA_NAME Murphy-COL-D4N025-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1680851515833
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Murphy-COL-D4N025
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2023-04-07 07:11:57] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-04-07 07:11:57] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-04-07 07:11:57] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-04-07 07:11:57] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-04-07 07:11:57] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 502 ms
[2023-04-07 07:11:57] [INFO ] Imported 6 HL places and 7 HL transitions for a total of 30 PT places and 35.0 transition bindings in 16 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 16 ms.
FORMULA Murphy-COL-D4N025-CTLFireability-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-04-07 07:11:57] [INFO ] Built PT skeleton of HLPN with 6 places and 7 transitions 27 arcs in 4 ms.
[2023-04-07 07:11:57] [INFO ] Skeletonized 15 HLPN properties in 2 ms.
Initial state reduction rules removed 2 formulas.
FORMULA Murphy-COL-D4N025-CTLFireability-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Murphy-COL-D4N025-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 2 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 0 stable transitions
Finished random walk after 6 steps, including 0 resets, run visited all 2 properties in 6 ms. (steps per millisecond=1 )
Parikh walk visited 0 properties in 1 ms.
[2023-04-07 07:11:58] [INFO ] Flatten gal took : 12 ms
[2023-04-07 07:11:58] [INFO ] Flatten gal took : 1 ms
Arc [2:1*[(MOD (ADD $x 1) 5)]] contains successor/predecessor on variables of sort CD
[2023-04-07 07:11:58] [INFO ] Unfolded HLPN to a Petri net with 30 places and 35 transitions 135 arcs in 7 ms.
[2023-04-07 07:11:58] [INFO ] Unfolded 13 HLPN properties in 1 ms.
Support contains 30 out of 30 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 6 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
// Phase 1: matrix 35 rows 30 cols
[2023-04-07 07:11:58] [INFO ] Computed 6 invariants in 4 ms
[2023-04-07 07:11:58] [INFO ] Dead Transitions using invariants and state equation in 199 ms found 0 transitions.
[2023-04-07 07:11:58] [INFO ] Invariant cache hit.
[2023-04-07 07:11:58] [INFO ] Implicit Places using invariants in 33 ms returned []
[2023-04-07 07:11:58] [INFO ] Invariant cache hit.
[2023-04-07 07:11:58] [INFO ] State equation strengthened by 10 read => feed constraints.
[2023-04-07 07:11:58] [INFO ] Implicit Places using invariants and state equation in 52 ms returned []
Implicit Place search using SMT with State Equation took 86 ms to find 0 implicit places.
[2023-04-07 07:11:58] [INFO ] Invariant cache hit.
[2023-04-07 07:11:58] [INFO ] Dead Transitions using invariants and state equation in 39 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 334 ms. Remains : 30/30 places, 35/35 transitions.
Support contains 30 out of 30 places after structural reductions.
[2023-04-07 07:11:58] [INFO ] Flatten gal took : 11 ms
[2023-04-07 07:11:58] [INFO ] Flatten gal took : 10 ms
[2023-04-07 07:11:58] [INFO ] Input system was already deterministic with 35 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 202 ms. (steps per millisecond=49 ) properties (out of 34) seen :30
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
[2023-04-07 07:11:58] [INFO ] Invariant cache hit.
[2023-04-07 07:11:58] [INFO ] [Real]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-04-07 07:11:58] [INFO ] [Real]Absence check using 2 positive and 4 generalized place invariants in 0 ms returned sat
[2023-04-07 07:11:58] [INFO ] After 56ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-04-07 07:11:59] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-07 07:11:59] [INFO ] [Nat]Absence check using 2 positive and 4 generalized place invariants in 0 ms returned sat
[2023-04-07 07:11:59] [INFO ] After 48ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-04-07 07:11:59] [INFO ] State equation strengthened by 10 read => feed constraints.
[2023-04-07 07:11:59] [INFO ] After 30ms SMT Verify possible using 10 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-04-07 07:11:59] [INFO ] After 69ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 32 ms.
[2023-04-07 07:11:59] [INFO ] After 205ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 62 ms.
Support contains 30 out of 30 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 4 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:11:59] [INFO ] Invariant cache hit.
[2023-04-07 07:11:59] [INFO ] Dead Transitions using invariants and state equation in 41 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 46 ms. Remains : 30/30 places, 35/35 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 92 ms. (steps per millisecond=108 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 259905 steps, run timeout after 3001 ms. (steps per millisecond=86 ) properties seen :{}
Probabilistic random walk after 259905 steps, saw 179209 distinct states, run finished after 3007 ms. (steps per millisecond=86 ) properties seen :0
Running SMT prover for 4 properties.
[2023-04-07 07:12:02] [INFO ] Invariant cache hit.
[2023-04-07 07:12:02] [INFO ] [Real]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-04-07 07:12:02] [INFO ] [Real]Absence check using 2 positive and 4 generalized place invariants in 2 ms returned sat
[2023-04-07 07:12:02] [INFO ] After 55ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-04-07 07:12:02] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-07 07:12:02] [INFO ] [Nat]Absence check using 2 positive and 4 generalized place invariants in 1 ms returned sat
[2023-04-07 07:12:02] [INFO ] After 34ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-04-07 07:12:02] [INFO ] State equation strengthened by 10 read => feed constraints.
[2023-04-07 07:12:02] [INFO ] After 24ms SMT Verify possible using 10 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-04-07 07:12:02] [INFO ] After 60ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 22 ms.
[2023-04-07 07:12:02] [INFO ] After 160ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 37 ms.
Support contains 30 out of 30 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 2 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 2 ms. Remains : 30/30 places, 35/35 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:12:02] [INFO ] Invariant cache hit.
[2023-04-07 07:12:02] [INFO ] Implicit Places using invariants in 21 ms returned []
[2023-04-07 07:12:02] [INFO ] Invariant cache hit.
[2023-04-07 07:12:02] [INFO ] State equation strengthened by 10 read => feed constraints.
[2023-04-07 07:12:02] [INFO ] Implicit Places using invariants and state equation in 34 ms returned []
Implicit Place search using SMT with State Equation took 57 ms to find 0 implicit places.
[2023-04-07 07:12:02] [INFO ] Redundant transitions in 0 ms returned []
[2023-04-07 07:12:02] [INFO ] Invariant cache hit.
[2023-04-07 07:12:02] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 96 ms. Remains : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
Running SMT prover for 4 properties.
[2023-04-07 07:12:02] [INFO ] Invariant cache hit.
[2023-04-07 07:12:02] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-07 07:12:02] [INFO ] [Real]Absence check using 2 positive and 4 generalized place invariants in 1 ms returned sat
[2023-04-07 07:12:02] [INFO ] After 31ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-04-07 07:12:02] [INFO ] [Nat]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-04-07 07:12:02] [INFO ] [Nat]Absence check using 2 positive and 4 generalized place invariants in 1 ms returned sat
[2023-04-07 07:12:02] [INFO ] After 30ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-04-07 07:12:02] [INFO ] State equation strengthened by 10 read => feed constraints.
[2023-04-07 07:12:02] [INFO ] After 24ms SMT Verify possible using 10 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-04-07 07:12:03] [INFO ] Deduced a trap composed of 2 places in 23 ms of which 1 ms to minimize.
[2023-04-07 07:12:03] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 31 ms
[2023-04-07 07:12:03] [INFO ] After 83ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 29 ms.
[2023-04-07 07:12:03] [INFO ] After 177ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 5 ms
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 9 ms
[2023-04-07 07:12:03] [INFO ] Input system was already deterministic with 35 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:12:03] [INFO ] Invariant cache hit.
[2023-04-07 07:12:03] [INFO ] Dead Transitions using invariants and state equation in 40 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 3 ms
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 3 ms
[2023-04-07 07:12:03] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 2 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:12:03] [INFO ] Invariant cache hit.
[2023-04-07 07:12:03] [INFO ] Dead Transitions using invariants and state equation in 37 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 40 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Input system was already deterministic with 35 transitions.
Finished random walk after 18 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=18 )
FORMULA Murphy-COL-D4N025-CTLFireability-01 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Parikh walk visited 0 properties in 0 ms.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:12:03] [INFO ] Invariant cache hit.
[2023-04-07 07:12:03] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 7 ms
[2023-04-07 07:12:03] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:12:03] [INFO ] Invariant cache hit.
[2023-04-07 07:12:03] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 4 ms
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:12:03] [INFO ] Invariant cache hit.
[2023-04-07 07:12:03] [INFO ] Dead Transitions using invariants and state equation in 36 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 37 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:12:03] [INFO ] Invariant cache hit.
[2023-04-07 07:12:03] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:12:03] [INFO ] Invariant cache hit.
[2023-04-07 07:12:03] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 3 ms
[2023-04-07 07:12:03] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:12:03] [INFO ] Invariant cache hit.
[2023-04-07 07:12:03] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:12:03] [INFO ] Invariant cache hit.
[2023-04-07 07:12:03] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:12:03] [INFO ] Invariant cache hit.
[2023-04-07 07:12:03] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 37 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 5 ms
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:12:03] [INFO ] Invariant cache hit.
[2023-04-07 07:12:03] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 3 ms
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:12:03] [INFO ] Invariant cache hit.
[2023-04-07 07:12:03] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 35/35 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 35/35 (removed 0) transitions.
[2023-04-07 07:12:03] [INFO ] Invariant cache hit.
[2023-04-07 07:12:03] [INFO ] Dead Transitions using invariants and state equation in 41 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 30/30 places, 35/35 transitions.
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 2 ms
[2023-04-07 07:12:03] [INFO ] Input system was already deterministic with 35 transitions.
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 5 ms
[2023-04-07 07:12:03] [INFO ] Flatten gal took : 5 ms
[2023-04-07 07:12:03] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 7 ms.
[2023-04-07 07:12:03] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 30 places, 35 transitions and 135 arcs took 0 ms.
Total runtime 6576 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Murphy-COL-D4N025
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability
FORMULA Murphy-COL-D4N025-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Murphy-COL-D4N025-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1680851605618
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 16 (type EXCL) for 15 Murphy-COL-D4N025-CTLFireability-07
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 16 (type EXCL) for Murphy-COL-D4N025-CTLFireability-07
lola: result : false
lola: markings : 257
lola: fired transitions : 848
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 42 (type EXCL) for 31 Murphy-COL-D4N025-CTLFireability-12
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for Murphy-COL-D4N025-CTLFireability-12
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 31 Murphy-COL-D4N025-CTLFireability-12
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for Murphy-COL-D4N025-CTLFireability-12
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 31 Murphy-COL-D4N025-CTLFireability-12
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for Murphy-COL-D4N025-CTLFireability-12
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 27 (type EXCL) for 24 Murphy-COL-D4N025-CTLFireability-11
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 1 1 0 2 0 0 0
Murphy-COL-D4N025-CTLFireability-12: DISJ 0 1 0 0 7 0 0 0
Murphy-COL-D4N025-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 5/300 14/32 Murphy-COL-D4N025-CTLFireability-11 3175129 m, 635025 m/sec, 7321402 t fired, .
Time elapsed: 5 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 1 1 0 2 0 0 0
Murphy-COL-D4N025-CTLFireability-12: DISJ 0 1 0 0 7 0 0 0
Murphy-COL-D4N025-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 10/300 27/32 Murphy-COL-D4N025-CTLFireability-11 6168746 m, 598723 m/sec, 14293067 t fired, .
Time elapsed: 10 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 12
lola: CANCELED task # 27 (type EXCL) for Murphy-COL-D4N025-CTLFireability-11 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 1 0 0 2 0 1 0
Murphy-COL-D4N025-CTLFireability-12: DISJ 0 1 0 0 7 0 0 0
Murphy-COL-D4N025-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 15 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: LAUNCH task # 50 (type EXCL) for 49 Murphy-COL-D4N025-CTLFireability-14
lola: time limit : 325 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for Murphy-COL-D4N025-CTLFireability-14
lola: result : true
lola: markings : 9
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 Murphy-COL-D4N025-CTLFireability-13
lola: time limit : 358 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for Murphy-COL-D4N025-CTLFireability-13
lola: result : true
lola: markings : 821727
lola: fired transitions : 2490191
lola: time used : 1.000000
lola: memory pages used : 4
lola: LAUNCH task # 44 (type EXCL) for 31 Murphy-COL-D4N025-CTLFireability-12
lola: time limit : 398 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for Murphy-COL-D4N025-CTLFireability-12
lola: result : false
lola: markings : 61298
lola: fired transitions : 117972
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 24 Murphy-COL-D4N025-CTLFireability-11
lola: time limit : 448 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for Murphy-COL-D4N025-CTLFireability-11
lola: result : true
lola: markings : 15
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 Murphy-COL-D4N025-CTLFireability-09
lola: time limit : 512 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for Murphy-COL-D4N025-CTLFireability-09
lola: result : true
lola: markings : 127
lola: fired transitions : 253
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 Murphy-COL-D4N025-CTLFireability-08
lola: time limit : 597 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for Murphy-COL-D4N025-CTLFireability-08
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 Murphy-COL-D4N025-CTLFireability-06
lola: time limit : 716 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for Murphy-COL-D4N025-CTLFireability-06
lola: result : true
lola: markings : 150
lola: fired transitions : 301
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 Murphy-COL-D4N025-CTLFireability-05
lola: time limit : 896 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for Murphy-COL-D4N025-CTLFireability-05
lola: result : true
lola: markings : 150
lola: fired transitions : 150
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 Murphy-COL-D4N025-CTLFireability-03
lola: time limit : 1194 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-06: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-08: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-09: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-12: DISJ false DISJ
Murphy-COL-D4N025-CTLFireability-13: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 0 0 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 4/1194 10/32 Murphy-COL-D4N025-CTLFireability-03 2293893 m, 458778 m/sec, 5310427 t fired, .
Time elapsed: 20 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-06: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-08: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-09: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-12: DISJ false DISJ
Murphy-COL-D4N025-CTLFireability-13: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 0 0 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 9/1194 23/32 Murphy-COL-D4N025-CTLFireability-03 5299650 m, 601151 m/sec, 12247121 t fired, .
Time elapsed: 25 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: CANCELED task # 7 (type EXCL) for Murphy-COL-D4N025-CTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-06: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-08: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-09: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-12: DISJ false DISJ
Murphy-COL-D4N025-CTLFireability-13: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 0 0 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 30 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: LAUNCH task # 4 (type EXCL) for 3 Murphy-COL-D4N025-CTLFireability-02
lola: time limit : 1785 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-06: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-08: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-09: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-12: DISJ false DISJ
Murphy-COL-D4N025-CTLFireability-13: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 0 0 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/1785 13/32 Murphy-COL-D4N025-CTLFireability-02 2959481 m, 591896 m/sec, 6848835 t fired, .
Time elapsed: 35 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-06: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-08: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-09: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-12: DISJ false DISJ
Murphy-COL-D4N025-CTLFireability-13: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 0 0 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/1785 25/32 Murphy-COL-D4N025-CTLFireability-02 5640312 m, 536166 m/sec, 13070393 t fired, .
Time elapsed: 40 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: CANCELED task # 4 (type EXCL) for Murphy-COL-D4N025-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-06: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-08: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-09: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-12: DISJ false DISJ
Murphy-COL-D4N025-CTLFireability-13: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 0 0 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 45 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: LAUNCH task # 1 (type EXCL) for 0 Murphy-COL-D4N025-CTLFireability-00
lola: time limit : 3555 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-06: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-08: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-09: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-12: DISJ false DISJ
Murphy-COL-D4N025-CTLFireability-13: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 0 0 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/3555 6/32 Murphy-COL-D4N025-CTLFireability-00 1170062 m, 234012 m/sec, 8609659 t fired, .
Time elapsed: 50 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-06: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-08: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-09: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-12: DISJ false DISJ
Murphy-COL-D4N025-CTLFireability-13: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 0 0 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/3555 10/32 Murphy-COL-D4N025-CTLFireability-00 2271845 m, 220356 m/sec, 16497855 t fired, .
Time elapsed: 55 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-06: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-08: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-09: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-12: DISJ false DISJ
Murphy-COL-D4N025-CTLFireability-13: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 0 0 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/3555 15/32 Murphy-COL-D4N025-CTLFireability-00 3351306 m, 215892 m/sec, 24386390 t fired, .
Time elapsed: 60 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-06: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-08: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-09: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-12: DISJ false DISJ
Murphy-COL-D4N025-CTLFireability-13: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 0 0 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/3555 19/32 Murphy-COL-D4N025-CTLFireability-00 4376817 m, 205102 m/sec, 32074525 t fired, .
Time elapsed: 65 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-06: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-08: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-09: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-12: DISJ false DISJ
Murphy-COL-D4N025-CTLFireability-13: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 0 0 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 25/3555 24/32 Murphy-COL-D4N025-CTLFireability-00 5425408 m, 209718 m/sec, 39599177 t fired, .
Time elapsed: 70 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-06: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-08: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-09: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-12: DISJ false DISJ
Murphy-COL-D4N025-CTLFireability-13: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 0 0 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 30/3555 28/32 Murphy-COL-D4N025-CTLFireability-00 6477929 m, 210504 m/sec, 47117696 t fired, .
Time elapsed: 75 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: CANCELED task # 1 (type EXCL) for Murphy-COL-D4N025-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-06: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-08: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-09: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-12: DISJ false DISJ
Murphy-COL-D4N025-CTLFireability-13: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D4N025-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Murphy-COL-D4N025-CTLFireability-11: CONJ 0 0 0 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 80 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: Portfolio finished: no open tasks 12
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D4N025-CTLFireability-00: CTL unknown AGGR
Murphy-COL-D4N025-CTLFireability-02: CTL unknown AGGR
Murphy-COL-D4N025-CTLFireability-03: CTL unknown AGGR
Murphy-COL-D4N025-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-06: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-08: CTL false CTL model checker
Murphy-COL-D4N025-CTLFireability-09: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-11: CONJ unknown CONJ
Murphy-COL-D4N025-CTLFireability-12: DISJ false DISJ
Murphy-COL-D4N025-CTLFireability-13: CTL true CTL model checker
Murphy-COL-D4N025-CTLFireability-14: CTL true CTL model checker
Time elapsed: 80 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Murphy-COL-D4N025"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Murphy-COL-D4N025, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r519-tall-167987245100314"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Murphy-COL-D4N025.tgz
mv Murphy-COL-D4N025 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;