fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r518-tall-167987244300226
Last Updated
May 14, 2023

About the Execution of LoLA for EisenbergMcGuire-PT-04

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1780.787 73620.00 278500.00 10.10 FTFTTFTTTTFFTTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r518-tall-167987244300226.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is EisenbergMcGuire-PT-04, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r518-tall-167987244300226
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 600K
-rw-r--r-- 1 mcc users 7.3K Mar 23 15:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K Mar 23 15:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Mar 23 15:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 40K Mar 23 15:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Mar 23 07:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Mar 23 07:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Mar 23 07:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 23 07:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 26 22:42 NewModel
-rw-r--r-- 1 mcc users 11K Mar 23 15:20 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 96K Mar 23 15:20 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Mar 23 15:20 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 48K Mar 23 15:20 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Mar 23 07:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 23 07:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 26 22:42 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 26 22:42 instance
-rw-r--r-- 1 mcc users 6 Mar 26 22:42 iscolored
-rw-r--r-- 1 mcc users 232K Mar 26 22:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-00
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-01
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-02
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-03
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-04
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-05
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-06
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-07
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-08
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-09
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-10
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-11
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-12
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-13
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-14
FORMULA_NAME EisenbergMcGuire-PT-04-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679922666812

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=EisenbergMcGuire-PT-04
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT EisenbergMcGuire-PT-04
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA EisenbergMcGuire-PT-04-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EisenbergMcGuire-PT-04-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EisenbergMcGuire-PT-04-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EisenbergMcGuire-PT-04-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EisenbergMcGuire-PT-04-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EisenbergMcGuire-PT-04-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EisenbergMcGuire-PT-04-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EisenbergMcGuire-PT-04-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EisenbergMcGuire-PT-04-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EisenbergMcGuire-PT-04-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EisenbergMcGuire-PT-04-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EisenbergMcGuire-PT-04-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EisenbergMcGuire-PT-04-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EisenbergMcGuire-PT-04-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EisenbergMcGuire-PT-04-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EisenbergMcGuire-PT-04-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679922740432

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 1 (type EXCL) for 0 EisenbergMcGuire-PT-04-CTLFireability-00
lola: time limit : 133 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 65 (type FNDP) for 35 EisenbergMcGuire-PT-04-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type EQUN) for 35 EisenbergMcGuire-PT-04-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SRCH) for 35 EisenbergMcGuire-PT-04-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 68 (type SRCH) for EisenbergMcGuire-PT-04-CTLFireability-09
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 73 (type FNDP) for 45 EisenbergMcGuire-PT-04-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/CTLFireability-66.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
sara: warning, failure of lp_solve (at job 1587)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
EisenbergMcGuire-PT-04-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-01: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-03: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-07: DISJ 0 3 0 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-09: EF 0 1 2 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-11: CONJ 0 4 1 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 4/179 5/32 EisenbergMcGuire-PT-04-CTLFireability-00 936465 m, 187293 m/sec, 3677950 t fired, .
65 EF FNDP 4/899 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 1041222 t fired, 2 attempts, .
66 EF STEQ 4/899 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 sara is running.
73 EF FNDP 4/1199 0/5 EisenbergMcGuire-PT-04-CTLFireability-11 972304 t fired, 1 attempts, .

Time elapsed: 5 secs. Pages in use: 5
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 1 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-00
lola: result : false
lola: markings : 1762378
lola: fired transitions : 7049515
lola: time used : 9.000000
lola: memory pages used : 8
lola: LAUNCH task # 50 (type EXCL) for 45 EisenbergMcGuire-PT-04-CTLFireability-11
lola: time limit : 188 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-11
lola: result : true
lola: markings : 1
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 38 EisenbergMcGuire-PT-04-CTLFireability-10
lola: time limit : 199 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
EisenbergMcGuire-PT-04-CTLFireability-00: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
EisenbergMcGuire-PT-04-CTLFireability-01: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-03: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-07: DISJ 0 3 0 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-09: EF 0 1 2 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-10: CONJ 0 1 1 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-11: CONJ 0 3 1 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 0/199 1/32 EisenbergMcGuire-PT-04-CTLFireability-10 104864 m, 20972 m/sec, 336495 t fired, .
65 EF FNDP 9/890 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 2176480 t fired, 3 attempts, .
66 EF STEQ 9/890 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 sara is running.
73 EF FNDP 9/1190 0/5 EisenbergMcGuire-PT-04-CTLFireability-11 2024214 t fired, 3 attempts, .

Time elapsed: 10 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 43 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-10
lola: result : false
lola: markings : 618345
lola: fired transitions : 2063457
lola: time used : 2.000000
lola: memory pages used : 3
lola: LAUNCH task # 33 (type EXCL) for 32 EisenbergMcGuire-PT-04-CTLFireability-08
lola: time limit : 224 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
EisenbergMcGuire-PT-04-CTLFireability-00: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-10: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
EisenbergMcGuire-PT-04-CTLFireability-01: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-03: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-07: DISJ 0 3 0 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-09: EF 0 1 2 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-11: CONJ 0 3 1 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 3/224 3/32 EisenbergMcGuire-PT-04-CTLFireability-08 515220 m, 103044 m/sec, 2235896 t fired, .
65 EF FNDP 14/888 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 3312901 t fired, 4 attempts, .
66 EF STEQ 14/888 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 sara is running.
73 EF FNDP 14/1188 0/5 EisenbergMcGuire-PT-04-CTLFireability-11 3077286 t fired, 4 attempts, .

Time elapsed: 15 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 33 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-08
lola: result : true
lola: markings : 621417
lola: fired transitions : 2708976
lola: time used : 4.000000
lola: memory pages used : 3
lola: LAUNCH task # 19 (type EXCL) for 18 EisenbergMcGuire-PT-04-CTLFireability-06
lola: time limit : 238 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
EisenbergMcGuire-PT-04-CTLFireability-00: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-08: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-10: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
EisenbergMcGuire-PT-04-CTLFireability-01: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-03: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-07: DISJ 0 3 0 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-09: EF 0 1 2 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-11: CONJ 0 3 1 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 4/238 4/32 EisenbergMcGuire-PT-04-CTLFireability-06 790650 m, 158130 m/sec, 3791415 t fired, .
65 EF FNDP 19/884 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 4437685 t fired, 5 attempts, .
66 EF STEQ 19/884 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 sara is running.
73 EF FNDP 19/1184 0/5 EisenbergMcGuire-PT-04-CTLFireability-11 4130524 t fired, 5 attempts, .

Time elapsed: 20 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
EisenbergMcGuire-PT-04-CTLFireability-00: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-08: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-10: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
EisenbergMcGuire-PT-04-CTLFireability-01: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-03: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-07: DISJ 0 3 0 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-09: EF 0 1 2 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-11: CONJ 0 3 1 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 9/238 8/32 EisenbergMcGuire-PT-04-CTLFireability-06 1762378 m, 194345 m/sec, 7824871 t fired, .
65 EF FNDP 24/880 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 5580710 t fired, 6 attempts, .
66 EF STEQ 24/880 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 sara is running.
73 EF FNDP 24/1180 0/5 EisenbergMcGuire-PT-04-CTLFireability-11 5189041 t fired, 6 attempts, .

Time elapsed: 25 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
EisenbergMcGuire-PT-04-CTLFireability-00: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-08: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-10: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
EisenbergMcGuire-PT-04-CTLFireability-01: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-03: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-07: DISJ 0 3 0 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-09: EF 0 1 2 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-11: CONJ 0 3 1 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 14/238 8/32 EisenbergMcGuire-PT-04-CTLFireability-06 1762378 m, 0 m/sec, 11678873 t fired, .
65 EF FNDP 29/875 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 6693036 t fired, 7 attempts, .
66 EF STEQ 29/875 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 sara is running.
73 EF FNDP 29/1175 0/5 EisenbergMcGuire-PT-04-CTLFireability-11 6212519 t fired, 7 attempts, .

Time elapsed: 30 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
EisenbergMcGuire-PT-04-CTLFireability-00: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-08: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-10: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
EisenbergMcGuire-PT-04-CTLFireability-01: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-03: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-07: DISJ 0 3 0 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-09: EF 0 1 2 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-11: CONJ 0 3 1 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 19/238 8/32 EisenbergMcGuire-PT-04-CTLFireability-06 1762378 m, 0 m/sec, 15601189 t fired, .
65 EF FNDP 34/870 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 7772845 t fired, 8 attempts, .
66 EF STEQ 34/870 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 sara is running.
73 EF FNDP 34/1170 0/5 EisenbergMcGuire-PT-04-CTLFireability-11 7208336 t fired, 8 attempts, .

Time elapsed: 35 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 19 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-06
lola: result : true
lola: markings : 1762378
lola: fired transitions : 19368284
lola: time used : 24.000000
lola: memory pages used : 8
lola: LAUNCH task # 16 (type EXCL) for 15 EisenbergMcGuire-PT-04-CTLFireability-05
lola: time limit : 254 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
EisenbergMcGuire-PT-04-CTLFireability-00: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-06: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-08: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-10: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
EisenbergMcGuire-PT-04-CTLFireability-01: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-03: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-07: DISJ 0 3 0 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-09: EF 0 1 2 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-11: CONJ 0 3 1 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 0/254 1/32 EisenbergMcGuire-PT-04-CTLFireability-05 12262 m, 2452 m/sec, 36417 t fired, .
65 EF FNDP 39/860 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 8851622 t fired, 9 attempts, .
66 EF STEQ 39/860 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 sara is running.
73 EF FNDP 39/1160 0/5 EisenbergMcGuire-PT-04-CTLFireability-11 8199965 t fired, 9 attempts, .

Time elapsed: 40 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
EisenbergMcGuire-PT-04-CTLFireability-00: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-06: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-08: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-10: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
EisenbergMcGuire-PT-04-CTLFireability-01: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-03: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-07: DISJ 0 3 0 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-09: EF 0 1 2 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-11: CONJ 0 3 1 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/254 5/32 EisenbergMcGuire-PT-04-CTLFireability-05 941508 m, 185849 m/sec, 3700385 t fired, .
65 EF FNDP 44/860 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 9926228 t fired, 10 attempts, .
66 EF STEQ 44/860 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 sara is running.
73 EF FNDP 44/1160 0/5 EisenbergMcGuire-PT-04-CTLFireability-11 9192991 t fired, 10 attempts, .

Time elapsed: 45 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 16 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-05
lola: result : false
lola: markings : 1762378
lola: fired transitions : 7051784
lola: time used : 10.000000
lola: memory pages used : 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
EisenbergMcGuire-PT-04-CTLFireability-00: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-06: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-08: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-10: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
EisenbergMcGuire-PT-04-CTLFireability-01: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-03: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-05: CTL 0 0 0 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-07: DISJ 0 3 0 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-09: EF 0 1 2 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-11: CONJ 0 3 1 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 49/855 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 11028071 t fired, 12 attempts, .
66 EF STEQ 49/855 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 sara is running.
73 EF FNDP 49/1155 0/5 EisenbergMcGuire-PT-04-CTLFireability-11 10221139 t fired, 11 attempts, .

Time elapsed: 50 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 13 (type EXCL) for 12 EisenbergMcGuire-PT-04-CTLFireability-04
lola: time limit : 273 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
EisenbergMcGuire-PT-04-CTLFireability-00: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-05: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-06: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-08: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-10: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
EisenbergMcGuire-PT-04-CTLFireability-01: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-03: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-07: DISJ 0 3 0 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-09: EF 0 1 2 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-11: CONJ 0 3 1 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 5/273 4/32 EisenbergMcGuire-PT-04-CTLFireability-04 680075 m, 136015 m/sec, 4036396 t fired, .
65 EF FNDP 54/850 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 12120848 t fired, 13 attempts, .
66 EF STEQ 54/850 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 sara is running.
73 EF FNDP 54/1150 0/5 EisenbergMcGuire-PT-04-CTLFireability-11 11260144 t fired, 12 attempts, .

Time elapsed: 55 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
EisenbergMcGuire-PT-04-CTLFireability-00: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-05: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-06: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-08: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-10: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
EisenbergMcGuire-PT-04-CTLFireability-01: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-03: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-07: DISJ 0 3 0 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-09: EF 0 1 2 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-11: CONJ 0 3 1 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 10/273 6/32 EisenbergMcGuire-PT-04-CTLFireability-04 1224908 m, 108966 m/sec, 7582314 t fired, .
65 EF FNDP 59/845 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 13156776 t fired, 14 attempts, .
66 EF STEQ 59/845 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 sara is running.
73 EF FNDP 59/1145 0/5 EisenbergMcGuire-PT-04-CTLFireability-11 12230336 t fired, 13 attempts, .

Time elapsed: 60 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 13 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-04
lola: result : true
lola: markings : 1762378
lola: fired transitions : 10981471
lola: time used : 15.000000
lola: memory pages used : 8
lola: LAUNCH task # 7 (type EXCL) for 6 EisenbergMcGuire-PT-04-CTLFireability-02
lola: time limit : 294 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
EisenbergMcGuire-PT-04-CTLFireability-00: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-04: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-05: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-06: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-08: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-10: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
EisenbergMcGuire-PT-04-CTLFireability-01: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-03: EF 0 4 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-07: DISJ 0 3 0 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-09: EF 0 1 2 0 2 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-11: CONJ 0 3 1 0 3 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 0/294 1/32 EisenbergMcGuire-PT-04-CTLFireability-02 40948 m, 8189 m/sec, 128700 t fired, .
65 EF FNDP 64/835 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 14198941 t fired, 15 attempts, .
66 EF STEQ 64/835 0/5 EisenbergMcGuire-PT-04-CTLFireability-09 sara is running.
73 EF FNDP 64/1135 0/5 EisenbergMcGuire-PT-04-CTLFireability-11 13207360 t fired, 14 attempts, .

Time elapsed: 65 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 7 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-02
lola: result : false
lola: markings : 681193
lola: fired transitions : 2757283
lola: time used : 4.000000
lola: memory pages used : 4
lola: LAUNCH task # 80 (type EXCL) for 9 EisenbergMcGuire-PT-04-CTLFireability-03
lola: time limit : 321 sec
lola: memory limit: 32 pages
lola: FINISHED task # 80 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-03
lola: result : true
lola: markings : 32212
lola: fired transitions : 76360
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 75 (type EXCL) for 45 EisenbergMcGuire-PT-04-CTLFireability-11
lola: time limit : 353 sec
lola: memory limit: 32 pages
lola: FINISHED task # 75 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-11
lola: result : true
lola: markings : 27284
lola: fired transitions : 63804
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 73 (type FNDP) for EisenbergMcGuire-PT-04-CTLFireability-11 (obsolete)
lola: LAUNCH task # 72 (type EXCL) for 3 EisenbergMcGuire-PT-04-CTLFireability-01
lola: time limit : 392 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 69 (type FNDP) for 3 EisenbergMcGuire-PT-04-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 73 (type FNDP) for EisenbergMcGuire-PT-04-CTLFireability-11
lola: result : unknown
lola: fired transitions : 13912984
lola: tried executions : 15
lola: time used : 68.000000
lola: memory pages used : 0
lola: FINISHED task # 72 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-01
lola: result : true
lola: markings : 16
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 69 (type FNDP) for EisenbergMcGuire-PT-04-CTLFireability-01 (obsolete)
lola: LAUNCH task # 67 (type EXCL) for 35 EisenbergMcGuire-PT-04-CTLFireability-09
lola: time limit : 441 sec
lola: memory limit: 32 pages
lola: FINISHED task # 69 (type FNDP) for EisenbergMcGuire-PT-04-CTLFireability-01
lola: result : true
lola: fired transitions : 14
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 67 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-09
lola: result : true
lola: markings : 21803
lola: fired transitions : 49821
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 65 (type FNDP) for EisenbergMcGuire-PT-04-CTLFireability-09 (obsolete)
lola: CANCELED task # 66 (type EQUN) for EisenbergMcGuire-PT-04-CTLFireability-09 (obsolete)
lola: LAUNCH task # 64 (type EXCL) for 21 EisenbergMcGuire-PT-04-CTLFireability-07
lola: time limit : 504 sec
lola: memory limit: 32 pages
lola: FINISHED task # 65 (type FNDP) for EisenbergMcGuire-PT-04-CTLFireability-09
lola: result : unknown
lola: fired transitions : 15013314
lola: tried executions : 17
lola: time used : 68.000000
lola: memory pages used : 0
lola: FINISHED task # 64 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-07
lola: result : true
lola: markings : 10
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 21 EisenbergMcGuire-PT-04-CTLFireability-07
lola: time limit : 706 sec
lola: memory limit: 32 pages
lola: FINISHED task # 66 (type EQUN) for EisenbergMcGuire-PT-04-CTLFireability-09
lola: result : unknown
lola: FINISHED task # 24 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-07
lola: result : true
lola: markings : 289093
lola: fired transitions : 1156314
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 62 (type EXCL) for 61 EisenbergMcGuire-PT-04-CTLFireability-15
lola: time limit : 882 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
EisenbergMcGuire-PT-04-CTLFireability-00: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-01: EF true state space
EisenbergMcGuire-PT-04-CTLFireability-02: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-03: EF true state space
EisenbergMcGuire-PT-04-CTLFireability-04: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-05: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-06: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-07: DISJ true tscc_search
EisenbergMcGuire-PT-04-CTLFireability-08: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-09: EF true state space
EisenbergMcGuire-PT-04-CTLFireability-10: CONJ false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-11: CONJ false state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
EisenbergMcGuire-PT-04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
EisenbergMcGuire-PT-04-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 CTL EXCL 0/882 1/32 EisenbergMcGuire-PT-04-CTLFireability-15 66770 m, 13354 m/sec, 383946 t fired, .

Time elapsed: 70 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 62 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-15
lola: result : false
lola: markings : 274874
lola: fired transitions : 1651191
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 53 (type EXCL) for 52 EisenbergMcGuire-PT-04-CTLFireability-12
lola: time limit : 1176 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-12
lola: result : true
lola: markings : 42859
lola: fired transitions : 198456
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 59 (type EXCL) for 58 EisenbergMcGuire-PT-04-CTLFireability-14
lola: time limit : 1764 sec
lola: memory limit: 32 pages
lola: FINISHED task # 59 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-14
lola: result : false
lola: markings : 278744
lola: fired transitions : 1151676
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 56 (type EXCL) for 55 EisenbergMcGuire-PT-04-CTLFireability-13
lola: time limit : 3527 sec
lola: memory limit: 32 pages
lola: FINISHED task # 56 (type EXCL) for EisenbergMcGuire-PT-04-CTLFireability-13
lola: result : true
lola: markings : 258408
lola: fired transitions : 1418077
lola: time used : 1.000000
lola: memory pages used : 2
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
EisenbergMcGuire-PT-04-CTLFireability-00: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-01: EF true state space
EisenbergMcGuire-PT-04-CTLFireability-02: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-03: EF true state space
EisenbergMcGuire-PT-04-CTLFireability-04: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-05: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-06: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-07: DISJ true tscc_search
EisenbergMcGuire-PT-04-CTLFireability-08: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-09: EF true state space
EisenbergMcGuire-PT-04-CTLFireability-10: CONJ false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-11: CONJ false state space
EisenbergMcGuire-PT-04-CTLFireability-12: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-13: CTL true CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-14: CTL false CTL model checker
EisenbergMcGuire-PT-04-CTLFireability-15: CTL false CTL model checker


Time elapsed: 74 secs. Pages in use: 8

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="EisenbergMcGuire-PT-04"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is EisenbergMcGuire-PT-04, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r518-tall-167987244300226"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/EisenbergMcGuire-PT-04.tgz
mv EisenbergMcGuire-PT-04 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;