Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r489-tall-167912707801186.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is UtilityControlRoom-PT-Z4T4N02, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r489-tall-167912707801186
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 984K
-rw-r--r-- 1 mcc users 16K Feb 26 14:52 CTLCardinality.txt
-rw-r--r-- 1 mcc users 107K Feb 26 14:52 CTLCardinality.xml
-rw-r--r-- 1 mcc users 24K Feb 26 14:49 CTLFireability.txt
-rw-r--r-- 1 mcc users 116K Feb 26 14:49 CTLFireability.xml
-rw-r--r-- 1 mcc users 9.4K Feb 25 17:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 41K Feb 25 17:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 9.8K Feb 25 17:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 38K Feb 25 17:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 27K Feb 26 14:55 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 160K Feb 26 14:55 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 66K Feb 26 14:53 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 261K Feb 26 14:53 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 17:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.8K Feb 25 17:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 65K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-00
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-01
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-02
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-03
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-04
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-05
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-06
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-07
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-08
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-09
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-10
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-11
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-12
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-13
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-14
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679342409868

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z4T4N02
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-20 20:00:11] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-20 20:00:11] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 20:00:11] [INFO ] Load time of PNML (sax parser for PT used): 36 ms
[2023-03-20 20:00:11] [INFO ] Transformed 80 places.
[2023-03-20 20:00:11] [INFO ] Transformed 150 transitions.
[2023-03-20 20:00:11] [INFO ] Parsed PT model containing 80 places and 150 transitions and 482 arcs in 96 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 15 ms.
[2023-03-20 20:00:11] [INFO ] Reduced 6 identical enabling conditions.
[2023-03-20 20:00:11] [INFO ] Reduced 6 identical enabling conditions.
[2023-03-20 20:00:11] [INFO ] Reduced 6 identical enabling conditions.
[2023-03-20 20:00:11] [INFO ] Reduced 6 identical enabling conditions.
[2023-03-20 20:00:11] [INFO ] Reduced 6 identical enabling conditions.
Ensure Unique test removed 32 transitions
Reduce redundant transitions removed 32 transitions.
Support contains 80 out of 80 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Applied a total of 0 rules in 9 ms. Remains 80 /80 variables (removed 0) and now considering 118/118 (removed 0) transitions.
// Phase 1: matrix 118 rows 80 cols
[2023-03-20 20:00:11] [INFO ] Computed 7 place invariants in 18 ms
[2023-03-20 20:00:11] [INFO ] Implicit Places using invariants in 171 ms returned []
[2023-03-20 20:00:11] [INFO ] Invariant cache hit.
[2023-03-20 20:00:11] [INFO ] Implicit Places using invariants and state equation in 98 ms returned []
Implicit Place search using SMT with State Equation took 293 ms to find 0 implicit places.
[2023-03-20 20:00:11] [INFO ] Invariant cache hit.
[2023-03-20 20:00:11] [INFO ] Dead Transitions using invariants and state equation in 102 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 406 ms. Remains : 80/80 places, 118/118 transitions.
Support contains 80 out of 80 places after structural reductions.
[2023-03-20 20:00:12] [INFO ] Flatten gal took : 33 ms
[2023-03-20 20:00:12] [INFO ] Flatten gal took : 27 ms
[2023-03-20 20:00:12] [INFO ] Input system was already deterministic with 118 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 390 ms. (steps per millisecond=25 ) properties (out of 67) seen :65
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-20 20:00:12] [INFO ] Invariant cache hit.
[2023-03-20 20:00:12] [INFO ] [Real]Absence check using 7 positive place invariants in 4 ms returned sat
[2023-03-20 20:00:12] [INFO ] After 67ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
[2023-03-20 20:00:12] [INFO ] Flatten gal took : 12 ms
[2023-03-20 20:00:13] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 13 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 118 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 56 transition count 94
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 56 transition count 94
Applied a total of 48 rules in 6 ms. Remains 56 /80 variables (removed 24) and now considering 94/118 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 56/80 places, 94/118 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 6 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 6 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Drop transitions removed 32 transitions
Trivial Post-agglo rules discarded 32 transitions
Performed 32 trivial Post agglomeration. Transition count delta: 32
Iterating post reduction 0 with 32 rules applied. Total rules applied 32 place count 80 transition count 86
Reduce places removed 32 places and 0 transitions.
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 40 rules applied. Total rules applied 72 place count 48 transition count 78
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 75 place count 45 transition count 54
Iterating global reduction 2 with 3 rules applied. Total rules applied 78 place count 45 transition count 54
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 84 place count 39 transition count 48
Iterating global reduction 2 with 6 rules applied. Total rules applied 90 place count 39 transition count 48
Applied a total of 90 rules in 12 ms. Remains 39 /80 variables (removed 41) and now considering 48/118 (removed 70) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 39/80 places, 48/118 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 3 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 3 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 48 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 56 transition count 94
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 56 transition count 94
Applied a total of 48 rules in 2 ms. Remains 56 /80 variables (removed 24) and now considering 94/118 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 56/80 places, 94/118 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 5 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 5 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 56 transition count 94
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 56 transition count 94
Applied a total of 48 rules in 2 ms. Remains 56 /80 variables (removed 24) and now considering 94/118 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 56/80 places, 94/118 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 6 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 5 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 118/118 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 80/80 places, 118/118 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 6 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 6 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 118 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 56 transition count 94
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 56 transition count 94
Applied a total of 48 rules in 2 ms. Remains 56 /80 variables (removed 24) and now considering 94/118 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 56/80 places, 94/118 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 4 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 7 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 56 transition count 94
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 56 transition count 94
Applied a total of 48 rules in 2 ms. Remains 56 /80 variables (removed 24) and now considering 94/118 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 56/80 places, 94/118 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 4 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 5 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 118/118 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 80/80 places, 118/118 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 6 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 7 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 118 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 56 transition count 94
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 56 transition count 94
Applied a total of 48 rules in 2 ms. Remains 56 /80 variables (removed 24) and now considering 94/118 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 56/80 places, 94/118 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 5 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 4 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 23 places :
Symmetric choice reduction at 0 with 23 rule applications. Total rules 23 place count 57 transition count 95
Iterating global reduction 0 with 23 rules applied. Total rules applied 46 place count 57 transition count 95
Applied a total of 46 rules in 3 ms. Remains 57 /80 variables (removed 23) and now considering 95/118 (removed 23) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 57/80 places, 95/118 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 4 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 5 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 95 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 56 transition count 94
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 56 transition count 94
Applied a total of 48 rules in 3 ms. Remains 56 /80 variables (removed 24) and now considering 94/118 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 56/80 places, 94/118 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 4 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 4 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 60 transition count 98
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 60 transition count 98
Applied a total of 40 rules in 3 ms. Remains 60 /80 variables (removed 20) and now considering 98/118 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 60/80 places, 98/118 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 4 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 5 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 98 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 56 transition count 94
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 56 transition count 94
Applied a total of 48 rules in 4 ms. Remains 56 /80 variables (removed 24) and now considering 94/118 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 56/80 places, 94/118 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 3 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 4 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Performed 32 Post agglomeration using F-continuation condition.Transition count delta: 32
Iterating post reduction 0 with 32 rules applied. Total rules applied 32 place count 80 transition count 86
Reduce places removed 32 places and 0 transitions.
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 40 rules applied. Total rules applied 72 place count 48 transition count 78
Performed 7 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 7 Pre rules applied. Total rules applied 72 place count 48 transition count 71
Deduced a syphon composed of 7 places in 1 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 2 with 14 rules applied. Total rules applied 86 place count 41 transition count 71
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 88 place count 39 transition count 55
Iterating global reduction 2 with 2 rules applied. Total rules applied 90 place count 39 transition count 55
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 94 place count 35 transition count 51
Iterating global reduction 2 with 4 rules applied. Total rules applied 98 place count 35 transition count 51
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 101 place count 32 transition count 45
Iterating global reduction 2 with 3 rules applied. Total rules applied 104 place count 32 transition count 45
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 107 place count 29 transition count 39
Iterating global reduction 2 with 3 rules applied. Total rules applied 110 place count 29 transition count 39
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 113 place count 29 transition count 36
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 115 place count 28 transition count 35
Applied a total of 115 rules in 15 ms. Remains 28 /80 variables (removed 52) and now considering 35/118 (removed 83) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 28/80 places, 35/118 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 2 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 1 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 21 places :
Symmetric choice reduction at 0 with 21 rule applications. Total rules 21 place count 59 transition count 97
Iterating global reduction 0 with 21 rules applied. Total rules applied 42 place count 59 transition count 97
Applied a total of 42 rules in 2 ms. Remains 59 /80 variables (removed 21) and now considering 97/118 (removed 21) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 59/80 places, 97/118 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 4 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 4 ms
[2023-03-20 20:00:13] [INFO ] Input system was already deterministic with 97 transitions.
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 9 ms
[2023-03-20 20:00:13] [INFO ] Flatten gal took : 9 ms
[2023-03-20 20:00:13] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 7 ms.
[2023-03-20 20:00:13] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 80 places, 118 transitions and 354 arcs took 1 ms.
Total runtime 2373 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/466/ctl_0_ --ctl=/tmp/466/ctl_1_ --ctl=/tmp/466/ctl_2_ --ctl=/tmp/466/ctl_3_ --ctl=/tmp/466/ctl_4_ --ctl=/tmp/466/ctl_5_ --ctl=/tmp/466/ctl_6_ --ctl=/tmp/466/ctl_7_ --ctl=/tmp/466/ctl_8_ --ctl=/tmp/466/ctl_9_ --ctl=/tmp/466/ctl_10_ --ctl=/tmp/466/ctl_11_ --ctl=/tmp/466/ctl_12_ --ctl=/tmp/466/ctl_13_ --ctl=/tmp/466/ctl_14_ --mu-par --mu-opt
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-05 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-06 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-09 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN

BK_STOP 1679342415489

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
ctl formula name UtilityControlRoom-PT-Z4T4N02-CTLFireability-00
ctl formula formula --ctl=/tmp/466/ctl_0_
ctl formula name UtilityControlRoom-PT-Z4T4N02-CTLFireability-01
ctl formula formula --ctl=/tmp/466/ctl_1_
ctl formula name UtilityControlRoom-PT-Z4T4N02-CTLFireability-02
ctl formula formula --ctl=/tmp/466/ctl_2_
ctl formula name UtilityControlRoom-PT-Z4T4N02-CTLFireability-03
ctl formula formula --ctl=/tmp/466/ctl_3_
ctl formula name UtilityControlRoom-PT-Z4T4N02-CTLFireability-04
ctl formula formula --ctl=/tmp/466/ctl_4_
ctl formula name UtilityControlRoom-PT-Z4T4N02-CTLFireability-05
ctl formula formula --ctl=/tmp/466/ctl_5_
ctl formula name UtilityControlRoom-PT-Z4T4N02-CTLFireability-06
ctl formula formula --ctl=/tmp/466/ctl_6_
ctl formula name UtilityControlRoom-PT-Z4T4N02-CTLFireability-07
ctl formula formula --ctl=/tmp/466/ctl_7_
ctl formula name UtilityControlRoom-PT-Z4T4N02-CTLFireability-08
ctl formula formula --ctl=/tmp/466/ctl_8_
ctl formula name UtilityControlRoom-PT-Z4T4N02-CTLFireability-09
ctl formula formula --ctl=/tmp/466/ctl_9_
ctl formula name UtilityControlRoom-PT-Z4T4N02-CTLFireability-11
ctl formula formula --ctl=/tmp/466/ctl_10_
ctl formula name UtilityControlRoom-PT-Z4T4N02-CTLFireability-12
ctl formula formula --ctl=/tmp/466/ctl_11_
ctl formula name UtilityControlRoom-PT-Z4T4N02-CTLFireability-13
ctl formula formula --ctl=/tmp/466/ctl_12_
ctl formula name UtilityControlRoom-PT-Z4T4N02-CTLFireability-14
ctl formula formula --ctl=/tmp/466/ctl_13_
ctl formula name UtilityControlRoom-PT-Z4T4N02-CTLFireability-15
ctl formula formula --ctl=/tmp/466/ctl_14_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 80 places, 118 transitions and 354 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.000 real 0.000 user 0.000 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 118->118 groups
pnml2lts-sym: Regrouping took 0.010 real 0.010 user 0.000 sys
pnml2lts-sym: state vector length is 80; there are 118 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: Exploration took 6967 group checks and 0 next state calls
pnml2lts-sym: reachability took 0.040 real 0.150 user 0.020 sys
pnml2lts-sym: counting visited states...
pnml2lts-sym: counting took 0.000 real 0.000 user 0.000 sys
pnml2lts-sym: state space has 57040 states, 1224 nodes
pnml2lts-sym: Formula /tmp/466/ctl_1_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/466/ctl_14_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/466/ctl_3_ does not hold for the initial state
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: Formula /tmp/466/ctl_2_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/466/ctl_0_ holds for the initial state
pnml2lts-sym: Formula /tmp/466/ctl_5_ holds for the initial state
pnml2lts-sym: Formula /tmp/466/ctl_6_ holds for the initial state
pnml2lts-sym: Formula /tmp/466/ctl_13_ holds for the initial state
pnml2lts-sym: Formula /tmp/466/ctl_4_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/466/ctl_12_ holds for the initial state
pnml2lts-sym: Formula /tmp/466/ctl_11_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/466/ctl_10_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/466/ctl_8_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/466/ctl_9_ holds for the initial state
pnml2lts-sym: Formula /tmp/466/ctl_7_ does not hold for the initial state
pnml2lts-sym: group_next: 1218 nodes total
pnml2lts-sym: group_explored: 1485 nodes, 1850 short vectors total
pnml2lts-sym: max token count: 4

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z4T4N02"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is UtilityControlRoom-PT-Z4T4N02, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r489-tall-167912707801186"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z4T4N02.tgz
mv UtilityControlRoom-PT-Z4T4N02 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;