Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r489-tall-167912706600314.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is Sudoku-PT-BN16, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r489-tall-167912706600314
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 104M
-rw-r--r-- 1 mcc users 1.3M Feb 26 09:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 5.7M Feb 26 09:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5M Feb 26 08:50 CTLFireability.txt
-rw-r--r-- 1 mcc users 23M Feb 26 08:50 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 473K Feb 25 17:17 LTLCardinality.txt
-rw-r--r-- 1 mcc users 1.6M Feb 25 17:17 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4M Feb 25 17:17 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.6M Feb 25 17:17 LTLFireability.xml
-rw-r--r-- 1 mcc users 2.6M Feb 26 11:04 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 12M Feb 26 11:04 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.8M Feb 26 09:48 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 33M Feb 26 09:48 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 29K Feb 25 17:17 UpperBounds.txt
-rw-r--r-- 1 mcc users 73K Feb 25 17:17 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 2.7M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-00
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-01
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-02
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-03
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-04
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-05
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-06
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-07
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-08
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-09
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-10
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-11
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-12
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-13
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-14
FORMULA_NAME Sudoku-PT-BN16-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679233328242

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Sudoku-PT-BN16
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-19 13:42:09] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 13:42:09] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 13:42:10] [INFO ] Load time of PNML (sax parser for PT used): 299 ms
[2023-03-19 13:42:10] [INFO ] Transformed 5120 places.
[2023-03-19 13:42:10] [INFO ] Transformed 4096 transitions.
[2023-03-19 13:42:10] [INFO ] Parsed PT model containing 5120 places and 4096 transitions and 20480 arcs in 390 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 434 ms.
Support contains 1024 out of 5120 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 5120/5120 places, 4096/4096 transitions.
Reduce places removed 4096 places and 0 transitions.
Iterating post reduction 0 with 4096 rules applied. Total rules applied 4096 place count 1024 transition count 4096
Applied a total of 4096 rules in 87 ms. Remains 1024 /5120 variables (removed 4096) and now considering 4096/4096 (removed 0) transitions.
// Phase 1: matrix 4096 rows 1024 cols
[2023-03-19 13:42:13] [INFO ] Computed 168 place invariants in 781 ms
[2023-03-19 13:42:13] [INFO ] Implicit Places using invariants in 1155 ms returned []
[2023-03-19 13:42:13] [INFO ] Invariant cache hit.
[2023-03-19 13:42:14] [INFO ] Implicit Places using invariants and state equation in 1000 ms returned []
Implicit Place search using SMT with State Equation took 2178 ms to find 0 implicit places.
[2023-03-19 13:42:14] [INFO ] Invariant cache hit.
[2023-03-19 13:42:16] [INFO ] Dead Transitions using invariants and state equation in 1567 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 1024/5120 places, 4096/4096 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3835 ms. Remains : 1024/5120 places, 4096/4096 transitions.
Support contains 1024 out of 1024 places after structural reductions.
[2023-03-19 13:42:22] [INFO ] Flatten gal took : 2104 ms
[2023-03-19 13:42:53] [INFO ] Flatten gal took : 3288 ms
[2023-03-19 13:43:23] [INFO ] Input system was already deterministic with 4096 transitions.
Incomplete random walk after 10000 steps, including 47 resets, run finished after 3869 ms. (steps per millisecond=2 ) properties (out of 44) seen :42
Interrupted Best-First random walk after 2001 steps, including 0 resets, run timeout after 5966 ms. (steps per millisecond=0 ) properties seen 0
Interrupted Best-First random walk after 2001 steps, including 0 resets, run timeout after 8716 ms. (steps per millisecond=0 ) properties seen 0
Running SMT prover for 2 properties.
[2023-03-19 13:43:43] [INFO ] Invariant cache hit.
[2023-03-19 13:44:25] [INFO ] After 5463ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
[2023-03-19 13:44:28] [INFO ] Flatten gal took : 1495 ms
[2023-03-19 13:44:52] [INFO ] Flatten gal took : 2482 ms
[2023-03-19 13:45:16] [INFO ] Input system was already deterministic with 4096 transitions.
Computed a total of 1024 stabilizing places and 4096 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1024 transition count 4096
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
FORMULA Sudoku-PT-BN16-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 1024/1024 places, 4096/4096 transitions.
Applied a total of 0 rules in 8 ms. Remains 1024 /1024 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 1024/1024 places, 4096/4096 transitions.
[2023-03-19 13:45:17] [INFO ] Flatten gal took : 302 ms
[2023-03-19 13:45:18] [INFO ] Flatten gal took : 421 ms
[2023-03-19 13:45:19] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1024/1024 places, 4096/4096 transitions.
Applied a total of 0 rules in 8 ms. Remains 1024 /1024 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 1024/1024 places, 4096/4096 transitions.
[2023-03-19 13:45:20] [INFO ] Flatten gal took : 444 ms
[2023-03-19 13:45:21] [INFO ] Flatten gal took : 695 ms
[2023-03-19 13:45:22] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1024/1024 places, 4096/4096 transitions.
Applied a total of 0 rules in 7 ms. Remains 1024 /1024 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 1024/1024 places, 4096/4096 transitions.
[2023-03-19 13:45:23] [INFO ] Flatten gal took : 306 ms
[2023-03-19 13:45:24] [INFO ] Flatten gal took : 435 ms
[2023-03-19 13:45:24] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1024/1024 places, 4096/4096 transitions.
Applied a total of 0 rules in 7 ms. Remains 1024 /1024 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 1024/1024 places, 4096/4096 transitions.
[2023-03-19 13:45:26] [INFO ] Flatten gal took : 598 ms
[2023-03-19 13:45:27] [INFO ] Flatten gal took : 934 ms
[2023-03-19 13:45:29] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1024/1024 places, 4096/4096 transitions.
Applied a total of 0 rules in 34 ms. Remains 1024 /1024 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 34 ms. Remains : 1024/1024 places, 4096/4096 transitions.
[2023-03-19 13:45:30] [INFO ] Flatten gal took : 169 ms
[2023-03-19 13:45:30] [INFO ] Flatten gal took : 206 ms
[2023-03-19 13:45:30] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1024/1024 places, 4096/4096 transitions.
Applied a total of 0 rules in 6 ms. Remains 1024 /1024 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 1024/1024 places, 4096/4096 transitions.
[2023-03-19 13:45:31] [INFO ] Flatten gal took : 415 ms
[2023-03-19 13:45:32] [INFO ] Flatten gal took : 541 ms
[2023-03-19 13:45:33] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1024/1024 places, 4096/4096 transitions.
Applied a total of 0 rules in 5 ms. Remains 1024 /1024 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 1024/1024 places, 4096/4096 transitions.
[2023-03-19 13:45:34] [INFO ] Flatten gal took : 194 ms
[2023-03-19 13:45:34] [INFO ] Flatten gal took : 260 ms
[2023-03-19 13:45:34] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1024/1024 places, 4096/4096 transitions.
Applied a total of 0 rules in 254 ms. Remains 1024 /1024 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 255 ms. Remains : 1024/1024 places, 4096/4096 transitions.
[2023-03-19 13:45:35] [INFO ] Flatten gal took : 132 ms
[2023-03-19 13:45:35] [INFO ] Flatten gal took : 142 ms
[2023-03-19 13:45:35] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1024/1024 places, 4096/4096 transitions.
Applied a total of 0 rules in 229 ms. Remains 1024 /1024 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 229 ms. Remains : 1024/1024 places, 4096/4096 transitions.
[2023-03-19 13:45:36] [INFO ] Flatten gal took : 132 ms
[2023-03-19 13:45:36] [INFO ] Flatten gal took : 142 ms
[2023-03-19 13:45:36] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1024/1024 places, 4096/4096 transitions.
Applied a total of 0 rules in 199 ms. Remains 1024 /1024 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 199 ms. Remains : 1024/1024 places, 4096/4096 transitions.
[2023-03-19 13:45:36] [INFO ] Flatten gal took : 136 ms
[2023-03-19 13:45:37] [INFO ] Flatten gal took : 144 ms
[2023-03-19 13:45:37] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1024/1024 places, 4096/4096 transitions.
Applied a total of 0 rules in 287 ms. Remains 1024 /1024 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 288 ms. Remains : 1024/1024 places, 4096/4096 transitions.
[2023-03-19 13:45:37] [INFO ] Flatten gal took : 141 ms
[2023-03-19 13:45:37] [INFO ] Flatten gal took : 145 ms
[2023-03-19 13:45:38] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1024/1024 places, 4096/4096 transitions.
Applied a total of 0 rules in 203 ms. Remains 1024 /1024 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 203 ms. Remains : 1024/1024 places, 4096/4096 transitions.
[2023-03-19 13:45:38] [INFO ] Flatten gal took : 127 ms
[2023-03-19 13:45:38] [INFO ] Flatten gal took : 144 ms
[2023-03-19 13:45:38] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1024/1024 places, 4096/4096 transitions.
Graph (complete) has 0 edges and 1024 vertex of which 979 are kept as prefixes of interest. Removing 45 places using SCC suffix rule.7 ms
Discarding 45 places :
Also discarding 0 output transitions
Applied a total of 1 rules in 196 ms. Remains 979 /1024 variables (removed 45) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 196 ms. Remains : 979/1024 places, 4096/4096 transitions.
[2023-03-19 13:45:39] [INFO ] Flatten gal took : 121 ms
[2023-03-19 13:45:39] [INFO ] Flatten gal took : 142 ms
[2023-03-19 13:45:39] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1024/1024 places, 4096/4096 transitions.
Applied a total of 0 rules in 223 ms. Remains 1024 /1024 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 223 ms. Remains : 1024/1024 places, 4096/4096 transitions.
[2023-03-19 13:45:39] [INFO ] Flatten gal took : 133 ms
[2023-03-19 13:45:40] [INFO ] Flatten gal took : 145 ms
[2023-03-19 13:45:40] [INFO ] Input system was already deterministic with 4096 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1024/1024 places, 4096/4096 transitions.
Applied a total of 0 rules in 195 ms. Remains 1024 /1024 variables (removed 0) and now considering 4096/4096 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 196 ms. Remains : 1024/1024 places, 4096/4096 transitions.
[2023-03-19 13:45:40] [INFO ] Flatten gal took : 132 ms
[2023-03-19 13:45:40] [INFO ] Flatten gal took : 142 ms
[2023-03-19 13:45:41] [INFO ] Input system was already deterministic with 4096 transitions.
[2023-03-19 13:45:45] [INFO ] Flatten gal took : 2628 ms
[2023-03-19 13:46:08] [INFO ] Flatten gal took : 2623 ms
[2023-03-19 13:46:30] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 620 ms.
[2023-03-19 13:46:30] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 1024 places, 4096 transitions and 16384 arcs took 17 ms.
Total runtime 260899 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/483/ctl_0_ --ctl=/tmp/483/ctl_1_ --ctl=/tmp/483/ctl_2_ --ctl=/tmp/483/ctl_3_ --ctl=/tmp/483/ctl_4_ --ctl=/tmp/483/ctl_5_ --ctl=/tmp/483/ctl_6_ --ctl=/tmp/483/ctl_7_ --ctl=/tmp/483/ctl_8_ --ctl=/tmp/483/ctl_9_ --ctl=/tmp/483/ctl_10_ --ctl=/tmp/483/ctl_11_ --ctl=/tmp/483/ctl_12_ --ctl=/tmp/483/ctl_13_ --ctl=/tmp/483/ctl_14_ --mu-par --mu-opt
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 11733632 kB
After kill :
MemTotal: 16393216 kB
MemFree: 15746868 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Sudoku-PT-BN16"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is Sudoku-PT-BN16, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r489-tall-167912706600314"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Sudoku-PT-BN16.tgz
mv Sudoku-PT-BN16 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;