fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r489-tall-167912706600306
Last Updated
May 14, 2023

About the Execution of LTSMin+red for Sudoku-PT-BN09

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
6834.479 3600000.00 14237245.00 464.20 ????????????T??T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r489-tall-167912706600306.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is Sudoku-PT-BN09, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r489-tall-167912706600306
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 18M
-rw-r--r-- 1 mcc users 187K Feb 26 09:19 CTLCardinality.txt
-rw-r--r-- 1 mcc users 910K Feb 26 09:19 CTLCardinality.xml
-rw-r--r-- 1 mcc users 825K Feb 26 09:08 CTLFireability.txt
-rw-r--r-- 1 mcc users 3.6M Feb 26 09:08 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 153K Feb 25 17:17 LTLCardinality.txt
-rw-r--r-- 1 mcc users 544K Feb 25 17:17 LTLCardinality.xml
-rw-r--r-- 1 mcc users 413K Feb 25 17:17 LTLFireability.txt
-rw-r--r-- 1 mcc users 1.4M Feb 25 17:17 LTLFireability.xml
-rw-r--r-- 1 mcc users 427K Feb 26 09:39 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 2.1M Feb 26 09:39 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 1.3M Feb 26 09:23 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 5.6M Feb 26 09:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 17:17 UpperBounds.txt
-rw-r--r-- 1 mcc users 26K Feb 25 17:17 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 499K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-00
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-01
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-02
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-03
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-04
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-05
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-06
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-07
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-08
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-09
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-10
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-11
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-12
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-13
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-14
FORMULA_NAME Sudoku-PT-BN09-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679231667950

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Sudoku-PT-BN09
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-19 13:14:29] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 13:14:29] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 13:14:29] [INFO ] Load time of PNML (sax parser for PT used): 96 ms
[2023-03-19 13:14:29] [INFO ] Transformed 1053 places.
[2023-03-19 13:14:29] [INFO ] Transformed 729 transitions.
[2023-03-19 13:14:29] [INFO ] Parsed PT model containing 1053 places and 729 transitions and 3645 arcs in 169 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 132 ms.
Support contains 324 out of 1053 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1053/1053 places, 729/729 transitions.
Reduce places removed 729 places and 0 transitions.
Iterating post reduction 0 with 729 rules applied. Total rules applied 729 place count 324 transition count 729
Applied a total of 729 rules in 60 ms. Remains 324 /1053 variables (removed 729) and now considering 729/729 (removed 0) transitions.
// Phase 1: matrix 729 rows 324 cols
[2023-03-19 13:14:31] [INFO ] Computed 75 place invariants in 60 ms
[2023-03-19 13:14:31] [INFO ] Implicit Places using invariants in 540 ms returned []
[2023-03-19 13:14:31] [INFO ] Invariant cache hit.
[2023-03-19 13:14:32] [INFO ] Implicit Places using invariants and state equation in 281 ms returned []
Implicit Place search using SMT with State Equation took 845 ms to find 0 implicit places.
[2023-03-19 13:14:32] [INFO ] Invariant cache hit.
[2023-03-19 13:14:32] [INFO ] Dead Transitions using invariants and state equation in 382 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 324/1053 places, 729/729 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1292 ms. Remains : 324/1053 places, 729/729 transitions.
Support contains 324 out of 324 places after structural reductions.
[2023-03-19 13:14:34] [INFO ] Flatten gal took : 473 ms
[2023-03-19 13:14:39] [INFO ] Flatten gal took : 665 ms
[2023-03-19 13:14:44] [INFO ] Input system was already deterministic with 729 transitions.
Incomplete random walk after 10000 steps, including 151 resets, run finished after 853 ms. (steps per millisecond=11 ) properties (out of 37) seen :35
Interrupted Best-First random walk after 7452 steps, including 2 resets, run timeout after 5057 ms. (steps per millisecond=1 ) properties seen 0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 4520 ms. (steps per millisecond=2 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-19 13:14:55] [INFO ] Invariant cache hit.
[2023-03-19 13:15:03] [INFO ] After 337ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
[2023-03-19 13:15:04] [INFO ] Flatten gal took : 377 ms
[2023-03-19 13:15:09] [INFO ] Flatten gal took : 506 ms
[2023-03-19 13:15:14] [INFO ] Input system was already deterministic with 729 transitions.
Computed a total of 324 stabilizing places and 729 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 324 transition count 729
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 3 formulas.
FORMULA Sudoku-PT-BN09-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-PT-BN09-CTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in SI_CTL mode, iteration 0 : 324/324 places, 729/729 transitions.
Applied a total of 0 rules in 10 ms. Remains 324 /324 variables (removed 0) and now considering 729/729 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 324/324 places, 729/729 transitions.
[2023-03-19 13:15:14] [INFO ] Flatten gal took : 99 ms
[2023-03-19 13:15:14] [INFO ] Flatten gal took : 137 ms
[2023-03-19 13:15:14] [INFO ] Input system was already deterministic with 729 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 324/324 places, 729/729 transitions.
Applied a total of 0 rules in 8 ms. Remains 324 /324 variables (removed 0) and now considering 729/729 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 324/324 places, 729/729 transitions.
[2023-03-19 13:15:15] [INFO ] Flatten gal took : 67 ms
[2023-03-19 13:15:15] [INFO ] Flatten gal took : 97 ms
[2023-03-19 13:15:15] [INFO ] Input system was already deterministic with 729 transitions.
Starting structural reductions in LTL mode, iteration 0 : 324/324 places, 729/729 transitions.
Applied a total of 0 rules in 2 ms. Remains 324 /324 variables (removed 0) and now considering 729/729 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 324/324 places, 729/729 transitions.
[2023-03-19 13:15:15] [INFO ] Flatten gal took : 59 ms
[2023-03-19 13:15:15] [INFO ] Flatten gal took : 83 ms
[2023-03-19 13:15:15] [INFO ] Input system was already deterministic with 729 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 324/324 places, 729/729 transitions.
Applied a total of 0 rules in 6 ms. Remains 324 /324 variables (removed 0) and now considering 729/729 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 324/324 places, 729/729 transitions.
[2023-03-19 13:15:16] [INFO ] Flatten gal took : 47 ms
[2023-03-19 13:15:16] [INFO ] Flatten gal took : 62 ms
[2023-03-19 13:15:16] [INFO ] Input system was already deterministic with 729 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 324/324 places, 729/729 transitions.
Applied a total of 0 rules in 6 ms. Remains 324 /324 variables (removed 0) and now considering 729/729 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 324/324 places, 729/729 transitions.
[2023-03-19 13:15:16] [INFO ] Flatten gal took : 33 ms
[2023-03-19 13:15:16] [INFO ] Flatten gal took : 39 ms
[2023-03-19 13:15:16] [INFO ] Input system was already deterministic with 729 transitions.
Starting structural reductions in LTL mode, iteration 0 : 324/324 places, 729/729 transitions.
Applied a total of 0 rules in 2 ms. Remains 324 /324 variables (removed 0) and now considering 729/729 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 324/324 places, 729/729 transitions.
[2023-03-19 13:15:16] [INFO ] Flatten gal took : 106 ms
[2023-03-19 13:15:17] [INFO ] Flatten gal took : 160 ms
[2023-03-19 13:15:17] [INFO ] Input system was already deterministic with 729 transitions.
Starting structural reductions in LTL mode, iteration 0 : 324/324 places, 729/729 transitions.
Applied a total of 0 rules in 2 ms. Remains 324 /324 variables (removed 0) and now considering 729/729 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 324/324 places, 729/729 transitions.
[2023-03-19 13:15:17] [INFO ] Flatten gal took : 59 ms
[2023-03-19 13:15:17] [INFO ] Flatten gal took : 87 ms
[2023-03-19 13:15:17] [INFO ] Input system was already deterministic with 729 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 324/324 places, 729/729 transitions.
Applied a total of 0 rules in 8 ms. Remains 324 /324 variables (removed 0) and now considering 729/729 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 324/324 places, 729/729 transitions.
[2023-03-19 13:15:18] [INFO ] Flatten gal took : 40 ms
[2023-03-19 13:15:18] [INFO ] Flatten gal took : 54 ms
[2023-03-19 13:15:18] [INFO ] Input system was already deterministic with 729 transitions.
Starting structural reductions in LTL mode, iteration 0 : 324/324 places, 729/729 transitions.
Applied a total of 0 rules in 61 ms. Remains 324 /324 variables (removed 0) and now considering 729/729 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 62 ms. Remains : 324/324 places, 729/729 transitions.
[2023-03-19 13:15:18] [INFO ] Flatten gal took : 27 ms
[2023-03-19 13:15:18] [INFO ] Flatten gal took : 30 ms
[2023-03-19 13:15:18] [INFO ] Input system was already deterministic with 729 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 324/324 places, 729/729 transitions.
Applied a total of 0 rules in 41 ms. Remains 324 /324 variables (removed 0) and now considering 729/729 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 42 ms. Remains : 324/324 places, 729/729 transitions.
[2023-03-19 13:15:18] [INFO ] Flatten gal took : 27 ms
[2023-03-19 13:15:18] [INFO ] Flatten gal took : 30 ms
[2023-03-19 13:15:18] [INFO ] Input system was already deterministic with 729 transitions.
Starting structural reductions in LTL mode, iteration 0 : 324/324 places, 729/729 transitions.
Applied a total of 0 rules in 14 ms. Remains 324 /324 variables (removed 0) and now considering 729/729 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 324/324 places, 729/729 transitions.
[2023-03-19 13:15:18] [INFO ] Flatten gal took : 27 ms
[2023-03-19 13:15:18] [INFO ] Flatten gal took : 29 ms
[2023-03-19 13:15:18] [INFO ] Input system was already deterministic with 729 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 324/324 places, 729/729 transitions.
Applied a total of 0 rules in 16 ms. Remains 324 /324 variables (removed 0) and now considering 729/729 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 324/324 places, 729/729 transitions.
[2023-03-19 13:15:18] [INFO ] Flatten gal took : 26 ms
[2023-03-19 13:15:18] [INFO ] Flatten gal took : 28 ms
[2023-03-19 13:15:18] [INFO ] Input system was already deterministic with 729 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 324/324 places, 729/729 transitions.
Applied a total of 0 rules in 14 ms. Remains 324 /324 variables (removed 0) and now considering 729/729 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 324/324 places, 729/729 transitions.
[2023-03-19 13:15:18] [INFO ] Flatten gal took : 26 ms
[2023-03-19 13:15:18] [INFO ] Flatten gal took : 28 ms
[2023-03-19 13:15:18] [INFO ] Input system was already deterministic with 729 transitions.
Starting structural reductions in LTL mode, iteration 0 : 324/324 places, 729/729 transitions.
Applied a total of 0 rules in 7 ms. Remains 324 /324 variables (removed 0) and now considering 729/729 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 324/324 places, 729/729 transitions.
[2023-03-19 13:15:19] [INFO ] Flatten gal took : 26 ms
[2023-03-19 13:15:19] [INFO ] Flatten gal took : 27 ms
[2023-03-19 13:15:19] [INFO ] Input system was already deterministic with 729 transitions.
[2023-03-19 13:15:19] [INFO ] Flatten gal took : 504 ms
[2023-03-19 13:15:24] [INFO ] Flatten gal took : 524 ms
[2023-03-19 13:15:28] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 154 ms.
[2023-03-19 13:15:28] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 324 places, 729 transitions and 2916 arcs took 3 ms.
Total runtime 59420 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/482/ctl_0_ --ctl=/tmp/482/ctl_1_ --ctl=/tmp/482/ctl_2_ --ctl=/tmp/482/ctl_3_ --ctl=/tmp/482/ctl_4_ --ctl=/tmp/482/ctl_5_ --ctl=/tmp/482/ctl_6_ --ctl=/tmp/482/ctl_7_ --ctl=/tmp/482/ctl_8_ --ctl=/tmp/482/ctl_9_ --ctl=/tmp/482/ctl_10_ --ctl=/tmp/482/ctl_11_ --ctl=/tmp/482/ctl_12_ --ctl=/tmp/482/ctl_13_ --mu-par --mu-opt
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 13016728 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16041240 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Sudoku-PT-BN09"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is Sudoku-PT-BN09, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r489-tall-167912706600306"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Sudoku-PT-BN09.tgz
mv Sudoku-PT-BN09 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;