Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r489-tall-167912706300090.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is Sudoku-COL-AN12, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r489-tall-167912706300090
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 472K
-rw-r--r-- 1 mcc users 8.4K Feb 26 09:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 94K Feb 26 09:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 26 08:47 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 26 08:47 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:16 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 17:16 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 17:16 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 17:16 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 26 10:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 120K Feb 26 10:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Feb 26 09:26 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 66K Feb 26 09:26 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:16 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:16 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 6.5K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-00
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-01
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-02
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-03
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-04
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-05
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-06
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-07
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-08
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-09
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-10
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-11
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-12
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-13
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-14
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679184473915

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Sudoku-COL-AN12
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-19 00:07:55] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 00:07:55] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 00:07:55] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-19 00:07:55] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-19 00:07:55] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 524 ms
[2023-03-19 00:07:55] [INFO ] Imported 4 HL places and 1 HL transitions for a total of 2160 PT places and 1728.0 transition bindings in 12 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
[2023-03-19 00:07:55] [INFO ] Built PT skeleton of HLPN with 4 places and 1 transitions 4 arcs in 4 ms.
[2023-03-19 00:07:55] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Computed a total of 4 stabilizing places and 1 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 4 transition count 1
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 9 formulas.
FORMULA Sudoku-COL-AN12-CTLFireability-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-COL-AN12-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-COL-AN12-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-COL-AN12-CTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
All 16 properties of the HLPN use transition enablings in a way that makes the skeleton too coarse.
Domain [N(12), N(12)] of place Rows breaks symmetries in sort N
[2023-03-19 00:07:56] [INFO ] Unfolded HLPN to a Petri net with 2160 places and 1728 transitions 6912 arcs in 43 ms.
[2023-03-19 00:07:56] [INFO ] Unfolded 12 HLPN properties in 22 ms.
Support contains 432 out of 2160 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2160/2160 places, 1728/1728 transitions.
Reduce places removed 1728 places and 0 transitions.
Iterating post reduction 0 with 1728 rules applied. Total rules applied 1728 place count 432 transition count 1728
Applied a total of 1728 rules in 47 ms. Remains 432 /2160 variables (removed 1728) and now considering 1728/1728 (removed 0) transitions.
// Phase 1: matrix 1728 rows 432 cols
[2023-03-19 00:08:02] [INFO ] Computed 35 place invariants in 109 ms
[2023-03-19 00:08:02] [INFO ] Implicit Places using invariants in 344 ms returned []
[2023-03-19 00:08:02] [INFO ] Invariant cache hit.
[2023-03-19 00:08:02] [INFO ] Implicit Places using invariants and state equation in 551 ms returned []
Implicit Place search using SMT with State Equation took 919 ms to find 0 implicit places.
[2023-03-19 00:08:02] [INFO ] Invariant cache hit.
[2023-03-19 00:08:03] [INFO ] Dead Transitions using invariants and state equation in 595 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 432/2160 places, 1728/1728 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1564 ms. Remains : 432/2160 places, 1728/1728 transitions.
Support contains 432 out of 432 places after structural reductions.
[2023-03-19 00:08:06] [INFO ] Flatten gal took : 950 ms
[2023-03-19 00:08:15] [INFO ] Flatten gal took : 1379 ms
[2023-03-19 00:08:26] [INFO ] Input system was already deterministic with 1728 transitions.
Incomplete random walk after 10000 steps, including 79 resets, run finished after 1405 ms. (steps per millisecond=7 ) properties (out of 10) seen :8
Interrupted Best-First random walk after 5154 steps, including 1 resets, run timeout after 5233 ms. (steps per millisecond=0 ) properties seen 0
Interrupted Best-First random walk after 3424 steps, including 0 resets, run timeout after 5093 ms. (steps per millisecond=0 ) properties seen 0
Running SMT prover for 2 properties.
[2023-03-19 00:08:38] [INFO ] Invariant cache hit.
[2023-03-19 00:08:50] [INFO ] After 978ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 2 atomic propositions for a total of 12 simplifications.
[2023-03-19 00:08:55] [INFO ] Flatten gal took : 708 ms
[2023-03-19 00:09:04] [INFO ] Flatten gal took : 1310 ms
[2023-03-19 00:09:13] [INFO ] Input system was already deterministic with 1728 transitions.
Computed a total of 432 stabilizing places and 1728 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 432 transition count 1728
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 4 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-19 00:09:16] [INFO ] Flatten gal took : 196 ms
[2023-03-19 00:09:16] [INFO ] Flatten gal took : 286 ms
[2023-03-19 00:09:17] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 4 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-19 00:09:17] [INFO ] Flatten gal took : 111 ms
[2023-03-19 00:09:17] [INFO ] Flatten gal took : 164 ms
[2023-03-19 00:09:18] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 3 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-19 00:09:18] [INFO ] Flatten gal took : 122 ms
[2023-03-19 00:09:18] [INFO ] Flatten gal took : 183 ms
[2023-03-19 00:09:18] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 4 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-19 00:09:20] [INFO ] Flatten gal took : 179 ms
[2023-03-19 00:09:20] [INFO ] Flatten gal took : 278 ms
[2023-03-19 00:09:21] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 4 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-19 00:09:21] [INFO ] Flatten gal took : 61 ms
[2023-03-19 00:09:21] [INFO ] Flatten gal took : 79 ms
[2023-03-19 00:09:21] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 4 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-19 00:09:22] [INFO ] Flatten gal took : 78 ms
[2023-03-19 00:09:22] [INFO ] Flatten gal took : 105 ms
[2023-03-19 00:09:22] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 4 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-19 00:09:22] [INFO ] Flatten gal took : 81 ms
[2023-03-19 00:09:23] [INFO ] Flatten gal took : 113 ms
[2023-03-19 00:09:23] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 3 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-19 00:09:23] [INFO ] Flatten gal took : 72 ms
[2023-03-19 00:09:23] [INFO ] Flatten gal took : 95 ms
[2023-03-19 00:09:23] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 3 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-19 00:09:23] [INFO ] Flatten gal took : 53 ms
[2023-03-19 00:09:23] [INFO ] Flatten gal took : 63 ms
[2023-03-19 00:09:24] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 3 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-19 00:09:24] [INFO ] Flatten gal took : 138 ms
[2023-03-19 00:09:24] [INFO ] Flatten gal took : 203 ms
[2023-03-19 00:09:25] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 3 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-19 00:09:25] [INFO ] Flatten gal took : 117 ms
[2023-03-19 00:09:25] [INFO ] Flatten gal took : 199 ms
[2023-03-19 00:09:25] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 3 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-19 00:09:26] [INFO ] Flatten gal took : 73 ms
[2023-03-19 00:09:26] [INFO ] Flatten gal took : 99 ms
[2023-03-19 00:09:26] [INFO ] Input system was already deterministic with 1728 transitions.
[2023-03-19 00:09:28] [INFO ] Flatten gal took : 1137 ms
[2023-03-19 00:09:37] [INFO ] Flatten gal took : 1209 ms
[2023-03-19 00:09:45] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 373 ms.
[2023-03-19 00:09:45] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 432 places, 1728 transitions and 5184 arcs took 7 ms.
Total runtime 110247 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/485/ctl_0_ --ctl=/tmp/485/ctl_1_ --ctl=/tmp/485/ctl_2_ --ctl=/tmp/485/ctl_3_ --ctl=/tmp/485/ctl_4_ --ctl=/tmp/485/ctl_5_ --ctl=/tmp/485/ctl_6_ --ctl=/tmp/485/ctl_7_ --ctl=/tmp/485/ctl_8_ --ctl=/tmp/485/ctl_9_ --ctl=/tmp/485/ctl_10_ --ctl=/tmp/485/ctl_11_ --mu-par --mu-opt
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393232 kB
MemFree: 9972632 kB
After kill :
MemTotal: 16393232 kB
MemFree: 15975344 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Sudoku-COL-AN12"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is Sudoku-COL-AN12, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r489-tall-167912706300090"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Sudoku-COL-AN12.tgz
mv Sudoku-COL-AN12 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;