fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r487-tall-167912704001138
Last Updated
May 14, 2023

About the Execution of LoLa+red for UtilityControlRoom-PT-Z2T4N06

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2018.315 181166.00 186035.00 683.70 F?TFTT?FTTTTFTTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r487-tall-167912704001138.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is UtilityControlRoom-PT-Z2T4N06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912704001138
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 968K
-rw-r--r-- 1 mcc users 18K Feb 26 14:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 115K Feb 26 14:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 29K Feb 26 14:43 CTLFireability.txt
-rw-r--r-- 1 mcc users 146K Feb 26 14:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 9.6K Feb 25 17:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 40K Feb 25 17:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 25 17:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 42K Feb 25 17:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 43K Feb 26 14:48 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 218K Feb 26 14:48 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 33K Feb 26 14:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 146K Feb 26 14:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 17:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.2K Feb 25 17:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 70K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-00
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-01
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-02
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-03
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-04
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-05
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-06
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-07
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-08
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-09
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-10
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-11
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-12
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-13
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-14
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679233251085

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z2T4N06
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 13:40:52] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 13:40:52] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 13:40:52] [INFO ] Load time of PNML (sax parser for PT used): 38 ms
[2023-03-19 13:40:52] [INFO ] Transformed 106 places.
[2023-03-19 13:40:52] [INFO ] Transformed 162 transitions.
[2023-03-19 13:40:52] [INFO ] Parsed PT model containing 106 places and 162 transitions and 510 arcs in 96 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 15 ms.
[2023-03-19 13:40:52] [INFO ] Reduced 6 identical enabling conditions.
[2023-03-19 13:40:52] [INFO ] Reduced 6 identical enabling conditions.
[2023-03-19 13:40:52] [INFO ] Reduced 6 identical enabling conditions.
[2023-03-19 13:40:52] [INFO ] Reduced 6 identical enabling conditions.
[2023-03-19 13:40:52] [INFO ] Reduced 6 identical enabling conditions.
[2023-03-19 13:40:52] [INFO ] Reduced 6 identical enabling conditions.
[2023-03-19 13:40:52] [INFO ] Reduced 6 identical enabling conditions.
[2023-03-19 13:40:52] [INFO ] Reduced 6 identical enabling conditions.
[2023-03-19 13:40:52] [INFO ] Reduced 6 identical enabling conditions.
[2023-03-19 13:40:52] [INFO ] Reduced 6 identical enabling conditions.
[2023-03-19 13:40:52] [INFO ] Reduced 6 identical enabling conditions.
Ensure Unique test removed 24 transitions
Reduce redundant transitions removed 24 transitions.
Support contains 106 out of 106 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Applied a total of 0 rules in 9 ms. Remains 106 /106 variables (removed 0) and now considering 138/138 (removed 0) transitions.
// Phase 1: matrix 138 rows 106 cols
[2023-03-19 13:40:52] [INFO ] Computed 15 place invariants in 16 ms
[2023-03-19 13:40:53] [INFO ] Implicit Places using invariants in 379 ms returned []
[2023-03-19 13:40:53] [INFO ] Invariant cache hit.
[2023-03-19 13:40:53] [INFO ] Implicit Places using invariants and state equation in 81 ms returned []
Implicit Place search using SMT with State Equation took 483 ms to find 0 implicit places.
[2023-03-19 13:40:53] [INFO ] Invariant cache hit.
[2023-03-19 13:40:53] [INFO ] Dead Transitions using invariants and state equation in 81 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 576 ms. Remains : 106/106 places, 138/138 transitions.
Support contains 106 out of 106 places after structural reductions.
[2023-03-19 13:40:53] [INFO ] Flatten gal took : 37 ms
[2023-03-19 13:40:53] [INFO ] Flatten gal took : 21 ms
[2023-03-19 13:40:53] [INFO ] Input system was already deterministic with 138 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 273 ms. (steps per millisecond=36 ) properties (out of 60) seen :58
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-19 13:40:54] [INFO ] Invariant cache hit.
[2023-03-19 13:40:54] [INFO ] [Real]Absence check using 15 positive place invariants in 6 ms returned sat
[2023-03-19 13:40:54] [INFO ] After 52ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 13 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 14 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 138 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Applied a total of 0 rules in 1 ms. Remains 106 /106 variables (removed 0) and now considering 138/138 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 106/106 places, 138/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 7 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 8 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 138 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Applied a total of 24 rules in 4 ms. Remains 94 /106 variables (removed 12) and now considering 126/138 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 94/106 places, 126/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 7 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 8 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Applied a total of 24 rules in 6 ms. Remains 94 /106 variables (removed 12) and now considering 126/138 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 94/106 places, 126/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 6 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 6 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Applied a total of 24 rules in 3 ms. Remains 94 /106 variables (removed 12) and now considering 126/138 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 94/106 places, 126/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 5 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 5 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Applied a total of 0 rules in 2 ms. Remains 106 /106 variables (removed 0) and now considering 138/138 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 106/106 places, 138/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 5 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 7 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 138 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Applied a total of 24 rules in 2 ms. Remains 94 /106 variables (removed 12) and now considering 126/138 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 94/106 places, 126/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 6 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 6 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Applied a total of 24 rules in 3 ms. Remains 94 /106 variables (removed 12) and now considering 126/138 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 94/106 places, 126/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 5 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 5 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Applied a total of 0 rules in 1 ms. Remains 106 /106 variables (removed 0) and now considering 138/138 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 106/106 places, 138/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 6 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 7 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 138 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 95 transition count 127
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 95 transition count 127
Applied a total of 22 rules in 4 ms. Remains 95 /106 variables (removed 11) and now considering 127/138 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 95/106 places, 127/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 4 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 4 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 127 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Applied a total of 24 rules in 4 ms. Remains 94 /106 variables (removed 12) and now considering 126/138 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 94/106 places, 126/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 4 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 4 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Performed 22 Post agglomeration using F-continuation condition.Transition count delta: 22
Iterating post reduction 0 with 22 rules applied. Total rules applied 22 place count 106 transition count 116
Reduce places removed 22 places and 0 transitions.
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 1 with 33 rules applied. Total rules applied 55 place count 84 transition count 105
Performed 11 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 11 Pre rules applied. Total rules applied 55 place count 84 transition count 94
Deduced a syphon composed of 11 places in 0 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 2 with 22 rules applied. Total rules applied 77 place count 73 transition count 94
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 78 place count 72 transition count 93
Iterating global reduction 2 with 1 rules applied. Total rules applied 79 place count 72 transition count 93
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 91 place count 66 transition count 87
Applied a total of 91 rules in 18 ms. Remains 66 /106 variables (removed 40) and now considering 87/138 (removed 51) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 66/106 places, 87/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 3 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 3 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 87 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Performed 22 Post agglomeration using F-continuation condition.Transition count delta: 22
Iterating post reduction 0 with 22 rules applied. Total rules applied 22 place count 106 transition count 116
Reduce places removed 22 places and 0 transitions.
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 1 with 34 rules applied. Total rules applied 56 place count 84 transition count 104
Performed 12 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 12 Pre rules applied. Total rules applied 56 place count 84 transition count 92
Deduced a syphon composed of 12 places in 0 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 2 with 24 rules applied. Total rules applied 80 place count 72 transition count 92
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 92 place count 66 transition count 86
Applied a total of 92 rules in 10 ms. Remains 66 /106 variables (removed 40) and now considering 86/138 (removed 52) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 66/106 places, 86/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 2 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 3 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 86 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 95 transition count 127
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 95 transition count 127
Applied a total of 22 rules in 3 ms. Remains 95 /106 variables (removed 11) and now considering 127/138 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 95/106 places, 127/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 4 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 4 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 127 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Applied a total of 24 rules in 3 ms. Remains 94 /106 variables (removed 12) and now considering 126/138 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 94/106 places, 126/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 3 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 4 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 97 transition count 129
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 97 transition count 129
Applied a total of 18 rules in 2 ms. Remains 97 /106 variables (removed 9) and now considering 129/138 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 97/106 places, 129/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 4 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 4 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 129 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Performed 24 Post agglomeration using F-continuation condition.Transition count delta: 24
Iterating post reduction 0 with 24 rules applied. Total rules applied 24 place count 106 transition count 114
Reduce places removed 24 places and 0 transitions.
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 1 with 36 rules applied. Total rules applied 60 place count 82 transition count 102
Performed 12 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 12 Pre rules applied. Total rules applied 60 place count 82 transition count 90
Deduced a syphon composed of 12 places in 0 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 2 with 24 rules applied. Total rules applied 84 place count 70 transition count 90
Partial Post-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 2 with 2 rules applied. Total rules applied 86 place count 70 transition count 90
Applied a total of 86 rules in 9 ms. Remains 70 /106 variables (removed 36) and now considering 90/138 (removed 48) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 70/106 places, 90/138 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 3 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 3 ms
[2023-03-19 13:40:54] [INFO ] Input system was already deterministic with 90 transitions.
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 10 ms
[2023-03-19 13:40:54] [INFO ] Flatten gal took : 10 ms
[2023-03-19 13:40:54] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 11 ms.
[2023-03-19 13:40:54] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 106 places, 138 transitions and 414 arcs took 0 ms.
Total runtime 2447 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT UtilityControlRoom-PT-Z2T4N06
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA UtilityControlRoom-PT-Z2T4N06-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679233432251

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:463
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 6 (type EXCL) for 3 UtilityControlRoom-PT-Z2T4N06-CTLFireability-01
lola: time limit : 109 sec
lola: memory limit: 32 pages
lola: FINISHED task # 6 (type EXCL) for UtilityControlRoom-PT-Z2T4N06-CTLFireability-01
lola: result : false
lola: markings : 99
lola: fired transitions : 181
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 10 (type EXCL) for 3 UtilityControlRoom-PT-Z2T4N06-CTLFireability-01
lola: time limit : 112 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for UtilityControlRoom-PT-Z2T4N06-CTLFireability-01
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 16 (type EXCL) for 3 UtilityControlRoom-PT-Z2T4N06-CTLFireability-01
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

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UtilityControlRoom-PT-Z2T4N06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z2T4N06-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N06-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-PT-Z2T4N06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N06-CTLFireability-05: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-PT-Z2T4N06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z2T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/189 4/32 UtilityControlRoom-PT-Z2T4N06-CTLFireability-01 908343 m, 181668 m/sec, 4738829 t fired, .

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UtilityControlRoom-PT-Z2T4N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 10/189 7/32 UtilityControlRoom-PT-Z2T4N06-CTLFireability-01 1684807 m, 155292 m/sec, 9589775 t fired, .

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UtilityControlRoom-PT-Z2T4N06-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N06-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
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UtilityControlRoom-PT-Z2T4N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 15/189 10/32 UtilityControlRoom-PT-Z2T4N06-CTLFireability-01 2356439 m, 134326 m/sec, 14292086 t fired, .

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UtilityControlRoom-PT-Z2T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 20/189 13/32 UtilityControlRoom-PT-Z2T4N06-CTLFireability-01 3099782 m, 148668 m/sec, 19035007 t fired, .

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FINAL RESULTS
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UtilityControlRoom-PT-Z2T4N06-CTLFireability-00: CTL false CTL model checker
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UtilityControlRoom-PT-Z2T4N06-CTLFireability-06: CTL unknown AGGR
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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z2T4N06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is UtilityControlRoom-PT-Z2T4N06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912704001138"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z2T4N06.tgz
mv UtilityControlRoom-PT-Z2T4N06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;