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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r487-tall-167912704001134
Last Updated
May 14, 2023

About the Execution of LoLa+red for UtilityControlRoom-PT-Z2T4N04

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
248.880 5353.00 11821.00 262.00 FTTFTTFTFFTTTTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r487-tall-167912704001134.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is UtilityControlRoom-PT-Z2T4N04, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912704001134
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 984K
-rw-r--r-- 1 mcc users 19K Feb 26 14:26 CTLCardinality.txt
-rw-r--r-- 1 mcc users 124K Feb 26 14:26 CTLCardinality.xml
-rw-r--r-- 1 mcc users 19K Feb 26 14:24 CTLFireability.txt
-rw-r--r-- 1 mcc users 106K Feb 26 14:24 CTLFireability.xml
-rw-r--r-- 1 mcc users 7.0K Feb 25 17:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 33K Feb 25 17:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 6.8K Feb 25 17:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 31K Feb 25 17:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 27K Feb 26 14:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 168K Feb 26 14:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 64K Feb 26 14:28 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 295K Feb 26 14:28 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 17:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.8K Feb 25 17:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 47K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-00
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-01
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-02
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-03
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-05
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-06
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-07
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-08
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-09
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-10
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-11
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-12
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-13
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-14
FORMULA_NAME UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1679233225040

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z2T4N04
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 13:40:26] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 13:40:26] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 13:40:26] [INFO ] Load time of PNML (sax parser for PT used): 31 ms
[2023-03-19 13:40:26] [INFO ] Transformed 72 places.
[2023-03-19 13:40:26] [INFO ] Transformed 108 transitions.
[2023-03-19 13:40:26] [INFO ] Parsed PT model containing 72 places and 108 transitions and 340 arcs in 88 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 18 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 16 transitions
Reduce redundant transitions removed 16 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 528 ms. (steps per millisecond=18 ) properties (out of 16) seen :2
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 89 ms. (steps per millisecond=112 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 89 ms. (steps per millisecond=112 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 73 ms. (steps per millisecond=137 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 58 ms. (steps per millisecond=172 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 14) seen :0
Running SMT prover for 14 properties.
// Phase 1: matrix 92 rows 72 cols
[2023-03-19 13:40:27] [INFO ] Computed 11 place invariants in 10 ms
[2023-03-19 13:40:28] [INFO ] After 187ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:14
[2023-03-19 13:40:28] [INFO ] [Nat]Absence check using 11 positive place invariants in 4 ms returned sat
[2023-03-19 13:40:28] [INFO ] After 109ms SMT Verify possible using all constraints in natural domain returned unsat :14 sat :0
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-15 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-14 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-13 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-11 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-10 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-09 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-08 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-02 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-01 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-00 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 14 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 1842 ms.
starting LoLA
BK_INPUT UtilityControlRoom-PT-Z2T4N04
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679233230393

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 49 (type SKEL/FNDP) for 0 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 50 (type SKEL/EQUN) for 0 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type SKEL/SRCH) for 0 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 0 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 53 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-00
lola: result : false
lola: markings : 226
lola: fired transitions : 438
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 50 (type EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 52 (type SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-00 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 56 (type SKEL/FNDP) for 12 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SKEL/EQUN) for 12 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/SRCH) for 12 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 60 (type SKEL/SRCH) for 12 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 60 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04
lola: result : true
lola: markings : 32
lola: fired transitions : 32
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 56 (type FNDP) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 57 (type EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 59 (type SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04 (obsolete)
lola: FINISHED task # 56 (type SKEL/FNDP) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04
lola: result : true
lola: fired transitions : 8
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 64 (type SKEL/FNDP) for 6 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SKEL/EQUN) for 6 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/SRCH) for 6 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SKEL/SRCH) for 6 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 67 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-02
lola: result : false
lola: markings : 86
lola: fired transitions : 131
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 64 (type FNDP) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 65 (type EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 68 (type SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-02 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-65.sara.
sara: place or transition ordering is non-deterministic

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-57.sara.
sara: place or transition ordering is non-deterministic

lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 72 (type SKEL/FNDP) for 21 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SKEL/EQUN) for 21 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SKEL/SRCH) for 21 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 76 (type SKEL/SRCH) for 21 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 76 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-07
lola: result : false
lola: markings : 157
lola: fired transitions : 239
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 75 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-07
lola: result : false
lola: markings : 232
lola: fired transitions : 557
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 72 (type FNDP) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 73 (type EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-07 (obsolete)
lola: planning for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-07 stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: planning for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-00 stopped (result already fixed).
lola: planning for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-02 stopped (result already fixed).
lola: LAUNCH task # 82 (type SKEL/FNDP) for 3 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SKEL/EQUN) for 3 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type SKEL/SRCH) for 3 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 86 (type SKEL/SRCH) for 3 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 72 (type SKEL/FNDP) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 3807
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 73 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-07
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-83.sara.
sara: place or transition ordering is non-deterministic

sara: place or transition ordering is non-deterministic
lola: FINISHED task # 57 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 85 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-01
lola: result : false
lola: markings : 86
lola: fired transitions : 131
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 82 (type FNDP) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 83 (type EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 86 (type SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 91 (type SKEL/FNDP) for 15 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 92 (type SKEL/EQUN) for 15 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type SKEL/SRCH) for 15 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SKEL/SRCH) for 15 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 65 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-02
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 95 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-05
lola: result : false
lola: markings : 86
lola: fired transitions : 131
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 91 (type FNDP) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 92 (type EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 96 (type SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 89 (type SKEL/FNDP) for 18 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 98 (type SKEL/EQUN) for 18 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 102 (type SKEL/SRCH) for 18 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type SKEL/SRCH) for 18 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 102 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-06
lola: result : false
lola: markings : 615
lola: fired transitions : 2156
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 89 (type FNDP) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 98 (type EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 103 (type SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 93 (type SKEL/FNDP) for 9 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 100 (type SKEL/EQUN) for 9 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 104 (type SKEL/SRCH) for 9 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 105 (type SKEL/SRCH) for 9 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-92.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 83 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-01
lola: result : false
lola: FINISHED task # 105 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-03
lola: result : false
lola: markings : 93
lola: fired transitions : 131
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 93 (type FNDP) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 100 (type EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 104 (type SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-03 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-98.sara.
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-100.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 104 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-03
lola: result : false
lola: markings : 202
lola: fired transitions : 356
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 113 (type EXCL) for 39 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-13
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 109 (type FNDP) for 39 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type EQUN) for 39 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 112 (type SRCH) for 39 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: planning for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-01 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: planning for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-06 stopped (result already fixed).
lola: planning for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-03 stopped (result already fixed).

lola: FINISHED task # 113 (type EXCL) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-13
lola: result : false
lola: markings : 5
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 109 (type FNDP) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 110 (type EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 112 (type SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 119 (type EXCL) for 36 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-12
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 121 (type FNDP) for 27 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type EQUN) for 27 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type SRCH) for 27 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 109 (type FNDP) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 186
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.

lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 119 (type EXCL) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-12
lola: result : true
lola: markings : 529
lola: fired transitions : 653
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 131 (type EXCL) for 45 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-15
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 98 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-06
lola: result : false
lola: planning for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-05 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 131 (type EXCL) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-15
lola: result : false
lola: markings : 5
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 143 (type EXCL) for 30 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-10
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-122.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 100 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-03
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-110.sara.

lola: FINISHED task # 143 (type EXCL) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-10
lola: result : false
lola: markings : 847
lola: fired transitions : 1902
lola: time used : 0.000000
lola: memory pages used : 1

lola: LAUNCH task # 163 (type EXCL) for 24 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-08
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 163 (type EXCL) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-08
lola: result : false
lola: markings : 7
lola: fired transitions : 18
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 151 (type EXCL) for 12 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 151 (type EXCL) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04
lola: result : true
lola: markings : 20
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 125 (type EXCL) for 27 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-09
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 92 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-05
lola: result : false
lola: FINISHED task # 50 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-00
lola: result : false
lola: FINISHED task # 110 (type EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-13
lola: result : false

lola: FINISHED task # 122 (type EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 121 (type FNDP) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 124 (type SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 125 (type EXCL) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 138 (type EXCL) for 42 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-14
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 153 (type FNDP) for 33 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 154 (type EQUN) for 33 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 156 (type SRCH) for 33 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 121 (type FNDP) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 30026
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-154.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 138 (type EXCL) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-14
lola: result : false
lola: markings : 16312
lola: fired transitions : 34037
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 157 (type EXCL) for 33 UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-11
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 157 (type EXCL) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-11
lola: result : false
lola: markings : 11151
lola: fired transitions : 21812
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 153 (type FNDP) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 154 (type EQUN) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 156 (type SRCH) for UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-11 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-00: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-01: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-02: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-03: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-04: EF true tandem / relaxed
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-09: EF false state equation
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-10: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-11: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-12: EF true tandem / relaxed
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-13: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-14: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N04-ReachabilityCardinality-15: EF false tandem / relaxed


Time elapsed: 1 secs. Pages in use: 3

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z2T4N04"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is UtilityControlRoom-PT-Z2T4N04, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912704001134"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z2T4N04.tgz
mv UtilityControlRoom-PT-Z2T4N04 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;