Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r487-tall-167912703901066.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is UtilityControlRoom-COL-Z4T4N06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912703901066
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 440K
-rw-r--r-- 1 mcc users 6.7K Feb 26 14:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 59K Feb 26 14:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Feb 26 14:21 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 26 14:21 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 17:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 17:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 17:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 14:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 114K Feb 26 14:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.2K Feb 26 14:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 63K Feb 26 14:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 17:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 17:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 29K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-00
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-01
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-02
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-03
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-04
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-05
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-06
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-07
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-08
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-09
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-10
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-11
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-12
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-13
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-14
FORMULA_NAME UtilityControlRoom-COL-Z4T4N06-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679231146994

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-COL-Z4T4N06
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 13:05:48] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 13:05:48] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 13:05:48] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-19 13:05:48] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-19 13:05:48] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 590 ms
[2023-03-19 13:05:49] [INFO ] Imported 13 HL places and 12 HL transitions for a total of 228 PT places and 450.0 transition bindings in 14 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
FORMULA UtilityControlRoom-COL-Z4T4N06-CTLFireability-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 13:05:49] [INFO ] Built PT skeleton of HLPN with 13 places and 12 transitions 37 arcs in 4 ms.
[2023-03-19 13:05:49] [INFO ] Skeletonized 15 HLPN properties in 1 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 7 properties that can be checked using skeleton over-approximation.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Incomplete random walk after 10000 steps, including 2 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 20) seen :19
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 11 rows 13 cols
[2023-03-19 13:05:49] [INFO ] Computed 5 place invariants in 7 ms
[2023-03-19 13:05:49] [INFO ] After 108ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 1 atomic propositions for a total of 7 simplifications.
[2023-03-19 13:05:49] [INFO ] Flatten gal took : 13 ms
[2023-03-19 13:05:49] [INFO ] Flatten gal took : 2 ms
Transition timeout forces synchronizations/join behavior on parameter c of sort Cli
Domain [Cli(6), Z(4), Z(4)] of place MovetoZ breaks symmetries in sort Z
[2023-03-19 13:05:49] [INFO ] Unfolded HLPN to a Petri net with 228 places and 450 transitions 1446 arcs in 15 ms.
[2023-03-19 13:05:49] [INFO ] Unfolded 15 HLPN properties in 2 ms.
[2023-03-19 13:05:49] [INFO ] Reduced 18 identical enabling conditions.
[2023-03-19 13:05:49] [INFO ] Reduced 18 identical enabling conditions.
[2023-03-19 13:05:49] [INFO ] Reduced 18 identical enabling conditions.
[2023-03-19 13:05:49] [INFO ] Reduced 18 identical enabling conditions.
[2023-03-19 13:05:49] [INFO ] Reduced 18 identical enabling conditions.
[2023-03-19 13:05:49] [INFO ] Reduced 18 identical enabling conditions.
[2023-03-19 13:05:49] [INFO ] Reduced 18 identical enabling conditions.
[2023-03-19 13:05:49] [INFO ] Reduced 18 identical enabling conditions.
[2023-03-19 13:05:49] [INFO ] Reduced 18 identical enabling conditions.
Ensure Unique test removed 96 transitions
Reduce redundant transitions removed 96 transitions.
Support contains 228 out of 228 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 8 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
// Phase 1: matrix 354 rows 228 cols
[2023-03-19 13:05:49] [INFO ] Computed 15 place invariants in 19 ms
[2023-03-19 13:05:49] [INFO ] Implicit Places using invariants in 111 ms returned []
[2023-03-19 13:05:49] [INFO ] Invariant cache hit.
[2023-03-19 13:05:49] [INFO ] Implicit Places using invariants and state equation in 128 ms returned []
Implicit Place search using SMT with State Equation took 239 ms to find 0 implicit places.
[2023-03-19 13:05:49] [INFO ] Invariant cache hit.
[2023-03-19 13:05:49] [INFO ] Dead Transitions using invariants and state equation in 185 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 433 ms. Remains : 228/228 places, 354/354 transitions.
Support contains 228 out of 228 places after structural reductions.
[2023-03-19 13:05:49] [INFO ] Flatten gal took : 53 ms
[2023-03-19 13:05:50] [INFO ] Flatten gal took : 52 ms
[2023-03-19 13:05:50] [INFO ] Input system was already deterministic with 354 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 88 ms. (steps per millisecond=113 ) properties (out of 36) seen :35
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 72 ms. (steps per millisecond=138 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-19 13:05:50] [INFO ] Invariant cache hit.
[2023-03-19 13:05:50] [INFO ] After 34ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 15 simplifications.
[2023-03-19 13:05:50] [INFO ] Flatten gal took : 32 ms
[2023-03-19 13:05:51] [INFO ] Flatten gal took : 48 ms
[2023-03-19 13:05:51] [INFO ] Input system was already deterministic with 354 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Performed 24 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 24 Pre rules applied. Total rules applied 0 place count 228 transition count 330
Deduced a syphon composed of 24 places in 1 ms
Reduce places removed 24 places and 0 transitions.
Iterating global reduction 0 with 48 rules applied. Total rules applied 48 place count 204 transition count 330
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 0 with 12 rules applied. Total rules applied 60 place count 198 transition count 324
Applied a total of 60 rules in 27 ms. Remains 198 /228 variables (removed 30) and now considering 324/354 (removed 30) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 27 ms. Remains : 198/228 places, 324/354 transitions.
[2023-03-19 13:05:51] [INFO ] Flatten gal took : 16 ms
[2023-03-19 13:05:51] [INFO ] Flatten gal took : 14 ms
[2023-03-19 13:05:51] [INFO ] Input system was already deterministic with 324 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 2 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 228/228 places, 354/354 transitions.
[2023-03-19 13:05:51] [INFO ] Flatten gal took : 15 ms
[2023-03-19 13:05:51] [INFO ] Flatten gal took : 17 ms
[2023-03-19 13:05:51] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 12 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 156/228 places, 282/354 transitions.
[2023-03-19 13:05:51] [INFO ] Flatten gal took : 12 ms
[2023-03-19 13:05:51] [INFO ] Flatten gal took : 11 ms
[2023-03-19 13:05:51] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 2 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 228/228 places, 354/354 transitions.
[2023-03-19 13:05:51] [INFO ] Flatten gal took : 13 ms
[2023-03-19 13:05:51] [INFO ] Flatten gal took : 15 ms
[2023-03-19 13:05:51] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 8 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 156/228 places, 282/354 transitions.
[2023-03-19 13:05:51] [INFO ] Flatten gal took : 10 ms
[2023-03-19 13:05:51] [INFO ] Flatten gal took : 11 ms
[2023-03-19 13:05:51] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Drop transitions removed 96 transitions
Trivial Post-agglo rules discarded 96 transitions
Performed 96 trivial Post agglomeration. Transition count delta: 96
Iterating post reduction 0 with 96 rules applied. Total rules applied 96 place count 228 transition count 258
Reduce places removed 96 places and 0 transitions.
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 1 with 120 rules applied. Total rules applied 216 place count 132 transition count 234
Performed 24 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 24 Pre rules applied. Total rules applied 216 place count 132 transition count 210
Deduced a syphon composed of 24 places in 0 ms
Reduce places removed 24 places and 0 transitions.
Iterating global reduction 2 with 48 rules applied. Total rules applied 264 place count 108 transition count 210
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 267 place count 105 transition count 138
Iterating global reduction 2 with 3 rules applied. Total rules applied 270 place count 105 transition count 138
Discarding 18 places :
Symmetric choice reduction at 2 with 18 rule applications. Total rules 288 place count 87 transition count 120
Iterating global reduction 2 with 18 rules applied. Total rules applied 306 place count 87 transition count 120
Discarding 18 places :
Symmetric choice reduction at 2 with 18 rule applications. Total rules 324 place count 69 transition count 84
Iterating global reduction 2 with 18 rules applied. Total rules applied 342 place count 69 transition count 84
Discarding 18 places :
Symmetric choice reduction at 2 with 18 rule applications. Total rules 360 place count 51 transition count 66
Iterating global reduction 2 with 18 rules applied. Total rules applied 378 place count 51 transition count 66
Ensure Unique test removed 18 transitions
Reduce isomorphic transitions removed 18 transitions.
Iterating post reduction 2 with 18 rules applied. Total rules applied 396 place count 51 transition count 48
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 6 Pre rules applied. Total rules applied 396 place count 51 transition count 42
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 3 with 12 rules applied. Total rules applied 408 place count 45 transition count 42
Applied a total of 408 rules in 20 ms. Remains 45 /228 variables (removed 183) and now considering 42/354 (removed 312) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 45/228 places, 42/354 transitions.
[2023-03-19 13:05:51] [INFO ] Flatten gal took : 2 ms
[2023-03-19 13:05:51] [INFO ] Flatten gal took : 2 ms
[2023-03-19 13:05:51] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 4 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 156/228 places, 282/354 transitions.
[2023-03-19 13:05:51] [INFO ] Flatten gal took : 10 ms
[2023-03-19 13:05:51] [INFO ] Flatten gal took : 11 ms
[2023-03-19 13:05:51] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 5 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 156/228 places, 282/354 transitions.
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 10 ms
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 14 ms
[2023-03-19 13:05:52] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 1 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 228/228 places, 354/354 transitions.
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 10 ms
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 10 ms
[2023-03-19 13:05:52] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 7 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 228/228 places, 354/354 transitions.
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 17 ms
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 14 ms
[2023-03-19 13:05:52] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 7 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 228/228 places, 354/354 transitions.
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 10 ms
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 10 ms
[2023-03-19 13:05:52] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 0 with 12 rules applied. Total rules applied 156 place count 150 transition count 276
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 0 with 13 rules applied. Total rules applied 169 place count 143 transition count 270
Performed 24 Post agglomeration using F-continuation condition.Transition count delta: 24
Deduced a syphon composed of 24 places in 0 ms
Reduce places removed 24 places and 0 transitions.
Iterating global reduction 0 with 48 rules applied. Total rules applied 217 place count 119 transition count 246
Drop transitions removed 24 transitions
Redundant transition composition rules discarded 24 transitions
Iterating global reduction 0 with 24 rules applied. Total rules applied 241 place count 119 transition count 222
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 244 place count 116 transition count 150
Ensure Unique test removed 1 places
Iterating global reduction 0 with 4 rules applied. Total rules applied 248 place count 115 transition count 150
Discarding 18 places :
Symmetric choice reduction at 0 with 18 rule applications. Total rules 266 place count 97 transition count 114
Iterating global reduction 0 with 18 rules applied. Total rules applied 284 place count 97 transition count 114
Applied a total of 284 rules in 57 ms. Remains 97 /228 variables (removed 131) and now considering 114/354 (removed 240) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 57 ms. Remains : 97/228 places, 114/354 transitions.
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 3 ms
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 3 ms
[2023-03-19 13:05:52] [INFO ] Input system was already deterministic with 114 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 2 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 228/228 places, 354/354 transitions.
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 10 ms
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 12 ms
[2023-03-19 13:05:52] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 1 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 228/228 places, 354/354 transitions.
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 11 ms
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 11 ms
[2023-03-19 13:05:52] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 13 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 156/228 places, 282/354 transitions.
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 9 ms
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 21 ms
[2023-03-19 13:05:52] [INFO ] Input system was already deterministic with 282 transitions.
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 38 ms
[2023-03-19 13:05:52] [INFO ] Flatten gal took : 35 ms
[2023-03-19 13:05:53] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 30 ms.
[2023-03-19 13:05:53] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 228 places, 354 transitions and 1062 arcs took 2 ms.
Total runtime 4830 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT UtilityControlRoom-COL-Z4T4N06
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability

FORMULA UtilityControlRoom-COL-Z4T4N06-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z4T4N06-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z4T4N06-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z4T4N06-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z4T4N06-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z4T4N06-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z4T4N06-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z4T4N06-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z4T4N06-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z4T4N06-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679231415325

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 11 (type EXCL) for 10 UtilityControlRoom-COL-Z4T4N06-CTLFireability-02
lola: time limit : 143 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z4T4N06-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-05: EG 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-15: AGEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 4/224 5/32 UtilityControlRoom-COL-Z4T4N06-CTLFireability-02 744916 m, 148983 m/sec, 1462448 t fired, .

Time elapsed: 10 secs. Pages in use: 5
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UtilityControlRoom-COL-Z4T4N06-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-05: EG 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-15: AGEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 9/224 9/32 UtilityControlRoom-COL-Z4T4N06-CTLFireability-02 1445121 m, 140041 m/sec, 2839437 t fired, .

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UtilityControlRoom-COL-Z4T4N06-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-05: EG 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-15: AGEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 15/224 13/32 UtilityControlRoom-COL-Z4T4N06-CTLFireability-02 2100638 m, 131103 m/sec, 4139528 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z4T4N06-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-05: EG 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z4T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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FINAL RESULTS
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UtilityControlRoom-COL-Z4T4N06-CTLFireability-00: DISJ unknown DISJ
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UtilityControlRoom-COL-Z4T4N06-CTLFireability-02: CTL unknown AGGR
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UtilityControlRoom-COL-Z4T4N06-CTLFireability-05: EG true state space / EG
UtilityControlRoom-COL-Z4T4N06-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-COL-Z4T4N06-CTLFireability-07: CTL true CTL model checker
UtilityControlRoom-COL-Z4T4N06-CTLFireability-08: CTL false CTL model checker
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UtilityControlRoom-COL-Z4T4N06-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z4T4N06-CTLFireability-12: CTL unknown AGGR
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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-COL-Z4T4N06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is UtilityControlRoom-COL-Z4T4N06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912703901066"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-COL-Z4T4N06.tgz
mv UtilityControlRoom-COL-Z4T4N06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;