fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r487-tall-167912703700929
Last Updated
May 14, 2023

About the Execution of LoLa+red for TwoPhaseLocking-PT-nC10000vD

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
4010.027 149173.00 140222.00 565.20 ?F???TT??FFF?TTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r487-tall-167912703700929.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is TwoPhaseLocking-PT-nC10000vD, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912703700929
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 476K
-rw-r--r-- 1 mcc users 6.8K Feb 25 17:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 66K Feb 25 17:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.2K Feb 25 17:44 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 17:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 17:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 17:24 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:24 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Feb 25 17:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 160K Feb 25 17:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.9K Feb 25 17:46 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Feb 25 17:46 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 17:24 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:24 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 4.6K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-00
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-01
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-02
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-03
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-04
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-05
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-06
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-07
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-10
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1679225619101

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=TwoPhaseLocking-PT-nC10000vD
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 11:33:40] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 11:33:40] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 11:33:40] [INFO ] Load time of PNML (sax parser for PT used): 16 ms
[2023-03-19 11:33:40] [INFO ] Transformed 8 places.
[2023-03-19 11:33:40] [INFO ] Transformed 6 transitions.
[2023-03-19 11:33:40] [INFO ] Parsed PT model containing 8 places and 6 transitions and 18 arcs in 68 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 11 ms.
Support contains 8 out of 8 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 7 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
// Phase 1: matrix 6 rows 8 cols
[2023-03-19 11:33:40] [INFO ] Computed 3 place invariants in 5 ms
[2023-03-19 11:33:40] [INFO ] Implicit Places using invariants in 123 ms returned []
[2023-03-19 11:33:40] [INFO ] Invariant cache hit.
[2023-03-19 11:33:40] [INFO ] Implicit Places using invariants and state equation in 34 ms returned []
Implicit Place search using SMT with State Equation took 181 ms to find 0 implicit places.
[2023-03-19 11:33:40] [INFO ] Invariant cache hit.
[2023-03-19 11:33:40] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 225 ms. Remains : 8/8 places, 6/6 transitions.
Support contains 8 out of 8 places after structural reductions.
[2023-03-19 11:33:41] [INFO ] Flatten gal took : 18 ms
[2023-03-19 11:33:41] [INFO ] Flatten gal took : 4 ms
[2023-03-19 11:33:41] [INFO ] Input system was already deterministic with 6 transitions.
Incomplete random walk after 10003 steps, including 1 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 68) seen :7
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=18 ) properties (out of 61) seen :6
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=29 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=37 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=35 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 55) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 54) seen :0
Running SMT prover for 54 properties.
[2023-03-19 11:33:41] [INFO ] Invariant cache hit.
[2023-03-19 11:33:42] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 11:33:42] [INFO ] After 31ms SMT Verify possible using state equation in real domain returned unsat :24 sat :6 real:24
[2023-03-19 11:33:42] [INFO ] After 46ms SMT Verify possible using trap constraints in real domain returned unsat :24 sat :4 real:26
Attempting to minimize the solution found.
Minimization took 10 ms.
[2023-03-19 11:33:42] [INFO ] After 169ms SMT Verify possible using all constraints in real domain returned unsat :24 sat :3 real:27
[2023-03-19 11:33:42] [INFO ] [Nat]Absence check using 3 positive place invariants in 0 ms returned sat
[2023-03-19 11:33:42] [INFO ] After 30ms SMT Verify possible using state equation in natural domain returned unsat :28 sat :26
[2023-03-19 11:33:42] [INFO ] After 75ms SMT Verify possible using trap constraints in natural domain returned unsat :28 sat :26
Attempting to minimize the solution found.
Minimization took 34 ms.
[2023-03-19 11:33:42] [INFO ] After 173ms SMT Verify possible using all constraints in natural domain returned unsat :28 sat :26
Fused 54 Parikh solutions to 26 different solutions.
Finished Parikh walk after 15466 steps, including 0 resets, run visited all 1 properties in 10 ms. (steps per millisecond=1546 )
Parikh walk visited 26 properties in 4748 ms.
Successfully simplified 28 atomic propositions for a total of 16 simplifications.
FORMULA TwoPhaseLocking-PT-nC10000vD-CTLCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 11:33:47] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 2 ms
FORMULA TwoPhaseLocking-PT-nC10000vD-CTLCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA TwoPhaseLocking-PT-nC10000vD-CTLCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 2 ms
[2023-03-19 11:33:47] [INFO ] Input system was already deterministic with 6 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 5
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 7 transition count 5
Applied a total of 2 rules in 3 ms. Remains 7 /8 variables (removed 1) and now considering 5/6 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 7/8 places, 5/6 transitions.
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:33:47] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 5
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 7 transition count 5
Applied a total of 2 rules in 2 ms. Remains 7 /8 variables (removed 1) and now considering 5/6 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 7/8 places, 5/6 transitions.
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:33:47] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Input system was already deterministic with 6 transitions.
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:33:47] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 1 ms.
[2023-03-19 11:33:47] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 8 places, 6 transitions and 18 arcs took 0 ms.
Total runtime 6663 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT TwoPhaseLocking-PT-nC10000vD
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373

FORMULA TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC10000vD-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679225768274

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:287
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:196
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 1 (type EXCL) for 0 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-00
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-00: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-02: EU 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/257 8/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-00 1814607 m, 362921 m/sec, 7240141 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/257 14/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-00 3365959 m, 310270 m/sec, 13742024 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/257 20/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-00 4881388 m, 303085 m/sec, 20135901 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/257 26/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-00 6355676 m, 294857 m/sec, 26373232 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 25/257 32/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-00 7802782 m, 289421 m/sec, 32524227 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF 0 1 0 0 1 0 0 0

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lola: FINISHED task # 41 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15
lola: result : true
lola: markings : 20000
lola: fired transitions : 19999
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lola: result : true
lola: markings : 13165
lola: fired transitions : 39492
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0

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lola: result : false
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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 5/509 5/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08 1165513 m, 233102 m/sec, 7644636 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0

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23 CTL EXCL 10/509 9/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08 2031371 m, 173171 m/sec, 14772276 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0

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23 CTL EXCL 15/509 12/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08 2843865 m, 162498 m/sec, 21623710 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0

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23 CTL EXCL 20/509 15/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08 3651451 m, 161517 m/sec, 28507104 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-00: CTL 0 0 0 0 1 0 1 0
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23 CTL EXCL 25/509 18/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08 4414076 m, 152525 m/sec, 35097108 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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23 CTL EXCL 30/509 21/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08 5169218 m, 151028 m/sec, 41688720 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08: CTL 0 0 1 0 1 0 0 0
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23 CTL EXCL 35/509 24/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08 5928274 m, 151811 m/sec, 48302120 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0

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23 CTL EXCL 40/509 27/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08 6666184 m, 147582 m/sec, 54779708 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0

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23 CTL EXCL 45/509 30/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08 7409210 m, 148605 m/sec, 61269256 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-06: DISJ true state space /EXEF
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0

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10 CTL EXCL 5/878 14/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-04 3309186 m, 661837 m/sec, 9602722 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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10 CTL EXCL 10/878 25/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-04 5935206 m, 525204 m/sec, 17308899 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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4 EU EXCL 15/1166 32/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-02 9615525 m, 551440 m/sec, 27314109 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-06: DISJ true state space /EXEF
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-06: DISJ true state space /EXEF
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/1739 27/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-03 6509494 m, 1301898 m/sec, 9296106 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08: CTL 0 0 0 0 1 0 1 0
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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-03: CTL 0 0 0 0 1 0 1 0
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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-07: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0

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20 CTL EXCL 5/3469 31/32 TwoPhaseLocking-PT-nC10000vD-CTLCardinality-07 7357381 m, 1471476 m/sec, 7362800 t fired, .

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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TwoPhaseLocking-PT-nC10000vD-CTLCardinality-07: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-00: CTL unknown AGGR
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-02: EU unknown AGGR
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-03: CTL unknown AGGR
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-04: CTL unknown AGGR
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-06: DISJ true state space /EXEF
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-07: CTL unknown AGGR
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-08: CTL unknown AGGR
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-12: CTL unknown AGGR
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-13: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-14: LTL/CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLCardinality-15: EXEF true state space /EXEF


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TwoPhaseLocking-PT-nC10000vD"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is TwoPhaseLocking-PT-nC10000vD, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912703700929"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/TwoPhaseLocking-PT-nC10000vD.tgz
mv TwoPhaseLocking-PT-nC10000vD execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;