About the Execution of LoLa+red for TwoPhaseLocking-PT-nC05000vN
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 4202.728 | 133130.00 | 123198.00 | 507.60 | ?F?FF?T?TTFF?F?T | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r487-tall-167912703700921.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is TwoPhaseLocking-PT-nC05000vN, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912703700921
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 464K
-rw-r--r-- 1 mcc users 8.1K Feb 25 17:53 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K Feb 25 17:53 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 17:52 CTLFireability.txt
-rw-r--r-- 1 mcc users 42K Feb 25 17:52 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 17:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 17:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 17:24 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:24 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 17:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 109K Feb 25 17:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 17:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 93K Feb 25 17:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 17:24 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:24 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 4.6K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-03
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-08
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14
FORMULA_NAME TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15
=== Now, execution of the tool begins
BK_START 1679225399811
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=TwoPhaseLocking-PT-nC05000vN
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 11:30:01] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 11:30:01] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 11:30:01] [INFO ] Load time of PNML (sax parser for PT used): 16 ms
[2023-03-19 11:30:01] [INFO ] Transformed 8 places.
[2023-03-19 11:30:01] [INFO ] Transformed 6 transitions.
[2023-03-19 11:30:01] [INFO ] Parsed PT model containing 8 places and 6 transitions and 18 arcs in 69 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 12 ms.
Support contains 8 out of 8 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 7 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
// Phase 1: matrix 6 rows 8 cols
[2023-03-19 11:30:01] [INFO ] Computed 3 place invariants in 5 ms
[2023-03-19 11:30:01] [INFO ] Implicit Places using invariants in 126 ms returned []
[2023-03-19 11:30:01] [INFO ] Invariant cache hit.
[2023-03-19 11:30:01] [INFO ] Implicit Places using invariants and state equation in 38 ms returned []
Implicit Place search using SMT with State Equation took 187 ms to find 0 implicit places.
[2023-03-19 11:30:01] [INFO ] Invariant cache hit.
[2023-03-19 11:30:01] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 225 ms. Remains : 8/8 places, 6/6 transitions.
Support contains 8 out of 8 places after structural reductions.
[2023-03-19 11:30:01] [INFO ] Flatten gal took : 11 ms
[2023-03-19 11:30:01] [INFO ] Flatten gal took : 3 ms
[2023-03-19 11:30:01] [INFO ] Input system was already deterministic with 6 transitions.
Incomplete random walk after 10006 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 92) seen :28
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=23 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=31 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 64) seen :2
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 46 ms. (steps per millisecond=21 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 62) seen :2
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=37 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=34 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 60) seen :0
Running SMT prover for 60 properties.
[2023-03-19 11:30:02] [INFO ] Invariant cache hit.
[2023-03-19 11:30:02] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 11:30:02] [INFO ] After 34ms SMT Verify possible using state equation in real domain returned unsat :28 sat :6 real:26
[2023-03-19 11:30:02] [INFO ] After 46ms SMT Verify possible using trap constraints in real domain returned unsat :28 sat :1 real:31
Attempting to minimize the solution found.
Minimization took 4 ms.
[2023-03-19 11:30:02] [INFO ] After 186ms SMT Verify possible using all constraints in real domain returned unsat :28 sat :0 real:32
[2023-03-19 11:30:02] [INFO ] [Nat]Absence check using 3 positive place invariants in 0 ms returned sat
[2023-03-19 11:30:02] [INFO ] After 48ms SMT Verify possible using state equation in natural domain returned unsat :28 sat :32
[2023-03-19 11:30:02] [INFO ] After 105ms SMT Verify possible using trap constraints in natural domain returned unsat :28 sat :32
Attempting to minimize the solution found.
Minimization took 33 ms.
[2023-03-19 11:30:02] [INFO ] After 198ms SMT Verify possible using all constraints in natural domain returned unsat :28 sat :32
Fused 60 Parikh solutions to 32 different solutions.
Finished Parikh walk after 7621 steps, including 0 resets, run visited all 1 properties in 5 ms. (steps per millisecond=1524 )
Parikh walk visited 32 properties in 3754 ms.
Successfully simplified 28 atomic propositions for a total of 16 simplifications.
[2023-03-19 11:30:06] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 3 ms
FORMULA TwoPhaseLocking-PT-nC05000vN-CTLCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA TwoPhaseLocking-PT-nC05000vN-CTLCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 2 ms
[2023-03-19 11:30:06] [INFO ] Input system was already deterministic with 6 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 3 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8 transition count 4
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 4 place count 6 transition count 4
Applied a total of 4 rules in 3 ms. Remains 6 /8 variables (removed 2) and now considering 4/6 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 6/8 places, 4/6 transitions.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Input system was already deterministic with 4 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 5
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 7 transition count 5
Applied a total of 2 rules in 2 ms. Remains 7 /8 variables (removed 1) and now considering 5/6 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 7/8 places, 5/6 transitions.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:30:06] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:30:06] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:30:06] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:30:06] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Input system was already deterministic with 6 transitions.
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:30:06] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 1 ms.
[2023-03-19 11:30:06] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 8 places, 6 transitions and 18 arcs took 0 ms.
Total runtime 5526 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT TwoPhaseLocking-PT-nC05000vN
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/371
FORMULA TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679225532941
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/371/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/371/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/371/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 17 (type EXCL) for 16 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:714
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01: AGAF 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 5/211 9/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05 2210649 m, 442129 m/sec, 8978931 t fired, .
Time elapsed: 5 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01: AGAF 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 10/211 17/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05 4041928 m, 366255 m/sec, 16674639 t fired, .
Time elapsed: 10 secs. Pages in use: 17
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01: AGAF 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 15/211 24/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05 5779418 m, 347498 m/sec, 24021272 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01: AGAF 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 20/211 31/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05 7471781 m, 338472 m/sec, 31193457 t fired, .
Time elapsed: 20 secs. Pages in use: 31
# running tasks: 1 of 4 Visible: 14
lola: CANCELED task # 17 (type EXCL) for TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01: AGAF 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 25 secs. Pages in use: 32
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lola: LAUNCH task # 52 (type EXCL) for 51 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15
lola: time limit : 223 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15
lola: result : true
lola: markings : 10002
lola: fired transitions : 10004
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 48 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14
lola: time limit : 238 sec
lola: memory limit: 32 pages
lola: CANCELED task # 49 (type EXCL) for TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01: AGAF 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 46 (type EXCL) for 45 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13
lola: time limit : 255 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13
lola: result : false
lola: markings : 3539874
lola: fired transitions : 3543127
lola: time used : 2.000000
lola: memory pages used : 16
lola: LAUNCH task # 43 (type EXCL) for 42 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12
lola: time limit : 274 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01: AGAF 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
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43 CTL EXCL 3/274 5/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12 1060499 m, 212099 m/sec, 4942275 t fired, .
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 2 0 0 2 0 0 0
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 3 0 0 3 0 0 0
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
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43 CTL EXCL 8/274 12/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12 2728221 m, 333544 m/sec, 12724766 t fired, .
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
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43 CTL EXCL 13/274 18/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12 4336083 m, 321572 m/sec, 20228068 t fired, .
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43 CTL EXCL 18/274 25/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12 5910295 m, 314842 m/sec, 27574422 t fired, .
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
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43 CTL EXCL 23/274 31/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12 7456248 m, 309190 m/sec, 34788995 t fired, .
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 2 0 0 2 0 0 0
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
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lola: FINISHED task # 34 (type EXCL) for TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09
lola: result : true
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lola: fired transitions : 96838
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lola: result : false
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lola: result : false
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF true state space /EXEF
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL true CTL model checker
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 1 0 0 5 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
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11 CTL EXCL 5/505 16/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02 3707658 m, 741531 m/sec, 10216756 t fired, .
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL true CTL model checker
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 1 0 0 5 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL 0 1 0 0 1 0 0 0
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11 CTL EXCL 10/505 30/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02 7120056 m, 682479 m/sec, 19644390 t fired, .
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL false CTL model checker
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 1 0 0 5 0 0 0
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL 0 1 0 0 1 0 0 0
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF true state space /EXEF
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL true CTL model checker
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL 0 1 0 0 1 0 0 0
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9 CTL EXCL 5/587 13/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02 2891579 m, 578315 m/sec, 8389849 t fired, .
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL false CTL model checker
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL 0 1 0 0 1 0 0 0
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9 CTL EXCL 10/587 24/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02 5634430 m, 548570 m/sec, 16134947 t fired, .
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL false CTL model checker
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 1 0 0 5 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
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lola: FINISHED task # 55 (type EXCL) for TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01
lola: result : true
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lola: fired transitions : 12502
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lola: FINISHED task # 54 (type EXCL) for TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11
lola: result : false
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01: AGAF false state space /EFEG
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF true state space /EXEF
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL false LTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL true CTL model checker
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 0 0 0 2 0 2 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 0 1 0 5 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 5/1170 13/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07 3056496 m, 611299 m/sec, 6572358 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01: AGAF false state space /EFEG
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF true state space /EXEF
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL false LTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL true CTL model checker
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 0 0 0 2 0 2 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 0 1 0 5 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 10/1170 22/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07 5332526 m, 455206 m/sec, 11550417 t fired, .
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01: AGAF false state space /EFEG
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF true state space /EXEF
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL false LTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 0 0 0 2 0 2 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 0 1 0 5 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 15/1170 32/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07 7770557 m, 487606 m/sec, 16805813 t fired, .
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lola: CANCELED task # 25 (type EXCL) for TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01: AGAF false state space /EFEG
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF true state space /EXEF
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL false LTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 0 0 0 2 0 2 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 0 0 0 5 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 37 (type EXCL) for 36 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10
lola: time limit : 1745 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10
lola: result : false
lola: markings : 1382
lola: fired transitions : 1737
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00
lola: time limit : 3490 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01: AGAF false state space /EFEG
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF true state space /EXEF
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL false LTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 0 0 0 2 0 2 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 0 0 0 5 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/3490 14/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00 3353833 m, 670766 m/sec, 9480434 t fired, .
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TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01: AGAF false state space /EFEG
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF true state space /EXEF
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL false LTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 0 0 0 2 0 2 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 0 0 0 5 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/3490 26/32 TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00 6449475 m, 619128 m/sec, 18260164 t fired, .
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lola: CANCELED task # 1 (type EXCL) for TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01: AGAF false state space /EFEG
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF true state space /EXEF
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL false LTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ 0 0 0 0 2 0 2 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ 0 0 0 0 5 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-00: CTL unknown AGGR
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-01: AGAF false state space /EFEG
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-02: CONJ unknown CONJ
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-04: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-05: CTL unknown AGGR
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-06: EXEF true state space /EXEF
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-07: DISJ unknown DISJ
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-10: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-11: SP ACTL false LTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-12: CTL unknown AGGR
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-14: CTL unknown AGGR
TwoPhaseLocking-PT-nC05000vN-CTLCardinality-15: CTL true CTL model checker
Time elapsed: 125 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TwoPhaseLocking-PT-nC05000vN"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is TwoPhaseLocking-PT-nC05000vN, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912703700921"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/TwoPhaseLocking-PT-nC05000vN.tgz
mv TwoPhaseLocking-PT-nC05000vN execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;