About the Execution of LoLa+red for TCPcondis-PT-10
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
3816.579 | 175744.00 | 175451.00 | 924.60 | TFTFF???F?TTFTTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r487-tall-167912703200506.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is TCPcondis-PT-10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912703200506
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 6.9K Feb 26 16:06 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Feb 26 16:06 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 26 16:05 CTLFireability.txt
-rw-r--r-- 1 mcc users 42K Feb 26 16:05 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:19 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 17:19 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 17:19 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 17:19 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 16:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 121K Feb 26 16:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.9K Feb 26 16:07 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 89K Feb 26 16:07 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:19 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:19 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rwxr-xr-x 1 mcc users 24K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME TCPcondis-PT-10-CTLFireability-00
FORMULA_NAME TCPcondis-PT-10-CTLFireability-01
FORMULA_NAME TCPcondis-PT-10-CTLFireability-02
FORMULA_NAME TCPcondis-PT-10-CTLFireability-03
FORMULA_NAME TCPcondis-PT-10-CTLFireability-04
FORMULA_NAME TCPcondis-PT-10-CTLFireability-05
FORMULA_NAME TCPcondis-PT-10-CTLFireability-06
FORMULA_NAME TCPcondis-PT-10-CTLFireability-07
FORMULA_NAME TCPcondis-PT-10-CTLFireability-08
FORMULA_NAME TCPcondis-PT-10-CTLFireability-09
FORMULA_NAME TCPcondis-PT-10-CTLFireability-10
FORMULA_NAME TCPcondis-PT-10-CTLFireability-11
FORMULA_NAME TCPcondis-PT-10-CTLFireability-12
FORMULA_NAME TCPcondis-PT-10-CTLFireability-13
FORMULA_NAME TCPcondis-PT-10-CTLFireability-14
FORMULA_NAME TCPcondis-PT-10-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679201733670
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=TCPcondis-PT-10
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 04:55:36] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 04:55:36] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 04:55:36] [WARNING] Skipping unknown tool specific annotation : Tina
[2023-03-19 04:55:36] [WARNING] Unknown XML tag in source file: size
[2023-03-19 04:55:36] [WARNING] Unknown XML tag in source file: color
[2023-03-19 04:55:36] [INFO ] Load time of PNML (sax parser for PT used): 42 ms
[2023-03-19 04:55:36] [INFO ] Transformed 30 places.
[2023-03-19 04:55:36] [INFO ] Transformed 32 transitions.
[2023-03-19 04:55:36] [INFO ] Parsed PT model containing 30 places and 32 transitions and 108 arcs in 167 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 15 ms.
Support contains 30 out of 30 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 9 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
// Phase 1: matrix 32 rows 30 cols
[2023-03-19 04:55:36] [INFO ] Computed 9 place invariants in 4 ms
[2023-03-19 04:55:36] [INFO ] Implicit Places using invariants in 147 ms returned []
[2023-03-19 04:55:36] [INFO ] Invariant cache hit.
[2023-03-19 04:55:36] [INFO ] Implicit Places using invariants and state equation in 53 ms returned []
Implicit Place search using SMT with State Equation took 243 ms to find 0 implicit places.
[2023-03-19 04:55:36] [INFO ] Invariant cache hit.
[2023-03-19 04:55:36] [INFO ] Dead Transitions using invariants and state equation in 63 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 324 ms. Remains : 30/30 places, 32/32 transitions.
Support contains 30 out of 30 places after structural reductions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 26 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 19 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 32 transitions.
Incomplete random walk after 10002 steps, including 2 resets, run finished after 209 ms. (steps per millisecond=47 ) properties (out of 43) seen :41
Finished Best-First random walk after 1334 steps, including 0 resets, run visited all 2 properties in 20 ms. (steps per millisecond=66 )
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 32 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 9 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 29 transition count 31
Applied a total of 2 rules in 6 ms. Remains 29 /30 variables (removed 1) and now considering 31/32 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 29/30 places, 31/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 28 transition count 30
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 27 transition count 29
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 27 transition count 29
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 7 place count 27 transition count 28
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 7 place count 27 transition count 27
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 9 place count 26 transition count 27
Applied a total of 9 rules in 26 ms. Remains 26 /30 variables (removed 4) and now considering 27/32 (removed 5) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 26 ms. Remains : 26/30 places, 27/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 27 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 9 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 6 place count 27 transition count 29
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 8 place count 25 transition count 27
Iterating global reduction 0 with 2 rules applied. Total rules applied 10 place count 25 transition count 27
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 0 with 2 rules applied. Total rules applied 12 place count 25 transition count 25
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 2 Pre rules applied. Total rules applied 12 place count 25 transition count 23
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 16 place count 23 transition count 23
Applied a total of 16 rules in 4 ms. Remains 23 /30 variables (removed 7) and now considering 23/32 (removed 9) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 23/30 places, 23/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 1 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 23 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 7 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 6 place count 27 transition count 29
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 7 place count 26 transition count 28
Iterating global reduction 0 with 1 rules applied. Total rules applied 8 place count 26 transition count 28
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 0 with 2 rules applied. Total rules applied 10 place count 26 transition count 26
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 2 Pre rules applied. Total rules applied 10 place count 26 transition count 24
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 14 place count 24 transition count 24
Applied a total of 14 rules in 4 ms. Remains 24 /30 variables (removed 6) and now considering 24/32 (removed 8) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 24/30 places, 24/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 10 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 1 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 24 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Input system was already deterministic with 32 transitions.
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:55:37] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:55:37] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-19 04:55:37] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 30 places, 32 transitions and 108 arcs took 0 ms.
Total runtime 1725 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT TCPcondis-PT-10
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability
FORMULA TCPcondis-PT-10-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TCPcondis-PT-10-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TCPcondis-PT-10-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TCPcondis-PT-10-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TCPcondis-PT-10-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TCPcondis-PT-10-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TCPcondis-PT-10-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TCPcondis-PT-10-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TCPcondis-PT-10-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TCPcondis-PT-10-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TCPcondis-PT-10-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TCPcondis-PT-10-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679201909414
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 64 (type EXCL) for 61 TCPcondis-PT-10-CTLFireability-15
lola: time limit : 112 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 64 (type EXCL) for TCPcondis-PT-10-CTLFireability-15
lola: result : false
lola: markings : 81
lola: fired transitions : 83
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 TCPcondis-PT-10-CTLFireability-10
lola: time limit : 124 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 47 (type EXCL) for TCPcondis-PT-10-CTLFireability-10
lola: result : true
lola: markings : 587
lola: fired transitions : 1058
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 68 (type EXCL) for 52 TCPcondis-PT-10-CTLFireability-12
lola: time limit : 133 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 68 (type EXCL) for TCPcondis-PT-10-CTLFireability-12
lola: result : true
lola: markings : 284
lola: fired transitions : 604
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 40 TCPcondis-PT-10-CTLFireability-08
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 41 (type EXCL) for TCPcondis-PT-10-CTLFireability-08
lola: result : false
lola: markings : 891858
lola: fired transitions : 3318447
lola: time used : 3.000000
lola: memory pages used : 4
lola: LAUNCH task # 56 (type EXCL) for 55 TCPcondis-PT-10-CTLFireability-13
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: FINISHED task # 56 (type EXCL) for TCPcondis-PT-10-CTLFireability-13
lola: result : true
lola: markings : 848
lola: fired transitions : 1437
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 TCPcondis-PT-10-CTLFireability-09
lola: time limit : 239 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TCPcondis-PT-10-CTLFireability-08: CTL false CTL model checker
TCPcondis-PT-10-CTLFireability-10: CTL true CTL model checker
TCPcondis-PT-10-CTLFireability-12: AXAF false state space /EXEG
TCPcondis-PT-10-CTLFireability-13: CTL true CTL model checker
TCPcondis-PT-10-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TCPcondis-PT-10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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TCPcondis-PT-10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
TCPcondis-PT-10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TCPcondis-PT-10-CTLFireability-04: DISJ 0 3 0 0 3 0 0 0
TCPcondis-PT-10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
TCPcondis-PT-10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
TCPcondis-PT-10-CTLFireability-07: CONJ 0 3 0 0 3 0 0 0
TCPcondis-PT-10-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
TCPcondis-PT-10-CTLFireability-11: EGEF 0 1 0 0 1 0 0 0
TCPcondis-PT-10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 2/239 3/32 TCPcondis-PT-10-CTLFireability-09 678694 m, 135738 m/sec, 2058790 t fired, .
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TCPcondis-PT-10-CTLFireability-08: CTL false CTL model checker
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TCPcondis-PT-10-CTLFireability-12: AXAF false state space /EXEG
TCPcondis-PT-10-CTLFireability-13: CTL true CTL model checker
TCPcondis-PT-10-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TCPcondis-PT-10-CTLFireability-12: AXAF false state space /EXEG
TCPcondis-PT-10-CTLFireability-13: CTL true CTL model checker
TCPcondis-PT-10-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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44 CTL EXCL 12/239 13/32 TCPcondis-PT-10-CTLFireability-09 2885218 m, 202162 m/sec, 10025122 t fired, .
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TCPcondis-PT-10-CTLFireability-13: CTL true CTL model checker
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TCPcondis-PT-10-CTLFireability-15: CONJ false CTL model checker
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TCPcondis-PT-10-CTLFireability-13: CTL true CTL model checker
TCPcondis-PT-10-CTLFireability-15: CONJ false CTL model checker
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44 CTL EXCL 27/239 24/32 TCPcondis-PT-10-CTLFireability-09 5548046 m, 169599 m/sec, 20444431 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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44 CTL EXCL 32/239 27/32 TCPcondis-PT-10-CTLFireability-09 6368722 m, 164135 m/sec, 23755744 t fired, .
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TCPcondis-PT-10-CTLFireability-01: CTL false CTL model checker
TCPcondis-PT-10-CTLFireability-02: CTL true CTL model checker
TCPcondis-PT-10-CTLFireability-03: CTL false CTL model checker
TCPcondis-PT-10-CTLFireability-04: DISJ false DISJ
TCPcondis-PT-10-CTLFireability-05: CTL unknown AGGR
TCPcondis-PT-10-CTLFireability-06: CTL unknown AGGR
TCPcondis-PT-10-CTLFireability-07: CONJ unknown CONJ
TCPcondis-PT-10-CTLFireability-08: CTL false CTL model checker
TCPcondis-PT-10-CTLFireability-09: CTL unknown AGGR
TCPcondis-PT-10-CTLFireability-10: CTL true CTL model checker
TCPcondis-PT-10-CTLFireability-11: EGEF true CTL model checker
TCPcondis-PT-10-CTLFireability-12: AXAF false state space /EXEG
TCPcondis-PT-10-CTLFireability-13: CTL true CTL model checker
TCPcondis-PT-10-CTLFireability-14: CTL true CTL model checker
TCPcondis-PT-10-CTLFireability-15: CONJ false CTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TCPcondis-PT-10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is TCPcondis-PT-10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912703200506"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/TCPcondis-PT-10.tgz
mv TCPcondis-PT-10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;