fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r486-tall-167912702301202
Last Updated
May 14, 2023

About the Execution of LoLA for UtilityControlRoom-PT-Z4T4N06

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2743.724 252126.00 245297.00 537.50 ?TTTTTFTFFFT?TT? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r486-tall-167912702301202.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is UtilityControlRoom-PT-Z4T4N06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r486-tall-167912702301202
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.0M
-rw-r--r-- 1 mcc users 21K Feb 26 14:24 CTLCardinality.txt
-rw-r--r-- 1 mcc users 112K Feb 26 14:24 CTLCardinality.xml
-rw-r--r-- 1 mcc users 64K Feb 26 14:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 255K Feb 26 14:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 20K Feb 25 17:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 69K Feb 25 17:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 34K Feb 25 17:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 92K Feb 25 17:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 51K Feb 26 14:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 245K Feb 26 14:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 158K Feb 26 14:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 585K Feb 26 14:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 5.3K Feb 25 17:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 12K Feb 25 17:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 191K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-00
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-01
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-02
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-03
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-04
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-05
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-06
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-07
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-08
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-09
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-10
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-11
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-12
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-13
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-14
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679285597914

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z4T4N06
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT UtilityControlRoom-PT-Z4T4N06
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA UtilityControlRoom-PT-Z4T4N06-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679285850040

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:182
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
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lola: LAUNCH task # 52 (type SKEL/SRCH) for 0 UtilityControlRoom-PT-Z4T4N06-CTLFireability-00
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lola: memory limit: 5 pages
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lola: result : false
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lola: memory pages used : 1
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-05: EG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-08: AGAF 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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5 EG EXCL 5/224 2/32 UtilityControlRoom-PT-Z4T4N06-CTLFireability-00 364358 m, 72871 m/sec, 2357410 t fired, .

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UtilityControlRoom-PT-Z4T4N06-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-05: EG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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5 EG EXCL 10/224 3/32 UtilityControlRoom-PT-Z4T4N06-CTLFireability-00 727379 m, 72604 m/sec, 4719622 t fired, .

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UtilityControlRoom-PT-Z4T4N06-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-05: EG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-08: AGAF 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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UtilityControlRoom-PT-Z4T4N06-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-05: EG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-08: AGAF 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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UtilityControlRoom-PT-Z4T4N06-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-05: EG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-08: AGAF 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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UtilityControlRoom-PT-Z4T4N06-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-05: EG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-08: AGAF 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-05: EG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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50 CTL EXCL 34/3417 19/32 UtilityControlRoom-PT-Z4T4N06-CTLFireability-15 4242448 m, 109417 m/sec, 23546249 t fired, .

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UtilityControlRoom-PT-Z4T4N06-CTLFireability-01: CTL true CTL model checker
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-05: EG true state space / EG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-07: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-08: AGAF false state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU false state space /EU
UtilityControlRoom-PT-Z4T4N06-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG true state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL true CTL model checker

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UtilityControlRoom-PT-Z4T4N06-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

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50 CTL EXCL 39/3417 21/32 UtilityControlRoom-PT-Z4T4N06-CTLFireability-15 4781775 m, 107865 m/sec, 26609220 t fired, .

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UtilityControlRoom-PT-Z4T4N06-CTLFireability-01: CTL true CTL model checker
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-05: EG true state space / EG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-07: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-08: AGAF false state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU false state space /EU
UtilityControlRoom-PT-Z4T4N06-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG true state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL true CTL model checker

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50 CTL EXCL 44/3417 23/32 UtilityControlRoom-PT-Z4T4N06-CTLFireability-15 5312824 m, 106209 m/sec, 29644465 t fired, .

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UtilityControlRoom-PT-Z4T4N06-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-05: EG true state space / EG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-07: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-08: AGAF false state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU false state space /EU
UtilityControlRoom-PT-Z4T4N06-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG true state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL true CTL model checker

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50 CTL EXCL 49/3417 26/32 UtilityControlRoom-PT-Z4T4N06-CTLFireability-15 5834237 m, 104282 m/sec, 32639794 t fired, .

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UtilityControlRoom-PT-Z4T4N06-CTLFireability-01: CTL true CTL model checker
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-05: EG true state space / EG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-07: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-08: AGAF false state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU false state space /EU
UtilityControlRoom-PT-Z4T4N06-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG true state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL true CTL model checker

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50 CTL EXCL 54/3417 28/32 UtilityControlRoom-PT-Z4T4N06-CTLFireability-15 6348691 m, 102890 m/sec, 35619205 t fired, .

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UtilityControlRoom-PT-Z4T4N06-CTLFireability-01: CTL true CTL model checker
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-05: EG true state space / EG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-07: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-08: AGAF false state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU false state space /EU
UtilityControlRoom-PT-Z4T4N06-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG true state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL true CTL model checker

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50 CTL EXCL 59/3417 30/32 UtilityControlRoom-PT-Z4T4N06-CTLFireability-15 6856961 m, 101654 m/sec, 38572614 t fired, .

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UtilityControlRoom-PT-Z4T4N06-CTLFireability-01: CTL true CTL model checker
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-05: EG true state space / EG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-07: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-08: AGAF false state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU false state space /EU
UtilityControlRoom-PT-Z4T4N06-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG true state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL true CTL model checker

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50 CTL EXCL 64/3417 32/32 UtilityControlRoom-PT-Z4T4N06-CTLFireability-15 7362199 m, 101047 m/sec, 41510212 t fired, .

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UtilityControlRoom-PT-Z4T4N06-CTLFireability-01: CTL true CTL model checker
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UtilityControlRoom-PT-Z4T4N06-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-05: EG true state space / EG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-07: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-08: AGAF false state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU false state space /EU
UtilityControlRoom-PT-Z4T4N06-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG true state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL true CTL model checker

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N06-CTLFireability-00: DISJ unknown DISJ
UtilityControlRoom-PT-Z4T4N06-CTLFireability-01: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-02: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-05: EG true state space / EG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-07: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-08: AGAF false state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-09: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-10: EU false state space /EU
UtilityControlRoom-PT-Z4T4N06-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-12: CTL unknown AGGR
UtilityControlRoom-PT-Z4T4N06-CTLFireability-13: EFEG true state space /EFEG
UtilityControlRoom-PT-Z4T4N06-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N06-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z4T4N06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is UtilityControlRoom-PT-Z4T4N06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r486-tall-167912702301202"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z4T4N06.tgz
mv UtilityControlRoom-PT-Z4T4N06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;