fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r486-tall-167912702201170
Last Updated
May 14, 2023

About the Execution of LoLA for UtilityControlRoom-PT-Z4T3N08

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
4704.176 303794.00 295511.00 1867.00 T??TTTFF?T??FFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r486-tall-167912702201170.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is UtilityControlRoom-PT-Z4T3N08, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r486-tall-167912702201170
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.5M
-rw-r--r-- 1 mcc users 43K Feb 26 14:32 CTLCardinality.txt
-rw-r--r-- 1 mcc users 206K Feb 26 14:32 CTLCardinality.xml
-rw-r--r-- 1 mcc users 86K Feb 26 14:29 CTLFireability.txt
-rw-r--r-- 1 mcc users 338K Feb 26 14:29 CTLFireability.xml
-rw-r--r-- 1 mcc users 23K Feb 25 17:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 77K Feb 25 17:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 49K Feb 25 17:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 146K Feb 25 17:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 45K Feb 26 14:40 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 251K Feb 26 14:40 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 195K Feb 26 14:39 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 740K Feb 26 14:39 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 7.9K Feb 25 17:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 255K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-00
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-01
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-02
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-03
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-04
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-05
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-06
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-07
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-08
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-09
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-10
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-11
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-12
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-13
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-14
FORMULA_NAME UtilityControlRoom-PT-Z4T3N08-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679283670892

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z4T3N08
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT UtilityControlRoom-PT-Z4T3N08
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA UtilityControlRoom-PT-Z4T3N08-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N08-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N08-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N08-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N08-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N08-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N08-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N08-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N08-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N08-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N08-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679283974686

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: Rule S: 0 transitions removed,0 places removed
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 49 (type SKEL/FNDP) for 0 UtilityControlRoom-PT-Z4T3N08-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type SKEL/EQUN) for 0 UtilityControlRoom-PT-Z4T3N08-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/SRCH) for 0 UtilityControlRoom-PT-Z4T3N08-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SKEL/SRCH) for 0 UtilityControlRoom-PT-Z4T3N08-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 51 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-00
lola: result : true
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-00 (obsolete)
lola: CANCELED task # 50 (type EQUN) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-00 (obsolete)
lola: CANCELED task # 52 (type SRCH) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-00 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 49 (type SKEL/FNDP) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-00
lola: result : true
lola: fired transitions : 4
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
sara: try reading problem file /home/mcc/execution/CTLFireability-50.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 50 (type SKEL/EQUN) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-00
lola: result : true
lola: LAUNCH task # 7 (type EXCL) for 6 UtilityControlRoom-PT-Z4T3N08-CTLFireability-02
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 53 (type FNDP) for 0 UtilityControlRoom-PT-Z4T3N08-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type EQUN) for 0 UtilityControlRoom-PT-Z4T3N08-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 56 (type SRCH) for 0 UtilityControlRoom-PT-Z4T3N08-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: FINISHED task # 53 (type FNDP) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-00
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 54 (type EQUN) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-00 (obsolete)
lola: CANCELED task # 56 (type SRCH) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-00 (obsolete)
lola: FINISHED task # 54 (type EQUN) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-00
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/239 5/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-02 678449 m, 135689 m/sec, 1349183 t fired, .

Time elapsed: 9 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/239 8/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-02 1330760 m, 130462 m/sec, 2724632 t fired, .

Time elapsed: 14 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/239 11/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-02 1895357 m, 112919 m/sec, 4007947 t fired, .

Time elapsed: 19 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 20/239 14/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-02 2429361 m, 106800 m/sec, 5248526 t fired, .

Time elapsed: 24 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 25/239 17/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-02 2947524 m, 103632 m/sec, 6469111 t fired, .

Time elapsed: 29 secs. Pages in use: 17
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 30/239 20/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-02 3465194 m, 103534 m/sec, 7709273 t fired, .

Time elapsed: 34 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 35/239 23/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-02 3980087 m, 102978 m/sec, 8927876 t fired, .

Time elapsed: 39 secs. Pages in use: 23
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 40/239 26/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-02 4467027 m, 97388 m/sec, 10117775 t fired, .

Time elapsed: 44 secs. Pages in use: 26
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 45/239 28/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-02 4944066 m, 95407 m/sec, 11285015 t fired, .

Time elapsed: 49 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 50/239 31/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-02 5415111 m, 94209 m/sec, 12437341 t fired, .

Time elapsed: 54 secs. Pages in use: 31
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 7 (type EXCL) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 59 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 43 (type EXCL) for 42 UtilityControlRoom-PT-Z4T3N08-CTLFireability-14
lola: time limit : 252 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-14
lola: result : false
lola: markings : 185248
lola: fired transitions : 296609
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 40 (type EXCL) for 39 UtilityControlRoom-PT-Z4T3N08-CTLFireability-13
lola: time limit : 272 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-13
lola: result : false
lola: markings : 40
lola: fired transitions : 80
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 UtilityControlRoom-PT-Z4T3N08-CTLFireability-12
lola: time limit : 295 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-12
lola: result : false
lola: markings : 16995
lola: fired transitions : 25702
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 UtilityControlRoom-PT-Z4T3N08-CTLFireability-11
lola: time limit : 321 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 4/321 4/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-11 544180 m, 108836 m/sec, 1291075 t fired, .

Time elapsed: 64 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 9/321 8/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-11 1110254 m, 113214 m/sec, 2764380 t fired, .

Time elapsed: 69 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 14/321 11/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-11 1631253 m, 104199 m/sec, 4119457 t fired, .

Time elapsed: 74 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 19/321 14/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-11 2145065 m, 102762 m/sec, 5452210 t fired, .

Time elapsed: 79 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 24/321 17/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-11 2631590 m, 97305 m/sec, 6776505 t fired, .

Time elapsed: 84 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 29/321 21/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-11 3118205 m, 97323 m/sec, 8147560 t fired, .

Time elapsed: 89 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 34/321 24/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-11 3596156 m, 95590 m/sec, 9493081 t fired, .

Time elapsed: 94 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 39/321 27/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-11 4065132 m, 93795 m/sec, 10823719 t fired, .

Time elapsed: 99 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 44/321 29/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-11 4528746 m, 92722 m/sec, 12120320 t fired, .

Time elapsed: 104 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 49/321 32/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-11 4979900 m, 90230 m/sec, 13403706 t fired, .

Time elapsed: 109 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 34 (type EXCL) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-11 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 114 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 25 (type EXCL) for 24 UtilityControlRoom-PT-Z4T3N08-CTLFireability-08
lola: time limit : 348 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 5/348 4/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-08 472650 m, 94530 m/sec, 1865113 t fired, .

Time elapsed: 119 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 10/348 6/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-08 920901 m, 89650 m/sec, 3566852 t fired, .

Time elapsed: 124 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 15/348 9/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-08 1345388 m, 84897 m/sec, 5186123 t fired, .

Time elapsed: 129 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 20/348 12/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-08 1762504 m, 83423 m/sec, 6776095 t fired, .

Time elapsed: 134 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 25/348 14/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-08 2179224 m, 83344 m/sec, 8365476 t fired, .

Time elapsed: 139 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 30/348 17/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-08 2590129 m, 82181 m/sec, 9940084 t fired, .

Time elapsed: 144 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 35/348 19/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-08 2999190 m, 81812 m/sec, 11506786 t fired, .

Time elapsed: 149 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 40/348 22/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-08 3402196 m, 80601 m/sec, 13047612 t fired, .

Time elapsed: 154 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 45/348 24/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-08 3802403 m, 80041 m/sec, 14587136 t fired, .

Time elapsed: 159 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 50/348 26/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-08 4199663 m, 79452 m/sec, 16109835 t fired, .

Time elapsed: 164 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 55/348 29/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-08 4592379 m, 78543 m/sec, 17621695 t fired, .

Time elapsed: 169 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 60/348 31/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-08 4983884 m, 78301 m/sec, 19123823 t fired, .

Time elapsed: 174 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 25 (type EXCL) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-08 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 179 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 22 (type EXCL) for 21 UtilityControlRoom-PT-Z4T3N08-CTLFireability-07
lola: time limit : 380 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-07
lola: result : false
lola: markings : 38
lola: fired transitions : 91
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 UtilityControlRoom-PT-Z4T3N08-CTLFireability-06
lola: time limit : 427 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-06
lola: result : false
lola: markings : 186294
lola: fired transitions : 508302
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 16 (type EXCL) for 15 UtilityControlRoom-PT-Z4T3N08-CTLFireability-05
lola: time limit : 488 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-05
lola: result : true
lola: markings : 67
lola: fired transitions : 67
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 UtilityControlRoom-PT-Z4T3N08-CTLFireability-04
lola: time limit : 570 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-04
lola: result : true
lola: markings : 9
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 UtilityControlRoom-PT-Z4T3N08-CTLFireability-09
lola: time limit : 684 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-09
lola: result : true
lola: markings : 56
lola: fired transitions : 134
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 UtilityControlRoom-PT-Z4T3N08-CTLFireability-10
lola: time limit : 855 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 4/855 4/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-10 674379 m, 134875 m/sec, 2412690 t fired, .

Time elapsed: 184 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 9/855 7/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-10 1399372 m, 144998 m/sec, 5195859 t fired, .

Time elapsed: 189 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 14/855 10/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-10 2077602 m, 135646 m/sec, 7851811 t fired, .

Time elapsed: 194 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 19/855 13/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-10 2720408 m, 128561 m/sec, 10417538 t fired, .

Time elapsed: 199 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 24/855 15/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-10 3340887 m, 124095 m/sec, 12918779 t fired, .

Time elapsed: 204 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 29/855 18/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-10 3944754 m, 120773 m/sec, 15368916 t fired, .

Time elapsed: 209 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 34/855 21/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-10 4532146 m, 117478 m/sec, 17770901 t fired, .

Time elapsed: 214 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 39/855 23/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-10 5107175 m, 115005 m/sec, 20133365 t fired, .

Time elapsed: 219 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 44/855 26/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-10 5671966 m, 112958 m/sec, 22471226 t fired, .

Time elapsed: 224 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 49/855 28/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-10 6225660 m, 110738 m/sec, 24778114 t fired, .

Time elapsed: 229 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 54/855 30/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-10 6795745 m, 114017 m/sec, 27164212 t fired, .

Time elapsed: 234 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 31 (type EXCL) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 239 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 10 (type EXCL) for 9 UtilityControlRoom-PT-Z4T3N08-CTLFireability-03
lola: time limit : 1120 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-03
lola: result : true
lola: markings : 8448
lola: fired transitions : 9218
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 UtilityControlRoom-PT-Z4T3N08-CTLFireability-15
lola: time limit : 1680 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 5/1680 5/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-15 929762 m, 185952 m/sec, 2970688 t fired, .

Time elapsed: 244 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 10/1680 8/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-15 1715030 m, 157053 m/sec, 5602593 t fired, .

Time elapsed: 249 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 15/1680 11/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-15 2434911 m, 143976 m/sec, 8070442 t fired, .

Time elapsed: 254 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 46 (type EXCL) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-15
lola: result : true
lola: markings : 2665084
lola: fired transitions : 8866126
lola: time used : 18.000000
lola: memory pages used : 12
lola: LAUNCH task # 4 (type EXCL) for 3 UtilityControlRoom-PT-Z4T3N08-CTLFireability-01
lola: time limit : 3343 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 2/3343 3/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-01 470872 m, 94174 m/sec, 990978 t fired, .

Time elapsed: 259 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 7/3343 7/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-01 1415923 m, 189010 m/sec, 3237365 t fired, .

Time elapsed: 264 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 12/3343 11/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-01 2361924 m, 189200 m/sec, 5460732 t fired, .

Time elapsed: 269 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 17/3343 14/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-01 3100089 m, 147633 m/sec, 7605020 t fired, .

Time elapsed: 274 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 22/3343 18/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-01 3821255 m, 144233 m/sec, 9754728 t fired, .

Time elapsed: 279 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 27/3343 21/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-01 4648245 m, 165398 m/sec, 11978422 t fired, .

Time elapsed: 284 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 32/3343 25/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-01 5444371 m, 159225 m/sec, 14189827 t fired, .

Time elapsed: 289 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 37/3343 28/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-01 6032400 m, 117605 m/sec, 16315415 t fired, .

Time elapsed: 294 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 42/3343 31/32 UtilityControlRoom-PT-Z4T3N08-CTLFireability-01 6825821 m, 158684 m/sec, 18488364 t fired, .

Time elapsed: 299 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 4 (type EXCL) for UtilityControlRoom-PT-Z4T3N08-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 304 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N08-CTLFireability-00: EF true findpath
UtilityControlRoom-PT-Z4T3N08-CTLFireability-01: CTL unknown AGGR
UtilityControlRoom-PT-Z4T3N08-CTLFireability-02: CTL unknown AGGR
UtilityControlRoom-PT-Z4T3N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-06: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-08: CTL unknown AGGR
UtilityControlRoom-PT-Z4T3N08-CTLFireability-09: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-10: CTL unknown AGGR
UtilityControlRoom-PT-Z4T3N08-CTLFireability-11: CTL unknown AGGR
UtilityControlRoom-PT-Z4T3N08-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-14: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N08-CTLFireability-15: CTL true CTL model checker


Time elapsed: 304 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z4T3N08"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is UtilityControlRoom-PT-Z4T3N08, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r486-tall-167912702201170"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z4T3N08.tgz
mv UtilityControlRoom-PT-Z4T3N08 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;