fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r486-tall-167912702101100
Last Updated
May 14, 2023

About the Execution of LoLA for UtilityControlRoom-PT-Z2T3N06

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
136.840 1558.00 1238.00 0.00 FTFTFFTFFFTFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r486-tall-167912702101100.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is UtilityControlRoom-PT-Z2T3N06, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r486-tall-167912702101100
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1016K
-rw-r--r-- 1 mcc users 14K Feb 26 14:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 88K Feb 26 14:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 22K Feb 26 14:49 CTLFireability.txt
-rw-r--r-- 1 mcc users 105K Feb 26 14:49 CTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 17:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 50K Feb 25 17:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Feb 25 17:24 LTLFireability.txt
-rw-r--r-- 1 mcc users 33K Feb 25 17:24 LTLFireability.xml
-rw-r--r-- 1 mcc users 47K Feb 26 14:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 261K Feb 26 14:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 49K Feb 26 14:53 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 207K Feb 26 14:53 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.0K Feb 25 17:24 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.2K Feb 25 17:24 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 70K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-00
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-01
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-02
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-03
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-04
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-05
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-06
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-07
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-08
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-09
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-10
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-11
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-12
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-13
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-14
FORMULA_NAME UtilityControlRoom-PT-Z2T3N06-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1679276569814

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z2T3N06
Not applying reductions.
Model is PT
LTLFireability PT
starting LoLA
BK_INPUT UtilityControlRoom-PT-Z2T3N06
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
LTLFireability

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T3N06-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679276571372

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:527
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 10 (type EXCL) for 9 UtilityControlRoom-PT-Z2T3N06-LTLFireability-03
lola: time limit : 128 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 10 (type EXCL) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-03
lola: result : true
lola: markings : 1013
lola: fired transitions : 2142
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 15 UtilityControlRoom-PT-Z2T3N06-LTLFireability-05
lola: time limit : 144 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-05
lola: result : false
lola: markings : 36
lola: fired transitions : 36
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 7 (type EXCL) for 6 UtilityControlRoom-PT-Z2T3N06-LTLFireability-02
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 7 (type EXCL) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-02
lola: result : false
lola: markings : 37
lola: fired transitions : 37
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 UtilityControlRoom-PT-Z2T3N06-LTLFireability-00
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-00
lola: result : false
lola: markings : 169
lola: fired transitions : 182
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 56 (type EXCL) for 22 UtilityControlRoom-PT-Z2T3N06-LTLFireability-06
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: planning for (null) stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 58 (type FNDP) for 40 UtilityControlRoom-PT-Z2T3N06-LTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type EQUN) for 40 UtilityControlRoom-PT-Z2T3N06-LTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 66 (type SRCH) for 40 UtilityControlRoom-PT-Z2T3N06-LTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 66 (type SRCH) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-12
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 58 (type FNDP) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-12
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 64 (type EQUN) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-12 (obsolete)
lola: FINISHED task # 64 (type EQUN) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-12
lola: result : unknown
lola: FINISHED task # 56 (type EXCL) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-06
lola: result : false
lola: markings : 176191
lola: fired transitions : 823422
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 51 (type EXCL) for 50 UtilityControlRoom-PT-Z2T3N06-LTLFireability-14
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 51 (type EXCL) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-14
lola: result : false
lola: markings : 36
lola: fired transitions : 36
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 47 UtilityControlRoom-PT-Z2T3N06-LTLFireability-13
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-13
lola: result : false
lola: markings : 107
lola: fired transitions : 123
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 37 UtilityControlRoom-PT-Z2T3N06-LTLFireability-11
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-11
lola: result : false
lola: markings : 15564
lola: fired transitions : 29602
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 UtilityControlRoom-PT-Z2T3N06-LTLFireability-04
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-04
lola: result : false
lola: markings : 49
lola: fired transitions : 54
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 UtilityControlRoom-PT-Z2T3N06-LTLFireability-01
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-01
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 UtilityControlRoom-PT-Z2T3N06-LTLFireability-09
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-09
lola: result : false
lola: markings : 20
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 UtilityControlRoom-PT-Z2T3N06-LTLFireability-08
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-08
lola: result : false
lola: markings : 26
lola: fired transitions : 27
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 54 (type EXCL) for 53 UtilityControlRoom-PT-Z2T3N06-LTLFireability-15
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 54 (type EXCL) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-15
lola: result : false
lola: markings : 1791
lola: fired transitions : 3227
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 34 UtilityControlRoom-PT-Z2T3N06-LTLFireability-10
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-10
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 UtilityControlRoom-PT-Z2T3N06-LTLFireability-07
lola: time limit : 3598 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for UtilityControlRoom-PT-Z2T3N06-LTLFireability-07
lola: result : false
lola: markings : 75
lola: fired transitions : 76
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T3N06-LTLFireability-00: LTL false LTL model checker
UtilityControlRoom-PT-Z2T3N06-LTLFireability-01: LTL true LTL model checker
UtilityControlRoom-PT-Z2T3N06-LTLFireability-02: LTL false LTL model checker
UtilityControlRoom-PT-Z2T3N06-LTLFireability-03: LTL true LTL model checker
UtilityControlRoom-PT-Z2T3N06-LTLFireability-04: LTL false LTL model checker
UtilityControlRoom-PT-Z2T3N06-LTLFireability-05: CONJ false LTL model checker
UtilityControlRoom-PT-Z2T3N06-LTLFireability-06: F true state space / EG
UtilityControlRoom-PT-Z2T3N06-LTLFireability-07: LTL false LTL model checker
UtilityControlRoom-PT-Z2T3N06-LTLFireability-08: LTL false LTL model checker
UtilityControlRoom-PT-Z2T3N06-LTLFireability-09: LTL false LTL model checker
UtilityControlRoom-PT-Z2T3N06-LTLFireability-10: LTL true LTL model checker
UtilityControlRoom-PT-Z2T3N06-LTLFireability-11: LTL false LTL model checker
UtilityControlRoom-PT-Z2T3N06-LTLFireability-12: CONJ false findpath
UtilityControlRoom-PT-Z2T3N06-LTLFireability-13: LTL false LTL model checker
UtilityControlRoom-PT-Z2T3N06-LTLFireability-14: LTL false LTL model checker
UtilityControlRoom-PT-Z2T3N06-LTLFireability-15: LTL false LTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z2T3N06"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is UtilityControlRoom-PT-Z2T3N06, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r486-tall-167912702101100"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z2T3N06.tgz
mv UtilityControlRoom-PT-Z2T3N06 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;