Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r455-smll-167912647600602.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is StigmergyElection-PT-05a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912647600602
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 708K
-rw-r--r-- 1 mcc users 7.0K Feb 26 16:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Feb 26 16:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.0K Feb 26 16:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 69K Feb 26 16:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:14 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 17:14 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 17:14 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 17:14 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 26 16:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 160K Feb 26 16:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.4K Feb 26 16:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 83K Feb 26 16:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 17:14 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:14 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 193K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-00
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-01
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-02
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-03
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-04
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-05
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-06
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-07
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-08
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-09
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-10
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-11
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-12
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-13
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-14
FORMULA_NAME StigmergyElection-PT-05a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679317116677

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=StigmergyElection-PT-05a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-20 12:58:40] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-20 12:58:40] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 12:58:40] [INFO ] Load time of PNML (sax parser for PT used): 193 ms
[2023-03-20 12:58:40] [INFO ] Transformed 72 places.
[2023-03-20 12:58:40] [INFO ] Transformed 450 transitions.
[2023-03-20 12:58:40] [INFO ] Found NUPN structural information;
[2023-03-20 12:58:40] [INFO ] Parsed PT model containing 72 places and 450 transitions and 3637 arcs in 350 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 23 ms.
Ensure Unique test removed 291 transitions
Reduce redundant transitions removed 291 transitions.
Support contains 38 out of 72 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 159/159 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 70 transition count 157
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 70 transition count 157
Applied a total of 4 rules in 38 ms. Remains 70 /72 variables (removed 2) and now considering 157/159 (removed 2) transitions.
[2023-03-20 12:58:40] [INFO ] Flow matrix only has 144 transitions (discarded 13 similar events)
// Phase 1: matrix 144 rows 70 cols
[2023-03-20 12:58:40] [INFO ] Computed 4 place invariants in 15 ms
[2023-03-20 12:58:41] [INFO ] Implicit Places using invariants in 315 ms returned []
[2023-03-20 12:58:41] [INFO ] Flow matrix only has 144 transitions (discarded 13 similar events)
[2023-03-20 12:58:41] [INFO ] Invariant cache hit.
[2023-03-20 12:58:41] [INFO ] State equation strengthened by 86 read => feed constraints.
[2023-03-20 12:58:41] [INFO ] Implicit Places using invariants and state equation in 259 ms returned []
Implicit Place search using SMT with State Equation took 635 ms to find 0 implicit places.
[2023-03-20 12:58:41] [INFO ] Flow matrix only has 144 transitions (discarded 13 similar events)
[2023-03-20 12:58:41] [INFO ] Invariant cache hit.
[2023-03-20 12:58:41] [INFO ] Dead Transitions using invariants and state equation in 218 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 70/72 places, 157/159 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 895 ms. Remains : 70/72 places, 157/159 transitions.
Support contains 38 out of 70 places after structural reductions.
[2023-03-20 12:58:42] [INFO ] Flatten gal took : 73 ms
[2023-03-20 12:58:42] [INFO ] Flatten gal took : 35 ms
[2023-03-20 12:58:42] [INFO ] Input system was already deterministic with 157 transitions.
Support contains 37 out of 70 places (down from 38) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 42 resets, run finished after 950 ms. (steps per millisecond=10 ) properties (out of 44) seen :36
Incomplete Best-First random walk after 10001 steps, including 25 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 48 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 18 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10000 steps, including 20 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 22 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 20 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 52 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 8) seen :0
Running SMT prover for 8 properties.
[2023-03-20 12:58:43] [INFO ] Flow matrix only has 144 transitions (discarded 13 similar events)
[2023-03-20 12:58:43] [INFO ] Invariant cache hit.
[2023-03-20 12:58:43] [INFO ] [Real]Absence check using 4 positive place invariants in 3 ms returned sat
[2023-03-20 12:58:43] [INFO ] After 235ms SMT Verify possible using all constraints in real domain returned unsat :6 sat :0 real:2
[2023-03-20 12:58:44] [INFO ] [Nat]Absence check using 4 positive place invariants in 3 ms returned sat
[2023-03-20 12:58:44] [INFO ] After 116ms SMT Verify possible using state equation in natural domain returned unsat :7 sat :1
[2023-03-20 12:58:44] [INFO ] State equation strengthened by 86 read => feed constraints.
[2023-03-20 12:58:44] [INFO ] After 48ms SMT Verify possible using 86 Read/Feed constraints in natural domain returned unsat :7 sat :1
[2023-03-20 12:58:44] [INFO ] Deduced a trap composed of 13 places in 102 ms of which 7 ms to minimize.
[2023-03-20 12:58:44] [INFO ] Deduced a trap composed of 12 places in 104 ms of which 1 ms to minimize.
[2023-03-20 12:58:44] [INFO ] Deduced a trap composed of 13 places in 70 ms of which 3 ms to minimize.
[2023-03-20 12:58:44] [INFO ] Deduced a trap composed of 12 places in 59 ms of which 2 ms to minimize.
[2023-03-20 12:58:44] [INFO ] Deduced a trap composed of 12 places in 56 ms of which 1 ms to minimize.
[2023-03-20 12:58:44] [INFO ] Deduced a trap composed of 12 places in 53 ms of which 1 ms to minimize.
[2023-03-20 12:58:44] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 6 trap constraints in 545 ms
[2023-03-20 12:58:44] [INFO ] After 603ms SMT Verify possible using trap constraints in natural domain returned unsat :8 sat :0
[2023-03-20 12:58:44] [INFO ] After 804ms SMT Verify possible using all constraints in natural domain returned unsat :8 sat :0
Fused 8 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 8 atomic propositions for a total of 16 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA StigmergyElection-PT-05a-CTLFireability-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyElection-PT-05a-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-20 12:58:44] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2023-03-20 12:58:44] [INFO ] Flatten gal took : 26 ms
FORMULA StigmergyElection-PT-05a-CTLFireability-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyElection-PT-05a-CTLFireability-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-20 12:58:44] [INFO ] Flatten gal took : 24 ms
[2023-03-20 12:58:44] [INFO ] Input system was already deterministic with 157 transitions.
Support contains 27 out of 70 places (down from 30) after GAL structural reductions.
Computed a total of 12 stabilizing places and 11 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 157/157 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 63 transition count 145
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 63 transition count 145
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 19 place count 58 transition count 135
Iterating global reduction 0 with 5 rules applied. Total rules applied 24 place count 58 transition count 135
Applied a total of 24 rules in 10 ms. Remains 58 /70 variables (removed 12) and now considering 135/157 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 58/70 places, 135/157 transitions.
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 10 ms
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 11 ms
[2023-03-20 12:58:45] [INFO ] Input system was already deterministic with 135 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 157/157 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 63 transition count 145
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 63 transition count 145
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 19 place count 58 transition count 135
Iterating global reduction 0 with 5 rules applied. Total rules applied 24 place count 58 transition count 135
Applied a total of 24 rules in 8 ms. Remains 58 /70 variables (removed 12) and now considering 135/157 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 58/70 places, 135/157 transitions.
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 9 ms
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 10 ms
[2023-03-20 12:58:45] [INFO ] Input system was already deterministic with 135 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 157/157 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 63 transition count 145
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 63 transition count 145
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 19 place count 58 transition count 135
Iterating global reduction 0 with 5 rules applied. Total rules applied 24 place count 58 transition count 135
Applied a total of 24 rules in 7 ms. Remains 58 /70 variables (removed 12) and now considering 135/157 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 58/70 places, 135/157 transitions.
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 9 ms
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 11 ms
[2023-03-20 12:58:45] [INFO ] Input system was already deterministic with 135 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 157/157 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 63 transition count 145
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 63 transition count 145
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 19 place count 58 transition count 135
Iterating global reduction 0 with 5 rules applied. Total rules applied 24 place count 58 transition count 135
Applied a total of 24 rules in 10 ms. Remains 58 /70 variables (removed 12) and now considering 135/157 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 58/70 places, 135/157 transitions.
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 9 ms
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 11 ms
[2023-03-20 12:58:45] [INFO ] Input system was already deterministic with 135 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 70/70 places, 157/157 transitions.
Reduce places removed 1 places and 1 transitions.
Reduce places removed 1 places and 0 transitions.
Drop transitions removed 10 transitions
Trivial Post-agglo rules discarded 10 transitions
Performed 10 trivial Post agglomeration. Transition count delta: 10
Iterating post reduction 0 with 11 rules applied. Total rules applied 11 place count 68 transition count 146
Reduce places removed 10 places and 0 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 21 place count 58 transition count 146
Performed 15 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 15 Pre rules applied. Total rules applied 21 place count 58 transition count 131
Deduced a syphon composed of 15 places in 1 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 2 with 30 rules applied. Total rules applied 51 place count 43 transition count 131
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 63 place count 31 transition count 114
Iterating global reduction 2 with 12 rules applied. Total rules applied 75 place count 31 transition count 114
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 80 place count 26 transition count 104
Iterating global reduction 2 with 5 rules applied. Total rules applied 85 place count 26 transition count 104
Ensure Unique test removed 31 transitions
Reduce isomorphic transitions removed 31 transitions.
Iterating post reduction 2 with 31 rules applied. Total rules applied 116 place count 26 transition count 73
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 3 with 5 rules applied. Total rules applied 121 place count 26 transition count 68
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 3 with 10 rules applied. Total rules applied 131 place count 21 transition count 63
Applied a total of 131 rules in 32 ms. Remains 21 /70 variables (removed 49) and now considering 63/157 (removed 94) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 21/70 places, 63/157 transitions.
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 4 ms
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 4 ms
[2023-03-20 12:58:45] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 157/157 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 63 transition count 145
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 63 transition count 145
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 19 place count 58 transition count 135
Iterating global reduction 0 with 5 rules applied. Total rules applied 24 place count 58 transition count 135
Applied a total of 24 rules in 11 ms. Remains 58 /70 variables (removed 12) and now considering 135/157 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 58/70 places, 135/157 transitions.
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 15 ms
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 9 ms
[2023-03-20 12:58:45] [INFO ] Input system was already deterministic with 135 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 70/70 places, 157/157 transitions.
Performed 9 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 9 Pre rules applied. Total rules applied 0 place count 70 transition count 148
Deduced a syphon composed of 9 places in 0 ms
Reduce places removed 9 places and 0 transitions.
Iterating global reduction 0 with 18 rules applied. Total rules applied 18 place count 61 transition count 148
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 25 place count 54 transition count 136
Iterating global reduction 0 with 7 rules applied. Total rules applied 32 place count 54 transition count 136
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 37 place count 49 transition count 126
Iterating global reduction 0 with 5 rules applied. Total rules applied 42 place count 49 transition count 126
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 45 place count 46 transition count 123
Iterating global reduction 0 with 3 rules applied. Total rules applied 48 place count 46 transition count 123
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 0 with 7 rules applied. Total rules applied 55 place count 46 transition count 116
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 1 with 5 rules applied. Total rules applied 60 place count 46 transition count 111
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 1 with 10 rules applied. Total rules applied 70 place count 41 transition count 106
Applied a total of 70 rules in 32 ms. Remains 41 /70 variables (removed 29) and now considering 106/157 (removed 51) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 41/70 places, 106/157 transitions.
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 7 ms
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 7 ms
[2023-03-20 12:58:45] [INFO ] Input system was already deterministic with 106 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 157/157 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 63 transition count 145
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 63 transition count 145
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 19 place count 58 transition count 135
Iterating global reduction 0 with 5 rules applied. Total rules applied 24 place count 58 transition count 135
Applied a total of 24 rules in 5 ms. Remains 58 /70 variables (removed 12) and now considering 135/157 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 58/70 places, 135/157 transitions.
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 7 ms
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 6 ms
[2023-03-20 12:58:45] [INFO ] Input system was already deterministic with 135 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 157/157 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 63 transition count 145
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 63 transition count 145
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 19 place count 58 transition count 135
Iterating global reduction 0 with 5 rules applied. Total rules applied 24 place count 58 transition count 135
Applied a total of 24 rules in 4 ms. Remains 58 /70 variables (removed 12) and now considering 135/157 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 58/70 places, 135/157 transitions.
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 6 ms
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 6 ms
[2023-03-20 12:58:45] [INFO ] Input system was already deterministic with 135 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 157/157 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 65 transition count 149
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 65 transition count 149
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 13 place count 62 transition count 143
Iterating global reduction 0 with 3 rules applied. Total rules applied 16 place count 62 transition count 143
Applied a total of 16 rules in 4 ms. Remains 62 /70 variables (removed 8) and now considering 143/157 (removed 14) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 62/70 places, 143/157 transitions.
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 7 ms
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 7 ms
[2023-03-20 12:58:45] [INFO ] Input system was already deterministic with 143 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 157/157 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 65 transition count 148
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 65 transition count 148
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 13 place count 62 transition count 142
Iterating global reduction 0 with 3 rules applied. Total rules applied 16 place count 62 transition count 142
Applied a total of 16 rules in 3 ms. Remains 62 /70 variables (removed 8) and now considering 142/157 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 62/70 places, 142/157 transitions.
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 7 ms
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 7 ms
[2023-03-20 12:58:45] [INFO ] Input system was already deterministic with 142 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 157/157 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 64 transition count 147
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 64 transition count 147
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 15 place count 61 transition count 141
Iterating global reduction 0 with 3 rules applied. Total rules applied 18 place count 61 transition count 141
Applied a total of 18 rules in 3 ms. Remains 61 /70 variables (removed 9) and now considering 141/157 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 61/70 places, 141/157 transitions.
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 6 ms
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 7 ms
[2023-03-20 12:58:45] [INFO ] Input system was already deterministic with 141 transitions.
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 8 ms
[2023-03-20 12:58:45] [INFO ] Flatten gal took : 8 ms
[2023-03-20 12:58:45] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 9 ms.
[2023-03-20 12:58:45] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 70 places, 157 transitions and 903 arcs took 2 ms.
Total runtime 5443 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT StigmergyElection-PT-05a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/369
CTLFireability

FORMULA StigmergyElection-PT-05a-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679317127758

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/369/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/369/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/369/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:287
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 4 (type EXCL) for 3 StigmergyElection-PT-05a-CTLFireability-02
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for StigmergyElection-PT-05a-CTLFireability-02
lola: result : false
lola: markings : 109
lola: fired transitions : 327
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 19 (type EXCL) for 18 StigmergyElection-PT-05a-CTLFireability-09
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 19 (type EXCL) for StigmergyElection-PT-05a-CTLFireability-09
lola: result : true
lola: markings : 2355
lola: fired transitions : 16878
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 32 StigmergyElection-PT-05a-CTLFireability-11
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for StigmergyElection-PT-05a-CTLFireability-11
lola: result : false
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 46 (type EXCL) for 45 StigmergyElection-PT-05a-CTLFireability-15
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for StigmergyElection-PT-05a-CTLFireability-15
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 30 (type EXCL) for 21 StigmergyElection-PT-05a-CTLFireability-10
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 30 (type EXCL) for StigmergyElection-PT-05a-CTLFireability-10
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 StigmergyElection-PT-05a-CTLFireability-08
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 16 (type EXCL) for StigmergyElection-PT-05a-CTLFireability-08
lola: result : true
lola: markings : 246
lola: fired transitions : 1330
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 StigmergyElection-PT-05a-CTLFireability-05
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for StigmergyElection-PT-05a-CTLFireability-05
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 21 StigmergyElection-PT-05a-CTLFireability-10
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for StigmergyElection-PT-05a-CTLFireability-10
lola: result : true
lola: markings : 36
lola: fired transitions : 135
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: LAUNCH task # 10 (type EXCL) for 9 StigmergyElection-PT-05a-CTLFireability-06
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 10 (type EXCL) for StigmergyElection-PT-05a-CTLFireability-06
lola: result : true
lola: markings : 4411
lola: fired transitions : 43416
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 StigmergyElection-PT-05a-CTLFireability-14
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for StigmergyElection-PT-05a-CTLFireability-14
lola: result : true
lola: markings : 48
lola: fired transitions : 130
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 StigmergyElection-PT-05a-CTLFireability-13
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for StigmergyElection-PT-05a-CTLFireability-13
lola: result : false
lola: markings : 1409
lola: fired transitions : 11520
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 StigmergyElection-PT-05a-CTLFireability-00
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for StigmergyElection-PT-05a-CTLFireability-00
lola: result : false
lola: markings : 4411
lola: fired transitions : 30466
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 12 StigmergyElection-PT-05a-CTLFireability-07
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for StigmergyElection-PT-05a-CTLFireability-07
lola: result : true
lola: markings : 6
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-05a-CTLFireability-00: CTL false CTL model checker
StigmergyElection-PT-05a-CTLFireability-02: CTL false CTL model checker
StigmergyElection-PT-05a-CTLFireability-05: CTL true CTL model checker
StigmergyElection-PT-05a-CTLFireability-06: CTL true CTL model checker
StigmergyElection-PT-05a-CTLFireability-07: AGAF false state space /EFEG
StigmergyElection-PT-05a-CTLFireability-08: CTL true CTL model checker
StigmergyElection-PT-05a-CTLFireability-09: CTL true CTL model checker
StigmergyElection-PT-05a-CTLFireability-10: CONJ true CONJ
StigmergyElection-PT-05a-CTLFireability-11: CONJ false CTL model checker
StigmergyElection-PT-05a-CTLFireability-13: CTL false CTL model checker
StigmergyElection-PT-05a-CTLFireability-14: CTL true CTL model checker
StigmergyElection-PT-05a-CTLFireability-15: CTL true CTL model checker


Time elapsed: 1 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyElection-PT-05a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is StigmergyElection-PT-05a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912647600602"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/StigmergyElection-PT-05a.tgz
mv StigmergyElection-PT-05a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;