fond

jQuery Multi Level CSS Menu Css3Menu.com

Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r455-smll-167912647600598
Last Updated
May 14, 2023

About the Execution of LoLa+red for StigmergyElection-PT-04b

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
415.579 19567.00 41030.00 647.40 FFFTTTFTFFFFTTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r455-smll-167912647600598.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is StigmergyElection-PT-04b, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912647600598
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 644K
-rw-r--r-- 1 mcc users 6.8K Feb 26 16:30 CTLCardinality.txt
-rw-r--r-- 1 mcc users 73K Feb 26 16:30 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.2K Feb 26 16:29 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 26 16:29 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Feb 25 17:14 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Feb 25 17:14 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 17:14 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:14 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 16:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 109K Feb 26 16:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Feb 26 16:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 69K Feb 26 16:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 17:14 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:14 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 203K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-00
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-01
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-02
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-03
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-04
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-05
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-06
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-07
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-08
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-09
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-10
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-11
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-12
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-13
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-14
FORMULA_NAME StigmergyElection-PT-04b-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1679317018106

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=StigmergyElection-PT-04b
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-20 12:57:02] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-20 12:57:02] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 12:57:02] [INFO ] Load time of PNML (sax parser for PT used): 201 ms
[2023-03-20 12:57:02] [INFO ] Transformed 563 places.
[2023-03-20 12:57:02] [INFO ] Transformed 780 transitions.
[2023-03-20 12:57:02] [INFO ] Found NUPN structural information;
[2023-03-20 12:57:02] [INFO ] Parsed PT model containing 563 places and 780 transitions and 2680 arcs in 370 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 37 ms.
Working with output stream class java.io.PrintStream
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 136 resets, run finished after 992 ms. (steps per millisecond=10 ) properties (out of 13) seen :5
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-00 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 29 resets, run finished after 119 ms. (steps per millisecond=84 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 25 resets, run finished after 98 ms. (steps per millisecond=102 ) properties (out of 8) seen :1
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 27 resets, run finished after 111 ms. (steps per millisecond=90 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 27 resets, run finished after 91 ms. (steps per millisecond=109 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 27 resets, run finished after 91 ms. (steps per millisecond=109 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 28 resets, run finished after 123 ms. (steps per millisecond=81 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 31 resets, run finished after 99 ms. (steps per millisecond=101 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 28 resets, run finished after 71 ms. (steps per millisecond=140 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
// Phase 1: matrix 780 rows 563 cols
[2023-03-20 12:57:04] [INFO ] Computed 5 place invariants in 47 ms
[2023-03-20 12:57:05] [INFO ] After 793ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:7
[2023-03-20 12:57:05] [INFO ] [Nat]Absence check using 5 positive place invariants in 11 ms returned sat
[2023-03-20 12:57:06] [INFO ] After 813ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :6
[2023-03-20 12:57:07] [INFO ] Deduced a trap composed of 189 places in 672 ms of which 14 ms to minimize.
[2023-03-20 12:57:08] [INFO ] Deduced a trap composed of 191 places in 481 ms of which 3 ms to minimize.
[2023-03-20 12:57:08] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 1325 ms
[2023-03-20 12:57:08] [INFO ] Deduced a trap composed of 192 places in 347 ms of which 3 ms to minimize.
[2023-03-20 12:57:08] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 467 ms
[2023-03-20 12:57:09] [INFO ] Deduced a trap composed of 189 places in 528 ms of which 5 ms to minimize.
[2023-03-20 12:57:10] [INFO ] Deduced a trap composed of 190 places in 380 ms of which 2 ms to minimize.
[2023-03-20 12:57:10] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 1063 ms
[2023-03-20 12:57:10] [INFO ] After 4233ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :6
Attempting to minimize the solution found.
Minimization took 440 ms.
[2023-03-20 12:57:10] [INFO ] After 5279ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :6
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-10 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 7 Parikh solutions to 6 different solutions.
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 1 properties in 99 ms.
Support contains 66 out of 563 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 563/563 places, 780/780 transitions.
Graph (trivial) has 454 edges and 563 vertex of which 31 / 563 are part of one of the 6 SCC in 15 ms
Free SCC test removed 25 places
Drop transitions removed 32 transitions
Reduce isomorphic transitions removed 32 transitions.
Graph (complete) has 913 edges and 538 vertex of which 532 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.7 ms
Discarding 6 places :
Also discarding 3 output transitions
Drop transitions removed 3 transitions
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Drop transitions removed 265 transitions
Trivial Post-agglo rules discarded 265 transitions
Performed 265 trivial Post agglomeration. Transition count delta: 265
Iterating post reduction 0 with 267 rules applied. Total rules applied 269 place count 532 transition count 478
Reduce places removed 265 places and 0 transitions.
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 1 with 271 rules applied. Total rules applied 540 place count 267 transition count 472
Reduce places removed 3 places and 0 transitions.
Performed 37 Post agglomeration using F-continuation condition.Transition count delta: 37
Iterating post reduction 2 with 40 rules applied. Total rules applied 580 place count 264 transition count 435
Reduce places removed 37 places and 0 transitions.
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 3 with 41 rules applied. Total rules applied 621 place count 227 transition count 431
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 4 with 2 rules applied. Total rules applied 623 place count 225 transition count 431
Performed 11 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 11 Pre rules applied. Total rules applied 623 place count 225 transition count 420
Deduced a syphon composed of 11 places in 2 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 5 with 22 rules applied. Total rules applied 645 place count 214 transition count 420
Discarding 26 places :
Symmetric choice reduction at 5 with 26 rule applications. Total rules 671 place count 188 transition count 394
Iterating global reduction 5 with 26 rules applied. Total rules applied 697 place count 188 transition count 394
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 698 place count 188 transition count 393
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 2 Pre rules applied. Total rules applied 698 place count 188 transition count 391
Deduced a syphon composed of 2 places in 2 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 6 with 4 rules applied. Total rules applied 702 place count 186 transition count 391
Discarding 7 places :
Symmetric choice reduction at 6 with 7 rule applications. Total rules 709 place count 179 transition count 273
Iterating global reduction 6 with 7 rules applied. Total rules applied 716 place count 179 transition count 273
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 6 with 2 rules applied. Total rules applied 718 place count 179 transition count 271
Performed 19 Post agglomeration using F-continuation condition.Transition count delta: 19
Deduced a syphon composed of 19 places in 0 ms
Reduce places removed 19 places and 0 transitions.
Iterating global reduction 7 with 38 rules applied. Total rules applied 756 place count 160 transition count 252
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 7 with 1 rules applied. Total rules applied 757 place count 160 transition count 251
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -2
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 8 with 8 rules applied. Total rules applied 765 place count 156 transition count 253
Drop transitions removed 8 transitions
Redundant transition composition rules discarded 8 transitions
Iterating global reduction 8 with 8 rules applied. Total rules applied 773 place count 156 transition count 245
Free-agglomeration rule applied 24 times.
Iterating global reduction 8 with 24 rules applied. Total rules applied 797 place count 156 transition count 221
Reduce places removed 24 places and 0 transitions.
Iterating post reduction 8 with 24 rules applied. Total rules applied 821 place count 132 transition count 221
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 9 with 2 rules applied. Total rules applied 823 place count 132 transition count 219
Partial Free-agglomeration rule applied 3 times.
Drop transitions removed 3 transitions
Iterating global reduction 9 with 3 rules applied. Total rules applied 826 place count 132 transition count 219
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 9 with 1 rules applied. Total rules applied 827 place count 132 transition count 218
Applied a total of 827 rules in 351 ms. Remains 132 /563 variables (removed 431) and now considering 218/780 (removed 562) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 352 ms. Remains : 132/563 places, 218/780 transitions.
Incomplete random walk after 10000 steps, including 88 resets, run finished after 261 ms. (steps per millisecond=38 ) properties (out of 5) seen :2
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-06 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-02 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 84 resets, run finished after 74 ms. (steps per millisecond=135 ) properties (out of 3) seen :1
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-08 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10000 steps, including 97 resets, run finished after 48 ms. (steps per millisecond=208 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10000 steps, including 28 resets, run finished after 89 ms. (steps per millisecond=112 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
// Phase 1: matrix 218 rows 132 cols
[2023-03-20 12:57:11] [INFO ] Computed 4 place invariants in 8 ms
[2023-03-20 12:57:11] [INFO ] After 61ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-20 12:57:11] [INFO ] [Nat]Absence check using 4 positive place invariants in 4 ms returned sat
[2023-03-20 12:57:11] [INFO ] After 151ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-20 12:57:11] [INFO ] State equation strengthened by 50 read => feed constraints.
[2023-03-20 12:57:11] [INFO ] After 62ms SMT Verify possible using 50 Read/Feed constraints in natural domain returned unsat :0 sat :2
[2023-03-20 12:57:12] [INFO ] Deduced a trap composed of 45 places in 124 ms of which 0 ms to minimize.
[2023-03-20 12:57:12] [INFO ] Deduced a trap composed of 41 places in 96 ms of which 10 ms to minimize.
[2023-03-20 12:57:12] [INFO ] Deduced a trap composed of 38 places in 116 ms of which 1 ms to minimize.
[2023-03-20 12:57:12] [INFO ] Trap strengthening (SAT) tested/added 4/3 trap constraints in 400 ms
[2023-03-20 12:57:12] [INFO ] After 515ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 42 ms.
[2023-03-20 12:57:12] [INFO ] After 791ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Parikh walk visited 0 properties in 6 ms.
Support contains 13 out of 132 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 132/132 places, 218/218 transitions.
Graph (trivial) has 104 edges and 132 vertex of which 18 / 132 are part of one of the 7 SCC in 0 ms
Free SCC test removed 11 places
Drop transitions removed 19 transitions
Reduce isomorphic transitions removed 19 transitions.
Graph (complete) has 282 edges and 121 vertex of which 119 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.1 ms
Discarding 2 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 43 transitions
Trivial Post-agglo rules discarded 43 transitions
Performed 43 trivial Post agglomeration. Transition count delta: 43
Iterating post reduction 0 with 44 rules applied. Total rules applied 46 place count 119 transition count 154
Reduce places removed 43 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 1 with 48 rules applied. Total rules applied 94 place count 76 transition count 149
Reduce places removed 1 places and 0 transitions.
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Iterating post reduction 2 with 6 rules applied. Total rules applied 100 place count 75 transition count 144
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 3 with 5 rules applied. Total rules applied 105 place count 70 transition count 144
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 5 Pre rules applied. Total rules applied 105 place count 70 transition count 139
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 4 with 10 rules applied. Total rules applied 115 place count 65 transition count 139
Discarding 3 places :
Symmetric choice reduction at 4 with 3 rule applications. Total rules 118 place count 62 transition count 136
Iterating global reduction 4 with 3 rules applied. Total rules applied 121 place count 62 transition count 136
Discarding 2 places :
Symmetric choice reduction at 4 with 2 rule applications. Total rules 123 place count 60 transition count 134
Iterating global reduction 4 with 2 rules applied. Total rules applied 125 place count 60 transition count 134
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 4 with 12 rules applied. Total rules applied 137 place count 54 transition count 128
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 4 with 2 rules applied. Total rules applied 139 place count 54 transition count 126
Discarding 4 places :
Symmetric choice reduction at 5 with 4 rule applications. Total rules 143 place count 50 transition count 122
Iterating global reduction 5 with 4 rules applied. Total rules applied 147 place count 50 transition count 122
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 0
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 5 with 4 rules applied. Total rules applied 151 place count 48 transition count 122
Drop transitions removed 4 transitions
Redundant transition composition rules discarded 4 transitions
Iterating global reduction 5 with 4 rules applied. Total rules applied 155 place count 48 transition count 118
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 1 Pre rules applied. Total rules applied 155 place count 48 transition count 117
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 157 place count 47 transition count 117
Free-agglomeration rule applied 9 times with reduction of 20 identical transitions.
Iterating global reduction 5 with 9 rules applied. Total rules applied 166 place count 47 transition count 88
Reduce places removed 9 places and 0 transitions.
Drop transitions removed 1 transitions
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 5 with 11 rules applied. Total rules applied 177 place count 38 transition count 86
Applied a total of 177 rules in 57 ms. Remains 38 /132 variables (removed 94) and now considering 86/218 (removed 132) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 57 ms. Remains : 38/132 places, 86/218 transitions.
Finished random walk after 1693 steps, including 114 resets, run visited all 2 properties in 20 ms. (steps per millisecond=84 )
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
All properties solved without resorting to model-checking.
Total runtime 10537 ms.
starting LoLA
BK_INPUT StigmergyElection-PT-04b
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-04b-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679317037673

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type EXCL) for 6 StigmergyElection-PT-04b-ReachabilityCardinality-02
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 6 StigmergyElection-PT-04b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 6 StigmergyElection-PT-04b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SRCH) for 6 StigmergyElection-PT-04b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 53 (type EXCL) for StigmergyElection-PT-04b-ReachabilityCardinality-02
lola: result : true
lola: markings : 26
lola: fired transitions : 32
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 50 (type EQUN) for StigmergyElection-PT-04b-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 52 (type SRCH) for StigmergyElection-PT-04b-ReachabilityCardinality-02 (obsolete)
lola: FINISHED task # 49 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-02
lola: result : true
lola: fired transitions : 13
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 59 (type EXCL) for 21 StigmergyElection-PT-04b-ReachabilityCardinality-07
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 55 (type FNDP) for 21 StigmergyElection-PT-04b-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type EQUN) for 21 StigmergyElection-PT-04b-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SRCH) for 21 StigmergyElection-PT-04b-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-56.sara.
lola: FINISHED task # 55 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-07
lola: result : true
lola: fired transitions : 27
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 56 (type EQUN) for StigmergyElection-PT-04b-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 58 (type SRCH) for StigmergyElection-PT-04b-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 59 (type EXCL) for StigmergyElection-PT-04b-ReachabilityCardinality-07 (obsolete)
lola: FINISHED task # 56 (type EQUN) for StigmergyElection-PT-04b-ReachabilityCardinality-07
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 72 (type EXCL) for 27 StigmergyElection-PT-04b-ReachabilityCardinality-09
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 68 (type FNDP) for 27 StigmergyElection-PT-04b-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 69 (type EQUN) for 27 StigmergyElection-PT-04b-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type SRCH) for 27 StigmergyElection-PT-04b-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 71 (type SRCH) for StigmergyElection-PT-04b-ReachabilityCardinality-09
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 68 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 69 (type EQUN) for StigmergyElection-PT-04b-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 72 (type EXCL) for StigmergyElection-PT-04b-ReachabilityCardinality-09 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 88 (type EXCL) for 42 StigmergyElection-PT-04b-ReachabilityCardinality-14
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 76 (type FNDP) for 24 StigmergyElection-PT-04b-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 79 (type EQUN) for 24 StigmergyElection-PT-04b-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type SRCH) for 24 StigmergyElection-PT-04b-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 68 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-09
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-69.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 76 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-08
lola: result : true
lola: fired transitions : 59
lola: tried executions : 4
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 79 (type EQUN) for StigmergyElection-PT-04b-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 81 (type SRCH) for StigmergyElection-PT-04b-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 113 (type FNDP) for 3 StigmergyElection-PT-04b-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 114 (type EQUN) for 3 StigmergyElection-PT-04b-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 130 (type SRCH) for 3 StigmergyElection-PT-04b-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 130 (type SRCH) for StigmergyElection-PT-04b-ReachabilityCardinality-01
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 113 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 114 (type EQUN) for StigmergyElection-PT-04b-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 96 (type FNDP) for 15 StigmergyElection-PT-04b-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 102 (type EQUN) for 15 StigmergyElection-PT-04b-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 105 (type SRCH) for 15 StigmergyElection-PT-04b-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 113 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-114.sara.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-79.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-102.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: warning, failure of lp_solve (at job 14)

lola: FINISHED task # 102 (type EQUN) for StigmergyElection-PT-04b-ReachabilityCardinality-05
lola: result : false
lola: CANCELED task # 96 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 105 (type SRCH) for StigmergyElection-PT-04b-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 62 (type FNDP) for 0 StigmergyElection-PT-04b-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 0 StigmergyElection-PT-04b-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SRCH) for 0 StigmergyElection-PT-04b-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 96 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 58515
lola: tried executions : 4887
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 62 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 6
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 63 (type EQUN) for StigmergyElection-PT-04b-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 65 (type SRCH) for StigmergyElection-PT-04b-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 150 (type FNDP) for 18 StigmergyElection-PT-04b-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 151 (type EQUN) for 18 StigmergyElection-PT-04b-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 153 (type SRCH) for 18 StigmergyElection-PT-04b-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-63.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-151.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 153 (type SRCH) for StigmergyElection-PT-04b-ReachabilityCardinality-06
lola: result : true
lola: markings : 11644
lola: fired transitions : 23900
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 150 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 151 (type EQUN) for StigmergyElection-PT-04b-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 136 (type FNDP) for 30 StigmergyElection-PT-04b-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type EQUN) for 30 StigmergyElection-PT-04b-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 140 (type SRCH) for 30 StigmergyElection-PT-04b-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: warning, failure of lp_solve (at job 598)
lola: FINISHED task # 150 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 10747
lola: tried executions : 1174
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 151 (type EQUN) for StigmergyElection-PT-04b-ReachabilityCardinality-06
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-137.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 88 (type EXCL) for StigmergyElection-PT-04b-ReachabilityCardinality-14
lola: result : true
lola: markings : 46835
lola: fired transitions : 76507
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 129 (type EXCL) for 45 StigmergyElection-PT-04b-ReachabilityCardinality-15
lola: time limit : 513 sec
lola: memory limit: 32 pages
lola: FINISHED task # 129 (type EXCL) for StigmergyElection-PT-04b-ReachabilityCardinality-15
lola: result : true
lola: markings : 3829
lola: fired transitions : 4032
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 101 (type EXCL) for 9 StigmergyElection-PT-04b-ReachabilityCardinality-03
lola: time limit : 599 sec
lola: memory limit: 32 pages

lola: FINISHED task # 137 (type EQUN) for StigmergyElection-PT-04b-ReachabilityCardinality-10
lola: result : false
lola: CANCELED task # 136 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 140 (type SRCH) for StigmergyElection-PT-04b-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 120 (type FNDP) for 33 StigmergyElection-PT-04b-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type EQUN) for 33 StigmergyElection-PT-04b-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 125 (type SRCH) for 33 StigmergyElection-PT-04b-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 136 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 24513
lola: tried executions : 1354
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 120 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 12
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 121 (type EQUN) for StigmergyElection-PT-04b-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 125 (type SRCH) for StigmergyElection-PT-04b-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 117 (type FNDP) for 36 StigmergyElection-PT-04b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 123 (type EQUN) for 36 StigmergyElection-PT-04b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type SRCH) for 36 StigmergyElection-PT-04b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 101 (type EXCL) for StigmergyElection-PT-04b-ReachabilityCardinality-03
lola: result : false
lola: markings : 16187
lola: fired transitions : 20432
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 147 (type EXCL) for 39 StigmergyElection-PT-04b-ReachabilityCardinality-13
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: FINISHED task # 147 (type EXCL) for StigmergyElection-PT-04b-ReachabilityCardinality-13
lola: result : true
lola: markings : 316
lola: fired transitions : 354
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 93 (type EXCL) for 12 StigmergyElection-PT-04b-ReachabilityCardinality-04
lola: time limit : 1798 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-121.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-123.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 93 (type EXCL) for StigmergyElection-PT-04b-ReachabilityCardinality-04
lola: result : true
lola: markings : 3809
lola: fired transitions : 3994
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 134 (type EXCL) for 36 StigmergyElection-PT-04b-ReachabilityCardinality-12
lola: time limit : 3596 sec
lola: memory limit: 32 pages

lola: FINISHED task # 123 (type EQUN) for StigmergyElection-PT-04b-ReachabilityCardinality-12
lola: result : false
lola: CANCELED task # 117 (type FNDP) for StigmergyElection-PT-04b-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 133 (type SRCH) for StigmergyElection-PT-04b-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 134 (type EXCL) for StigmergyElection-PT-04b-ReachabilityCardinality-12 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-04b-ReachabilityCardinality-00: AG false findpath
StigmergyElection-PT-04b-ReachabilityCardinality-01: AG false tandem / insertion
StigmergyElection-PT-04b-ReachabilityCardinality-02: AG false tandem / relaxed
StigmergyElection-PT-04b-ReachabilityCardinality-03: AG true tandem / relaxed
StigmergyElection-PT-04b-ReachabilityCardinality-04: EF true tandem / relaxed
StigmergyElection-PT-04b-ReachabilityCardinality-05: AG true state equation
StigmergyElection-PT-04b-ReachabilityCardinality-06: AG false tandem / insertion
StigmergyElection-PT-04b-ReachabilityCardinality-07: EF true findpath
StigmergyElection-PT-04b-ReachabilityCardinality-08: AG false findpath
StigmergyElection-PT-04b-ReachabilityCardinality-09: AG false tandem / insertion
StigmergyElection-PT-04b-ReachabilityCardinality-10: EF false state equation
StigmergyElection-PT-04b-ReachabilityCardinality-11: AG false findpath
StigmergyElection-PT-04b-ReachabilityCardinality-12: AG true state equation
StigmergyElection-PT-04b-ReachabilityCardinality-13: EF true tandem / relaxed
StigmergyElection-PT-04b-ReachabilityCardinality-14: AG false tandem / relaxed
StigmergyElection-PT-04b-ReachabilityCardinality-15: AG false tandem / relaxed


Time elapsed: 4 secs. Pages in use: 3

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyElection-PT-04b"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is StigmergyElection-PT-04b, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912647600598"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/StigmergyElection-PT-04b.tgz
mv StigmergyElection-PT-04b execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;