About the Execution of LoLa+red for Solitaire-PT-EngCT7x7
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2210.056 | 330191.00 | 337324.00 | 1555.00 | TFFFF?TTTF?FTTTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r455-smll-167912647200306.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Solitaire-PT-EngCT7x7, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912647200306
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 536K
-rw-r--r-- 1 mcc users 6.6K Feb 26 12:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Feb 26 12:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 26 12:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 26 12:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:10 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 17:10 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 17:10 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 17:10 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.9K Feb 26 12:58 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 105K Feb 26 12:58 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 12:58 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 96K Feb 26 12:58 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 17:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:10 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 77K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-00
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-01
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-02
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-03
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-04
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-05
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-06
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-07
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-08
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-09
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-10
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-11
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-12
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-13
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-14
FORMULA_NAME Solitaire-PT-EngCT7x7-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679217757210
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Solitaire-PT-EngCT7x7
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 09:22:40] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 09:22:40] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 09:22:40] [INFO ] Load time of PNML (sax parser for PT used): 81 ms
[2023-03-19 09:22:40] [INFO ] Transformed 67 places.
[2023-03-19 09:22:40] [INFO ] Transformed 76 transitions.
[2023-03-19 09:22:40] [INFO ] Parsed PT model containing 67 places and 76 transitions and 532 arcs in 211 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 15 ms.
Support contains 65 out of 67 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 18 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
// Phase 1: matrix 76 rows 67 cols
[2023-03-19 09:22:41] [INFO ] Computed 34 place invariants in 20 ms
[2023-03-19 09:22:41] [INFO ] Implicit Places using invariants in 264 ms returned []
[2023-03-19 09:22:41] [INFO ] Invariant cache hit.
[2023-03-19 09:22:41] [INFO ] Implicit Places using invariants and state equation in 126 ms returned []
Implicit Place search using SMT with State Equation took 430 ms to find 0 implicit places.
[2023-03-19 09:22:41] [INFO ] Invariant cache hit.
[2023-03-19 09:22:41] [INFO ] Dead Transitions using invariants and state equation in 122 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 576 ms. Remains : 67/67 places, 76/76 transitions.
Support contains 65 out of 67 places after structural reductions.
[2023-03-19 09:22:41] [INFO ] Flatten gal took : 96 ms
[2023-03-19 09:22:42] [INFO ] Flatten gal took : 39 ms
[2023-03-19 09:22:42] [INFO ] Input system was already deterministic with 76 transitions.
Incomplete random walk after 10000 steps, including 391 resets, run finished after 733 ms. (steps per millisecond=13 ) properties (out of 68) seen :66
Incomplete Best-First random walk after 10001 steps, including 49 resets, run finished after 84 ms. (steps per millisecond=119 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 55 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-19 09:22:43] [INFO ] Invariant cache hit.
[2023-03-19 09:22:43] [INFO ] [Real]Absence check using 33 positive place invariants in 16 ms returned sat
[2023-03-19 09:22:43] [INFO ] [Real]Absence check using 33 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-19 09:22:43] [INFO ] After 95ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
FORMULA Solitaire-PT-EngCT7x7-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 15 ms
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 18 ms
[2023-03-19 09:22:43] [INFO ] Input system was already deterministic with 76 transitions.
Computed a total of 67 stabilizing places and 76 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 67 transition count 76
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 4 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 67/67 places, 76/76 transitions.
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 12 ms
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 25 ms
[2023-03-19 09:22:43] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 3 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 67/67 places, 76/76 transitions.
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 11 ms
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 13 ms
[2023-03-19 09:22:43] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 2 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 67/67 places, 76/76 transitions.
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 11 ms
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 12 ms
[2023-03-19 09:22:43] [INFO ] Input system was already deterministic with 76 transitions.
Support contains 27 out of 67 places (down from 33) after GAL structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 2 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 67/67 places, 76/76 transitions.
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 11 ms
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 10 ms
[2023-03-19 09:22:43] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 2 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 67/67 places, 76/76 transitions.
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 8 ms
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 9 ms
[2023-03-19 09:22:43] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 2 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 67/67 places, 76/76 transitions.
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 10 ms
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 9 ms
[2023-03-19 09:22:43] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 2 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 67/67 places, 76/76 transitions.
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 8 ms
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 8 ms
[2023-03-19 09:22:43] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 2 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 67/67 places, 76/76 transitions.
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 15 ms
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 8 ms
[2023-03-19 09:22:43] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 12 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 67/67 places, 76/76 transitions.
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 8 ms
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 8 ms
[2023-03-19 09:22:43] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 67/67 places, 76/76 transitions.
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 7 ms
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 7 ms
[2023-03-19 09:22:43] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 3 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 67/67 places, 76/76 transitions.
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 7 ms
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 7 ms
[2023-03-19 09:22:43] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 67/67 places, 76/76 transitions.
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 7 ms
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 8 ms
[2023-03-19 09:22:43] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 67/67 places, 76/76 transitions.
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 6 ms
[2023-03-19 09:22:43] [INFO ] Flatten gal took : 7 ms
[2023-03-19 09:22:43] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 67/67 places, 76/76 transitions.
[2023-03-19 09:22:44] [INFO ] Flatten gal took : 6 ms
[2023-03-19 09:22:44] [INFO ] Flatten gal took : 6 ms
[2023-03-19 09:22:44] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 67/67 places, 76/76 transitions.
Applied a total of 0 rules in 6 ms. Remains 67 /67 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 67/67 places, 76/76 transitions.
[2023-03-19 09:22:44] [INFO ] Flatten gal took : 6 ms
[2023-03-19 09:22:44] [INFO ] Flatten gal took : 6 ms
[2023-03-19 09:22:44] [INFO ] Input system was already deterministic with 76 transitions.
[2023-03-19 09:22:44] [INFO ] Flatten gal took : 8 ms
[2023-03-19 09:22:44] [INFO ] Flatten gal took : 7 ms
[2023-03-19 09:22:44] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2023-03-19 09:22:44] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 67 places, 76 transitions and 532 arcs took 1 ms.
Total runtime 3503 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Solitaire-PT-EngCT7x7
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability
FORMULA Solitaire-PT-EngCT7x7-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Solitaire-PT-EngCT7x7-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Solitaire-PT-EngCT7x7-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Solitaire-PT-EngCT7x7-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Solitaire-PT-EngCT7x7-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Solitaire-PT-EngCT7x7-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Solitaire-PT-EngCT7x7-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Solitaire-PT-EngCT7x7-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Solitaire-PT-EngCT7x7-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Solitaire-PT-EngCT7x7-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Solitaire-PT-EngCT7x7-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Solitaire-PT-EngCT7x7-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Solitaire-PT-EngCT7x7-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679218087401
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:183
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 61 (type EXCL) for 3 Solitaire-PT-EngCT7x7-CTLFireability-01
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 61 (type EXCL) for Solitaire-PT-EngCT7x7-CTLFireability-01
lola: result : true
lola: markings : 25
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 31 (type EXCL) for 26 Solitaire-PT-EngCT7x7-CTLFireability-07
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 63 (type FNDP) for 26 Solitaire-PT-EngCT7x7-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type EQUN) for 26 Solitaire-PT-EngCT7x7-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 66 (type SRCH) for 26 Solitaire-PT-EngCT7x7-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 66 (type SRCH) for Solitaire-PT-EngCT7x7-CTLFireability-07
lola: result : unknown
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 63 (type FNDP) for Solitaire-PT-EngCT7x7-CTLFireability-07
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 64 (type EQUN) for Solitaire-PT-EngCT7x7-CTLFireability-07 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:703
sara: try reading problem file /home/mcc/execution/374/CTLFireability-64.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 64 (type EQUN) for Solitaire-PT-EngCT7x7-CTLFireability-07
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Solitaire-PT-EngCT7x7-CTLFireability-01: CONJ false state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Solitaire-PT-EngCT7x7-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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Solitaire-PT-EngCT7x7-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-07: CONJ 0 0 1 0 5 0 0 1
Solitaire-PT-EngCT7x7-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 5/240 2/32 Solitaire-PT-EngCT7x7-CTLFireability-07 362298 m, 72459 m/sec, 1547152 t fired, .
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lola: FINISHED task # 31 (type EXCL) for Solitaire-PT-EngCT7x7-CTLFireability-07
lola: result : true
lola: markings : 594141
lola: fired transitions : 2702063
lola: time used : 8.000000
lola: memory pages used : 3
lola: LAUNCH task # 56 (type EXCL) for 55 Solitaire-PT-EngCT7x7-CTLFireability-14
lola: time limit : 256 sec
lola: memory limit: 32 pages
lola: FINISHED task # 56 (type EXCL) for Solitaire-PT-EngCT7x7-CTLFireability-14
lola: result : true
lola: markings : 26
lola: fired transitions : 26
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 53 (type EXCL) for 52 Solitaire-PT-EngCT7x7-CTLFireability-13
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for Solitaire-PT-EngCT7x7-CTLFireability-13
lola: result : true
lola: markings : 25
lola: fired transitions : 26
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 50 (type EXCL) for 49 Solitaire-PT-EngCT7x7-CTLFireability-12
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for Solitaire-PT-EngCT7x7-CTLFireability-12
lola: result : true
lola: markings : 50
lola: fired transitions : 74
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 Solitaire-PT-EngCT7x7-CTLFireability-11
lola: time limit : 326 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for Solitaire-PT-EngCT7x7-CTLFireability-11
lola: result : false
lola: markings : 873
lola: fired transitions : 1854
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 Solitaire-PT-EngCT7x7-CTLFireability-10
lola: time limit : 359 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Solitaire-PT-EngCT7x7-CTLFireability-01: CONJ false state space / EG
Solitaire-PT-EngCT7x7-CTLFireability-07: CONJ true CONJ
Solitaire-PT-EngCT7x7-CTLFireability-11: CTL false CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-12: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-13: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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Solitaire-PT-EngCT7x7-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 2/359 1/32 Solitaire-PT-EngCT7x7-CTLFireability-10 146139 m, 29227 m/sec, 1229622 t fired, .
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Solitaire-PT-EngCT7x7-CTLFireability-01: CONJ false state space / EG
Solitaire-PT-EngCT7x7-CTLFireability-07: CONJ true CONJ
Solitaire-PT-EngCT7x7-CTLFireability-11: CTL false CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-12: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-13: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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Solitaire-PT-EngCT7x7-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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44 CTL EXCL 7/359 2/32 Solitaire-PT-EngCT7x7-CTLFireability-10 401089 m, 50990 m/sec, 4570541 t fired, .
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Solitaire-PT-EngCT7x7-CTLFireability-01: CONJ false state space / EG
Solitaire-PT-EngCT7x7-CTLFireability-07: CONJ true CONJ
Solitaire-PT-EngCT7x7-CTLFireability-11: CTL false CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-12: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-13: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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Solitaire-PT-EngCT7x7-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
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44 CTL EXCL 12/359 3/32 Solitaire-PT-EngCT7x7-CTLFireability-10 635780 m, 46938 m/sec, 7905813 t fired, .
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Solitaire-PT-EngCT7x7-CTLFireability-01: CONJ false state space / EG
Solitaire-PT-EngCT7x7-CTLFireability-07: CONJ true CONJ
Solitaire-PT-EngCT7x7-CTLFireability-11: CTL false CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-12: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-13: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-14: CTL true CTL model checker
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44 CTL EXCL 17/359 4/32 Solitaire-PT-EngCT7x7-CTLFireability-10 897760 m, 52396 m/sec, 11456795 t fired, .
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Solitaire-PT-EngCT7x7-CTLFireability-01: CONJ false state space / EG
Solitaire-PT-EngCT7x7-CTLFireability-07: CONJ true CONJ
Solitaire-PT-EngCT7x7-CTLFireability-11: CTL false CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-12: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-13: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-14: CTL true CTL model checker
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Solitaire-PT-EngCT7x7-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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44 CTL EXCL 22/359 5/32 Solitaire-PT-EngCT7x7-CTLFireability-10 1128275 m, 46103 m/sec, 14611884 t fired, .
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Solitaire-PT-EngCT7x7-CTLFireability-01: CONJ false state space / EG
Solitaire-PT-EngCT7x7-CTLFireability-07: CONJ true CONJ
Solitaire-PT-EngCT7x7-CTLFireability-11: CTL false CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-12: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-13: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-14: CTL true CTL model checker
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Solitaire-PT-EngCT7x7-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
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44 CTL EXCL 27/359 6/32 Solitaire-PT-EngCT7x7-CTLFireability-10 1357563 m, 45857 m/sec, 18053693 t fired, .
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Solitaire-PT-EngCT7x7-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
Solitaire-PT-EngCT7x7-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 135/427 32/32 Solitaire-PT-EngCT7x7-CTLFireability-05 7444090 m, 45922 m/sec, 55489451 t fired, .
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# running tasks: 1 of 4 Visible: 15
lola: CANCELED task # 24 (type EXCL) for Solitaire-PT-EngCT7x7-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Solitaire-PT-EngCT7x7-CTLFireability-01: CONJ false state space / EG
Solitaire-PT-EngCT7x7-CTLFireability-07: CONJ true CONJ
Solitaire-PT-EngCT7x7-CTLFireability-08: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-11: CTL false CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-12: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-13: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Solitaire-PT-EngCT7x7-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Solitaire-PT-EngCT7x7-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
Solitaire-PT-EngCT7x7-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
Solitaire-PT-EngCT7x7-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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# running tasks: 1 of 4 Visible: 15
lola: LAUNCH task # 21 (type EXCL) for 20 Solitaire-PT-EngCT7x7-CTLFireability-04
lola: time limit : 468 sec
lola: memory limit: 32 pages
lola: FINISHED task # 21 (type EXCL) for Solitaire-PT-EngCT7x7-CTLFireability-04
lola: result : false
lola: markings : 90
lola: fired transitions : 274
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 18 (type EXCL) for 17 Solitaire-PT-EngCT7x7-CTLFireability-03
lola: time limit : 546 sec
lola: memory limit: 32 pages
lola: FINISHED task # 18 (type EXCL) for Solitaire-PT-EngCT7x7-CTLFireability-03
lola: result : false
lola: markings : 96
lola: fired transitions : 379
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 15 (type EXCL) for 14 Solitaire-PT-EngCT7x7-CTLFireability-02
lola: time limit : 656 sec
lola: memory limit: 32 pages
lola: FINISHED task # 15 (type EXCL) for Solitaire-PT-EngCT7x7-CTLFireability-02
lola: result : false
lola: markings : 72432
lola: fired transitions : 104003
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 Solitaire-PT-EngCT7x7-CTLFireability-00
lola: time limit : 819 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for Solitaire-PT-EngCT7x7-CTLFireability-00
lola: result : true
lola: markings : 24995
lola: fired transitions : 112479
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 62 (type EXCL) for 36 Solitaire-PT-EngCT7x7-CTLFireability-09
lola: time limit : 1092 sec
lola: memory limit: 32 pages
lola: FINISHED task # 62 (type EXCL) for Solitaire-PT-EngCT7x7-CTLFireability-09
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 36 Solitaire-PT-EngCT7x7-CTLFireability-09
lola: time limit : 1639 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for Solitaire-PT-EngCT7x7-CTLFireability-09
lola: result : false
lola: markings : 28
lola: fired transitions : 27
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 59 (type EXCL) for 58 Solitaire-PT-EngCT7x7-CTLFireability-15
lola: time limit : 3278 sec
lola: memory limit: 32 pages
lola: FINISHED task # 59 (type EXCL) for Solitaire-PT-EngCT7x7-CTLFireability-15
lola: result : true
lola: markings : 25
lola: fired transitions : 76
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 15
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Solitaire-PT-EngCT7x7-CTLFireability-00: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-01: CONJ false state space / EG
Solitaire-PT-EngCT7x7-CTLFireability-02: CTL false CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-03: CTL false CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-04: CTL false CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-05: CTL unknown AGGR
Solitaire-PT-EngCT7x7-CTLFireability-07: CONJ true CONJ
Solitaire-PT-EngCT7x7-CTLFireability-08: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-09: CONJ false tscc_search
Solitaire-PT-EngCT7x7-CTLFireability-10: CTL unknown AGGR
Solitaire-PT-EngCT7x7-CTLFireability-11: CTL false CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-12: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-13: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-14: CTL true CTL model checker
Solitaire-PT-EngCT7x7-CTLFireability-15: CTL true CTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Solitaire-PT-EngCT7x7"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Solitaire-PT-EngCT7x7, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912647200306"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Solitaire-PT-EngCT7x7.tgz
mv Solitaire-PT-EngCT7x7 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;