About the Execution of LoLa+red for SmartHome-PT-03
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16223.699 | 139598.00 | 260701.00 | 8442.90 | ?FFFFTFFTFF?T?TT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r455-smll-167912647000169.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SmartHome-PT-03, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912647000169
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 540K
-rw-r--r-- 1 mcc users 7.7K Feb 26 05:47 CTLCardinality.txt
-rw-r--r-- 1 mcc users 92K Feb 26 05:47 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 26 05:44 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 26 05:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 17:09 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 17:09 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 17:09 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:09 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 05:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 141K Feb 26 05:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.9K Feb 26 05:48 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 81K Feb 26 05:48 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:09 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:09 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 31K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SmartHome-PT-03-CTLCardinality-00
FORMULA_NAME SmartHome-PT-03-CTLCardinality-01
FORMULA_NAME SmartHome-PT-03-CTLCardinality-02
FORMULA_NAME SmartHome-PT-03-CTLCardinality-03
FORMULA_NAME SmartHome-PT-03-CTLCardinality-04
FORMULA_NAME SmartHome-PT-03-CTLCardinality-05
FORMULA_NAME SmartHome-PT-03-CTLCardinality-06
FORMULA_NAME SmartHome-PT-03-CTLCardinality-07
FORMULA_NAME SmartHome-PT-03-CTLCardinality-08
FORMULA_NAME SmartHome-PT-03-CTLCardinality-09
FORMULA_NAME SmartHome-PT-03-CTLCardinality-10
FORMULA_NAME SmartHome-PT-03-CTLCardinality-11
FORMULA_NAME SmartHome-PT-03-CTLCardinality-12
FORMULA_NAME SmartHome-PT-03-CTLCardinality-13
FORMULA_NAME SmartHome-PT-03-CTLCardinality-14
FORMULA_NAME SmartHome-PT-03-CTLCardinality-15
=== Now, execution of the tool begins
BK_START 1679201531048
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmartHome-PT-03
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 04:52:14] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 04:52:14] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 04:52:15] [INFO ] Load time of PNML (sax parser for PT used): 91 ms
[2023-03-19 04:52:15] [INFO ] Transformed 45 places.
[2023-03-19 04:52:15] [INFO ] Transformed 145 transitions.
[2023-03-19 04:52:15] [INFO ] Found NUPN structural information;
[2023-03-19 04:52:15] [INFO ] Parsed PT model containing 45 places and 145 transitions and 405 arcs in 258 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 31 ms.
Ensure Unique test removed 77 transitions
Reduce redundant transitions removed 77 transitions.
FORMULA SmartHome-PT-03-CTLCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 42 out of 45 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 68/68 transitions.
Drop transitions removed 13 transitions
Redundant transition composition rules discarded 13 transitions
Iterating global reduction 0 with 13 rules applied. Total rules applied 13 place count 45 transition count 55
Applied a total of 13 rules in 27 ms. Remains 45 /45 variables (removed 0) and now considering 55/68 (removed 13) transitions.
[2023-03-19 04:52:15] [INFO ] Flow matrix only has 40 transitions (discarded 15 similar events)
// Phase 1: matrix 40 rows 45 cols
[2023-03-19 04:52:15] [INFO ] Computed 19 place invariants in 24 ms
[2023-03-19 04:52:15] [INFO ] Implicit Places using invariants in 338 ms returned []
[2023-03-19 04:52:15] [INFO ] Flow matrix only has 40 transitions (discarded 15 similar events)
[2023-03-19 04:52:15] [INFO ] Invariant cache hit.
[2023-03-19 04:52:15] [INFO ] State equation strengthened by 23 read => feed constraints.
[2023-03-19 04:52:15] [INFO ] Implicit Places using invariants and state equation in 150 ms returned []
Implicit Place search using SMT with State Equation took 548 ms to find 0 implicit places.
[2023-03-19 04:52:15] [INFO ] Flow matrix only has 40 transitions (discarded 15 similar events)
[2023-03-19 04:52:15] [INFO ] Invariant cache hit.
[2023-03-19 04:52:16] [INFO ] Dead Transitions using invariants and state equation in 166 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 45/45 places, 55/68 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 743 ms. Remains : 45/45 places, 55/68 transitions.
Support contains 42 out of 45 places after structural reductions.
[2023-03-19 04:52:16] [INFO ] Initial state reduction rules for CTL removed 3 formulas.
[2023-03-19 04:52:16] [INFO ] Flatten gal took : 44 ms
FORMULA SmartHome-PT-03-CTLCardinality-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmartHome-PT-03-CTLCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmartHome-PT-03-CTLCardinality-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 04:52:16] [INFO ] Flatten gal took : 17 ms
[2023-03-19 04:52:16] [INFO ] Input system was already deterministic with 55 transitions.
Support contains 38 out of 45 places (down from 42) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 814 ms. (steps per millisecond=12 ) properties (out of 36) seen :33
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-19 04:52:17] [INFO ] Flow matrix only has 40 transitions (discarded 15 similar events)
[2023-03-19 04:52:17] [INFO ] Invariant cache hit.
[2023-03-19 04:52:17] [INFO ] [Real]Absence check using 18 positive place invariants in 6 ms returned sat
[2023-03-19 04:52:17] [INFO ] [Real]Absence check using 18 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-19 04:52:17] [INFO ] After 111ms SMT Verify possible using all constraints in real domain returned unsat :3 sat :0
Fused 3 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 3 atomic propositions for a total of 12 simplifications.
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 6 ms
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 6 ms
[2023-03-19 04:52:17] [INFO ] Input system was already deterministic with 55 transitions.
Computed a total of 22 stabilizing places and 13 stable transitions
Graph (complete) has 120 edges and 45 vertex of which 44 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.3 ms
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 55/55 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 44 transition count 55
Discarding 7 places :
Symmetric choice reduction at 1 with 7 rule applications. Total rules 8 place count 37 transition count 48
Iterating global reduction 1 with 7 rules applied. Total rules applied 15 place count 37 transition count 48
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 1 with 3 rules applied. Total rules applied 18 place count 37 transition count 45
Applied a total of 18 rules in 8 ms. Remains 37 /45 variables (removed 8) and now considering 45/55 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 37/45 places, 45/55 transitions.
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 55/55 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 44 transition count 55
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 5 place count 40 transition count 51
Iterating global reduction 1 with 4 rules applied. Total rules applied 9 place count 40 transition count 51
Applied a total of 9 rules in 3 ms. Remains 40 /45 variables (removed 5) and now considering 51/55 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 40/45 places, 51/55 transitions.
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:52:17] [INFO ] Input system was already deterministic with 51 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 55/55 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 44 transition count 55
Discarding 7 places :
Symmetric choice reduction at 1 with 7 rule applications. Total rules 8 place count 37 transition count 48
Iterating global reduction 1 with 7 rules applied. Total rules applied 15 place count 37 transition count 48
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 17 place count 37 transition count 46
Applied a total of 17 rules in 5 ms. Remains 37 /45 variables (removed 8) and now considering 46/55 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 37/45 places, 46/55 transitions.
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:52:17] [INFO ] Input system was already deterministic with 46 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 55/55 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 38 transition count 48
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 38 transition count 48
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 0 with 3 rules applied. Total rules applied 17 place count 38 transition count 45
Applied a total of 17 rules in 3 ms. Remains 38 /45 variables (removed 7) and now considering 45/55 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 38/45 places, 45/55 transitions.
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 55/55 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 44 transition count 55
Discarding 7 places :
Symmetric choice reduction at 1 with 7 rule applications. Total rules 8 place count 37 transition count 48
Iterating global reduction 1 with 7 rules applied. Total rules applied 15 place count 37 transition count 48
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 1 with 3 rules applied. Total rules applied 18 place count 37 transition count 45
Applied a total of 18 rules in 3 ms. Remains 37 /45 variables (removed 8) and now considering 45/55 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 37/45 places, 45/55 transitions.
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 55/55 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 44 transition count 55
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 9 place count 36 transition count 47
Iterating global reduction 1 with 8 rules applied. Total rules applied 17 place count 36 transition count 47
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 1 with 3 rules applied. Total rules applied 20 place count 36 transition count 44
Applied a total of 20 rules in 3 ms. Remains 36 /45 variables (removed 9) and now considering 44/55 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 36/45 places, 44/55 transitions.
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:52:17] [INFO ] Input system was already deterministic with 44 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 55/55 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 44 transition count 55
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 5 place count 40 transition count 51
Iterating global reduction 1 with 4 rules applied. Total rules applied 9 place count 40 transition count 51
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 1 with 1 rules applied. Total rules applied 10 place count 40 transition count 50
Applied a total of 10 rules in 9 ms. Remains 40 /45 variables (removed 5) and now considering 50/55 (removed 5) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 40/45 places, 50/55 transitions.
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:52:17] [INFO ] Input system was already deterministic with 50 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 55/55 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 44 transition count 55
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 4 place count 41 transition count 52
Iterating global reduction 1 with 3 rules applied. Total rules applied 7 place count 41 transition count 52
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 1 with 1 rules applied. Total rules applied 8 place count 41 transition count 51
Applied a total of 8 rules in 2 ms. Remains 41 /45 variables (removed 4) and now considering 51/55 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 41/45 places, 51/55 transitions.
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:52:17] [INFO ] Input system was already deterministic with 51 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 55/55 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 44 transition count 55
Discarding 7 places :
Symmetric choice reduction at 1 with 7 rule applications. Total rules 8 place count 37 transition count 48
Iterating global reduction 1 with 7 rules applied. Total rules applied 15 place count 37 transition count 48
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 17 place count 37 transition count 46
Applied a total of 17 rules in 3 ms. Remains 37 /45 variables (removed 8) and now considering 46/55 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 37/45 places, 46/55 transitions.
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:52:17] [INFO ] Input system was already deterministic with 46 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 45/45 places, 55/55 transitions.
Graph (trivial) has 28 edges and 45 vertex of which 4 / 45 are part of one of the 2 SCC in 4 ms
Free SCC test removed 2 places
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Graph (complete) has 116 edges and 43 vertex of which 42 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.1 ms
Discarding 1 places :
Also discarding 0 output transitions
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 8 place count 36 transition count 45
Iterating global reduction 0 with 6 rules applied. Total rules applied 14 place count 36 transition count 45
Performed 9 Post agglomeration using F-continuation condition.Transition count delta: 9
Deduced a syphon composed of 9 places in 0 ms
Reduce places removed 9 places and 0 transitions.
Iterating global reduction 0 with 18 rules applied. Total rules applied 32 place count 27 transition count 36
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 35 place count 24 transition count 30
Iterating global reduction 0 with 3 rules applied. Total rules applied 38 place count 24 transition count 30
Drop transitions removed 7 transitions
Redundant transition composition rules discarded 7 transitions
Iterating global reduction 0 with 7 rules applied. Total rules applied 45 place count 24 transition count 23
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 46 place count 23 transition count 23
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 47 place count 22 transition count 22
Iterating global reduction 1 with 1 rules applied. Total rules applied 48 place count 22 transition count 22
Applied a total of 48 rules in 30 ms. Remains 22 /45 variables (removed 23) and now considering 22/55 (removed 33) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 30 ms. Remains : 22/45 places, 22/55 transitions.
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 1 ms
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 1 ms
[2023-03-19 04:52:17] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 45/45 places, 55/55 transitions.
Graph (trivial) has 31 edges and 45 vertex of which 6 / 45 are part of one of the 3 SCC in 0 ms
Free SCC test removed 3 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Graph (complete) has 114 edges and 42 vertex of which 41 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.1 ms
Discarding 1 places :
Also discarding 0 output transitions
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 6 place count 37 transition count 45
Iterating global reduction 0 with 4 rules applied. Total rules applied 10 place count 37 transition count 45
Performed 10 Post agglomeration using F-continuation condition.Transition count delta: 10
Deduced a syphon composed of 10 places in 0 ms
Reduce places removed 10 places and 0 transitions.
Iterating global reduction 0 with 20 rules applied. Total rules applied 30 place count 27 transition count 35
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 34 place count 23 transition count 27
Iterating global reduction 0 with 4 rules applied. Total rules applied 38 place count 23 transition count 27
Drop transitions removed 6 transitions
Redundant transition composition rules discarded 6 transitions
Iterating global reduction 0 with 6 rules applied. Total rules applied 44 place count 23 transition count 21
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 45 place count 22 transition count 21
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 46 place count 21 transition count 20
Iterating global reduction 1 with 1 rules applied. Total rules applied 47 place count 21 transition count 20
Applied a total of 47 rules in 10 ms. Remains 21 /45 variables (removed 24) and now considering 20/55 (removed 35) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 21/45 places, 20/55 transitions.
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 1 ms
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:52:17] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 55/55 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 44 transition count 55
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 7 place count 38 transition count 49
Iterating global reduction 1 with 6 rules applied. Total rules applied 13 place count 38 transition count 49
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 15 place count 38 transition count 47
Applied a total of 15 rules in 4 ms. Remains 38 /45 variables (removed 7) and now considering 47/55 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 38/45 places, 47/55 transitions.
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:52:17] [INFO ] Input system was already deterministic with 47 transitions.
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:52:18] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 4 ms.
[2023-03-19 04:52:18] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 45 places, 55 transitions and 173 arcs took 1 ms.
Total runtime 3111 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SmartHome-PT-03
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/377
FORMULA SmartHome-PT-03-CTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmartHome-PT-03-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmartHome-PT-03-CTLCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmartHome-PT-03-CTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmartHome-PT-03-CTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmartHome-PT-03-CTLCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmartHome-PT-03-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmartHome-PT-03-CTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmartHome-PT-03-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679201670646
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/377/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/377/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/377/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:287
lola: rewrite Frontend/Parser/formula_rewrite.k:233
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:287
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:463
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 7 (type EXCL) for 6 SmartHome-PT-03-CTLCardinality-02
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:742
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 37 (type FNDP) for 0 SmartHome-PT-03-CTLCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 7 (type EXCL) for SmartHome-PT-03-CTLCardinality-02
lola: result : false
lola: markings : 259201
lola: fired transitions : 5953538
lola: time used : 4.000000
lola: memory pages used : 2
lola: LAUNCH task # 34 (type EXCL) for 33 SmartHome-PT-03-CTLCardinality-15
lola: time limit : 326 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for SmartHome-PT-03-CTLCardinality-15
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 SmartHome-PT-03-CTLCardinality-10
lola: time limit : 359 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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SmartHome-PT-03-CTLCardinality-11: EFAGEF 0 1 0 0 1 0 0 0
SmartHome-PT-03-CTLCardinality-13: EGEF 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 1/359 1/32 SmartHome-PT-03-CTLCardinality-10 84752 m, 16950 m/sec, 2067661 t fired, .
37 EF DL FNDP 5/3600 0/5 SmartHome-PT-03-CTLCardinality-00 69921556 t fired, 70 attempts, .
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lola: FINISHED task # 25 (type EXCL) for SmartHome-PT-03-CTLCardinality-10
lola: result : false
lola: markings : 259201
lola: fired transitions : 6501300
lola: time used : 4.000000
lola: memory pages used : 2
lola: LAUNCH task # 22 (type EXCL) for 21 SmartHome-PT-03-CTLCardinality-07
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for SmartHome-PT-03-CTLCardinality-07
lola: result : false
lola: markings : 216000
lola: fired transitions : 2648496
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 SmartHome-PT-03-CTLCardinality-06
lola: time limit : 448 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for SmartHome-PT-03-CTLCardinality-06
lola: result : false
lola: markings : 97201
lola: fired transitions : 718038
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 SmartHome-PT-03-CTLCardinality-05
lola: time limit : 513 sec
lola: memory limit: 32 pages
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SmartHome-PT-03-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
SmartHome-PT-03-CTLCardinality-11: EFAGEF 0 1 0 0 1 0 0 0
SmartHome-PT-03-CTLCardinality-13: EGEF 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 1/513 1/32 SmartHome-PT-03-CTLCardinality-05 37167 m, 7433 m/sec, 765807 t fired, .
37 EF DL FNDP 10/3600 0/5 SmartHome-PT-03-CTLCardinality-00 146153351 t fired, 147 attempts, .
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lola: FINISHED task # 16 (type EXCL) for SmartHome-PT-03-CTLCardinality-05
lola: result : true
lola: markings : 259201
lola: fired transitions : 5953537
lola: time used : 4.000000
lola: memory pages used : 2
lola: LAUNCH task # 13 (type EXCL) for 12 SmartHome-PT-03-CTLCardinality-04
lola: time limit : 597 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for SmartHome-PT-03-CTLCardinality-04
lola: result : false
lola: markings : 59401
lola: fired transitions : 326617
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 SmartHome-PT-03-CTLCardinality-03
lola: time limit : 717 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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SmartHome-PT-03-CTLCardinality-11: EFAGEF 0 1 0 0 1 0 0 0
SmartHome-PT-03-CTLCardinality-13: EGEF 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 2/717 1/32 SmartHome-PT-03-CTLCardinality-03 166082 m, 33216 m/sec, 3734402 t fired, .
37 EF DL FNDP 15/3600 0/5 SmartHome-PT-03-CTLCardinality-00 223689600 t fired, 224 attempts, .
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lola: FINISHED task # 10 (type EXCL) for SmartHome-PT-03-CTLCardinality-03
lola: result : false
lola: markings : 259200
lola: fired transitions : 5953538
lola: time used : 3.000000
lola: memory pages used : 2
lola: LAUNCH task # 4 (type EXCL) for 3 SmartHome-PT-03-CTLCardinality-01
lola: time limit : 896 sec
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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SmartHome-PT-03-CTLCardinality-11: EFAGEF 0 1 0 0 1 0 0 0
SmartHome-PT-03-CTLCardinality-13: EGEF 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 4/896 2/32 SmartHome-PT-03-CTLCardinality-01 259201 m, 51840 m/sec, 6348155 t fired, .
37 EF DL FNDP 20/3600 0/5 SmartHome-PT-03-CTLCardinality-00 301962007 t fired, 302 attempts, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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SmartHome-PT-03-CTLCardinality-13: EGEF 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 9/896 2/32 SmartHome-PT-03-CTLCardinality-01 259201 m, 0 m/sec, 13801275 t fired, .
37 EF DL FNDP 25/3600 0/5 SmartHome-PT-03-CTLCardinality-00 379463266 t fired, 380 attempts, .
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lola: FINISHED task # 4 (type EXCL) for SmartHome-PT-03-CTLCardinality-01
lola: result : false
lola: markings : 259201
lola: fired transitions : 14778608
lola: time used : 10.000000
lola: memory pages used : 2
lola: LAUNCH task # 36 (type EXCL) for 0 SmartHome-PT-03-CTLCardinality-00
lola: time limit : 1191 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 EF DL EXCL 4/1191 1/32 SmartHome-PT-03-CTLCardinality-00 24931220 m, 4986244 m/sec, 24931219 t fired, .
37 EF DL FNDP 30/3600 0/5 SmartHome-PT-03-CTLCardinality-00 456624354 t fired, 457 attempts, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 EF DL EXCL 9/1191 1/32 SmartHome-PT-03-CTLCardinality-00 53745182 m, 5762792 m/sec, 53745181 t fired, .
37 EF DL FNDP 35/3600 0/5 SmartHome-PT-03-CTLCardinality-00 533783997 t fired, 534 attempts, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 EF DL EXCL 14/1191 1/32 SmartHome-PT-03-CTLCardinality-00 82588307 m, 5768625 m/sec, 82588307 t fired, .
37 EF DL FNDP 40/3600 0/5 SmartHome-PT-03-CTLCardinality-00 610837549 t fired, 611 attempts, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 EF DL EXCL 19/1191 1/32 SmartHome-PT-03-CTLCardinality-00 111539804 m, 5790299 m/sec, 111539803 t fired, .
37 EF DL FNDP 45/3600 0/5 SmartHome-PT-03-CTLCardinality-00 687998512 t fired, 688 attempts, .
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36 EF DL EXCL 24/1191 1/32 SmartHome-PT-03-CTLCardinality-00 140460034 m, 5784046 m/sec, 140460034 t fired, .
37 EF DL FNDP 50/3600 0/5 SmartHome-PT-03-CTLCardinality-00 765205502 t fired, 766 attempts, .
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36 EF DL EXCL 29/1191 1/32 SmartHome-PT-03-CTLCardinality-00 169371835 m, 5782360 m/sec, 169371835 t fired, .
37 EF DL FNDP 55/3600 0/5 SmartHome-PT-03-CTLCardinality-00 842461625 t fired, 843 attempts, .
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36 EF DL EXCL 34/1191 1/32 SmartHome-PT-03-CTLCardinality-00 198222496 m, 5770132 m/sec, 198222495 t fired, .
37 EF DL FNDP 60/3600 0/5 SmartHome-PT-03-CTLCardinality-00 919705061 t fired, 920 attempts, .
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36 EF DL EXCL 39/1191 1/32 SmartHome-PT-03-CTLCardinality-00 227166921 m, 5788885 m/sec, 227166920 t fired, .
37 EF DL FNDP 65/3600 0/5 SmartHome-PT-03-CTLCardinality-00 996974965 t fired, 997 attempts, .
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36 EF DL EXCL 44/1191 1/32 SmartHome-PT-03-CTLCardinality-00 256220178 m, 5810651 m/sec, 256220177 t fired, .
37 EF DL FNDP 70/3600 0/5 SmartHome-PT-03-CTLCardinality-00 1074332436 t fired, 1075 attempts, .
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36 EF DL EXCL 49/1191 1/32 SmartHome-PT-03-CTLCardinality-00 285288638 m, 5813692 m/sec, 285288638 t fired, .
37 EF DL FNDP 75/3600 0/5 SmartHome-PT-03-CTLCardinality-00 1151666343 t fired, 1152 attempts, .
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36 EF DL EXCL 54/1191 1/32 SmartHome-PT-03-CTLCardinality-00 314023632 m, 5746998 m/sec, 314023632 t fired, .
37 EF DL FNDP 80/3600 0/5 SmartHome-PT-03-CTLCardinality-00 1228736990 t fired, 1229 attempts, .
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36 EF DL EXCL 59/1191 1/32 SmartHome-PT-03-CTLCardinality-00 338735170 m, 4942307 m/sec, 338735169 t fired, .
37 EF DL FNDP 85/3600 0/5 SmartHome-PT-03-CTLCardinality-00 1304528061 t fired, 1305 attempts, .
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36 EF DL EXCL 66/1191 1/32 SmartHome-PT-03-CTLCardinality-00 352264271 m, 2705820 m/sec, 352264270 t fired, .
37 EF DL FNDP 92/3600 0/5 SmartHome-PT-03-CTLCardinality-00 1400239705 t fired, 1401 attempts, .
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36 EF DL EXCL 71/1191 1/32 SmartHome-PT-03-CTLCardinality-00 362107079 m, 1968561 m/sec, 362107079 t fired, .
37 EF DL FNDP 97/3600 0/5 SmartHome-PT-03-CTLCardinality-00 1464733857 t fired, 1465 attempts, .
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36 EF DL EXCL 76/1191 1/32 SmartHome-PT-03-CTLCardinality-00 371541787 m, 1886941 m/sec, 371541786 t fired, .
37 EF DL FNDP 102/3600 0/5 SmartHome-PT-03-CTLCardinality-00 1536007423 t fired, 1537 attempts, .
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36 EF DL EXCL 82/1191 1/32 SmartHome-PT-03-CTLCardinality-00 381360126 m, 1963667 m/sec, 381360125 t fired, .
37 EF DL FNDP 108/3600 0/5 SmartHome-PT-03-CTLCardinality-00 1607004886 t fired, 1608 attempts, .
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36 EF DL EXCL 87/1191 1/32 SmartHome-PT-03-CTLCardinality-00 391274498 m, 1982874 m/sec, 391274497 t fired, .
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36 EF DL EXCL 95/1191 1/32 SmartHome-PT-03-CTLCardinality-00 409005857 m, 3546271 m/sec, 409005856 t fired, .
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36 EF DL EXCL 103/1191 1/32 SmartHome-PT-03-CTLCardinality-00 426220223 m, 3442873 m/sec, 426220222 t fired, .
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/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 472 Killed lola --conf=$BIN_DIR/configfiles/ctlcardinalityconf --formula=$DIR/CTLCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmartHome-PT-03"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SmartHome-PT-03, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912647000169"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SmartHome-PT-03.tgz
mv SmartHome-PT-03 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;