fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r455-smll-167912647000161
Last Updated
May 14, 2023

About the Execution of LoLa+red for SmartHome-PT-02

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
250.611 12654.00 21009.00 506.50 FFFTFFTTFTTFTFTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r455-smll-167912647000161.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SmartHome-PT-02, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912647000161
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 544K
-rw-r--r-- 1 mcc users 5.8K Feb 26 05:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 62K Feb 26 05:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Feb 26 05:46 CTLFireability.txt
-rw-r--r-- 1 mcc users 63K Feb 26 05:46 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 17:08 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 17:08 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 17:08 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 17:08 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 05:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 164K Feb 26 05:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.9K Feb 26 05:52 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 91K Feb 26 05:52 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:08 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:08 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 27K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmartHome-PT-02-CTLCardinality-00
FORMULA_NAME SmartHome-PT-02-CTLCardinality-01
FORMULA_NAME SmartHome-PT-02-CTLCardinality-02
FORMULA_NAME SmartHome-PT-02-CTLCardinality-03
FORMULA_NAME SmartHome-PT-02-CTLCardinality-04
FORMULA_NAME SmartHome-PT-02-CTLCardinality-05
FORMULA_NAME SmartHome-PT-02-CTLCardinality-06
FORMULA_NAME SmartHome-PT-02-CTLCardinality-07
FORMULA_NAME SmartHome-PT-02-CTLCardinality-08
FORMULA_NAME SmartHome-PT-02-CTLCardinality-09
FORMULA_NAME SmartHome-PT-02-CTLCardinality-10
FORMULA_NAME SmartHome-PT-02-CTLCardinality-11
FORMULA_NAME SmartHome-PT-02-CTLCardinality-12
FORMULA_NAME SmartHome-PT-02-CTLCardinality-13
FORMULA_NAME SmartHome-PT-02-CTLCardinality-14
FORMULA_NAME SmartHome-PT-02-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1679201355706

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmartHome-PT-02
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 04:49:19] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 04:49:19] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 04:49:19] [INFO ] Load time of PNML (sax parser for PT used): 86 ms
[2023-03-19 04:49:19] [INFO ] Transformed 41 places.
[2023-03-19 04:49:19] [INFO ] Transformed 127 transitions.
[2023-03-19 04:49:19] [INFO ] Found NUPN structural information;
[2023-03-19 04:49:19] [INFO ] Parsed PT model containing 41 places and 127 transitions and 359 arcs in 221 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 26 ms.
Initial state reduction rules removed 1 formulas.
Ensure Unique test removed 66 transitions
Reduce redundant transitions removed 66 transitions.
FORMULA SmartHome-PT-02-CTLCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 35 out of 41 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 61/61 transitions.
Drop transitions removed 12 transitions
Redundant transition composition rules discarded 12 transitions
Iterating global reduction 0 with 12 rules applied. Total rules applied 12 place count 41 transition count 49
Applied a total of 12 rules in 28 ms. Remains 41 /41 variables (removed 0) and now considering 49/61 (removed 12) transitions.
[2023-03-19 04:49:19] [INFO ] Flow matrix only has 36 transitions (discarded 13 similar events)
// Phase 1: matrix 36 rows 41 cols
[2023-03-19 04:49:19] [INFO ] Computed 17 place invariants in 6 ms
[2023-03-19 04:49:20] [INFO ] Implicit Places using invariants in 271 ms returned []
[2023-03-19 04:49:20] [INFO ] Flow matrix only has 36 transitions (discarded 13 similar events)
[2023-03-19 04:49:20] [INFO ] Invariant cache hit.
[2023-03-19 04:49:20] [INFO ] State equation strengthened by 22 read => feed constraints.
[2023-03-19 04:49:20] [INFO ] Implicit Places using invariants and state equation in 122 ms returned []
Implicit Place search using SMT with State Equation took 449 ms to find 0 implicit places.
[2023-03-19 04:49:20] [INFO ] Flow matrix only has 36 transitions (discarded 13 similar events)
[2023-03-19 04:49:20] [INFO ] Invariant cache hit.
[2023-03-19 04:49:20] [INFO ] Dead Transitions using invariants and state equation in 133 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 41/41 places, 49/61 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 614 ms. Remains : 41/41 places, 49/61 transitions.
Support contains 35 out of 41 places after structural reductions.
[2023-03-19 04:49:20] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-19 04:49:20] [INFO ] Flatten gal took : 50 ms
FORMULA SmartHome-PT-02-CTLCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 04:49:20] [INFO ] Flatten gal took : 22 ms
[2023-03-19 04:49:20] [INFO ] Input system was already deterministic with 49 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 921 ms. (steps per millisecond=10 ) properties (out of 44) seen :40
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 76 ms. (steps per millisecond=131 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 68 ms. (steps per millisecond=147 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
[2023-03-19 04:49:22] [INFO ] Flow matrix only has 36 transitions (discarded 13 similar events)
[2023-03-19 04:49:22] [INFO ] Invariant cache hit.
[2023-03-19 04:49:22] [INFO ] [Real]Absence check using 16 positive place invariants in 6 ms returned sat
[2023-03-19 04:49:22] [INFO ] [Real]Absence check using 16 positive and 1 generalized place invariants in 0 ms returned sat
[2023-03-19 04:49:22] [INFO ] After 124ms SMT Verify possible using all constraints in real domain returned unsat :4 sat :0
Fused 4 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 4 atomic propositions for a total of 13 simplifications.
FORMULA SmartHome-PT-02-CTLCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 04:49:22] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 7 ms
FORMULA SmartHome-PT-02-CTLCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 6 ms
[2023-03-19 04:49:22] [INFO ] Input system was already deterministic with 49 transitions.
Support contains 28 out of 41 places (down from 29) after GAL structural reductions.
Computed a total of 21 stabilizing places and 13 stable transitions
Graph (complete) has 110 edges and 41 vertex of which 40 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.3 ms
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 40 transition count 49
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 7 place count 34 transition count 43
Iterating global reduction 1 with 6 rules applied. Total rules applied 13 place count 34 transition count 43
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 15 place count 34 transition count 41
Applied a total of 15 rules in 11 ms. Remains 34 /41 variables (removed 7) and now considering 41/49 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 34/41 places, 41/49 transitions.
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 6 ms
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:49:22] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 40 transition count 49
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 7 place count 34 transition count 43
Iterating global reduction 1 with 6 rules applied. Total rules applied 13 place count 34 transition count 43
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 15 place count 34 transition count 41
Applied a total of 15 rules in 7 ms. Remains 34 /41 variables (removed 7) and now considering 41/49 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 34/41 places, 41/49 transitions.
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:49:22] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 40 transition count 49
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 7 place count 34 transition count 43
Iterating global reduction 1 with 6 rules applied. Total rules applied 13 place count 34 transition count 43
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 15 place count 34 transition count 41
Applied a total of 15 rules in 7 ms. Remains 34 /41 variables (removed 7) and now considering 41/49 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 34/41 places, 41/49 transitions.
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:49:22] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 40 transition count 49
Discarding 5 places :
Symmetric choice reduction at 1 with 5 rule applications. Total rules 6 place count 35 transition count 44
Iterating global reduction 1 with 5 rules applied. Total rules applied 11 place count 35 transition count 44
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 13 place count 35 transition count 42
Applied a total of 13 rules in 6 ms. Remains 35 /41 variables (removed 6) and now considering 42/49 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 35/41 places, 42/49 transitions.
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:49:22] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Graph (trivial) has 24 edges and 41 vertex of which 4 / 41 are part of one of the 2 SCC in 4 ms
Free SCC test removed 2 places
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Graph (complete) has 106 edges and 39 vertex of which 38 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.1 ms
Discarding 1 places :
Also discarding 0 output transitions
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 6 place count 34 transition count 41
Iterating global reduction 0 with 4 rules applied. Total rules applied 10 place count 34 transition count 41
Performed 7 Post agglomeration using F-continuation condition.Transition count delta: 7
Deduced a syphon composed of 7 places in 0 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 0 with 14 rules applied. Total rules applied 24 place count 27 transition count 34
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 26 place count 25 transition count 30
Iterating global reduction 0 with 2 rules applied. Total rules applied 28 place count 25 transition count 30
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 0 with 5 rules applied. Total rules applied 33 place count 25 transition count 25
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 34 place count 24 transition count 24
Iterating global reduction 0 with 1 rules applied. Total rules applied 35 place count 24 transition count 24
Applied a total of 35 rules in 34 ms. Remains 24 /41 variables (removed 17) and now considering 24/49 (removed 25) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 35 ms. Remains : 24/41 places, 24/49 transitions.
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:49:22] [INFO ] Input system was already deterministic with 24 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 40 transition count 49
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 7 place count 34 transition count 43
Iterating global reduction 1 with 6 rules applied. Total rules applied 13 place count 34 transition count 43
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 15 place count 34 transition count 41
Applied a total of 15 rules in 6 ms. Remains 34 /41 variables (removed 7) and now considering 41/49 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 34/41 places, 41/49 transitions.
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:49:22] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 35 transition count 43
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 35 transition count 43
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 0 with 2 rules applied. Total rules applied 14 place count 35 transition count 41
Applied a total of 14 rules in 5 ms. Remains 35 /41 variables (removed 6) and now considering 41/49 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 35/41 places, 41/49 transitions.
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 16 ms
[2023-03-19 04:49:22] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 40 transition count 49
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 4 place count 37 transition count 46
Iterating global reduction 1 with 3 rules applied. Total rules applied 7 place count 37 transition count 46
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 9 place count 37 transition count 44
Applied a total of 9 rules in 5 ms. Remains 37 /41 variables (removed 4) and now considering 44/49 (removed 5) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 37/41 places, 44/49 transitions.
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:49:22] [INFO ] Input system was already deterministic with 44 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 37 transition count 45
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 37 transition count 45
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 9 place count 37 transition count 44
Applied a total of 9 rules in 4 ms. Remains 37 /41 variables (removed 4) and now considering 44/49 (removed 5) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 37/41 places, 44/49 transitions.
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:49:22] [INFO ] Input system was already deterministic with 44 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 40 transition count 49
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 7 place count 34 transition count 43
Iterating global reduction 1 with 6 rules applied. Total rules applied 13 place count 34 transition count 43
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 15 place count 34 transition count 41
Applied a total of 15 rules in 5 ms. Remains 34 /41 variables (removed 7) and now considering 41/49 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 34/41 places, 41/49 transitions.
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:49:22] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Graph (trivial) has 24 edges and 41 vertex of which 4 / 41 are part of one of the 2 SCC in 0 ms
Free SCC test removed 2 places
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Graph (complete) has 106 edges and 39 vertex of which 38 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.1 ms
Discarding 1 places :
Also discarding 0 output transitions
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 6 place count 34 transition count 41
Iterating global reduction 0 with 4 rules applied. Total rules applied 10 place count 34 transition count 41
Performed 7 Post agglomeration using F-continuation condition.Transition count delta: 7
Deduced a syphon composed of 7 places in 0 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 0 with 14 rules applied. Total rules applied 24 place count 27 transition count 34
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 27 place count 24 transition count 28
Iterating global reduction 0 with 3 rules applied. Total rules applied 30 place count 24 transition count 28
Drop transitions removed 4 transitions
Redundant transition composition rules discarded 4 transitions
Iterating global reduction 0 with 4 rules applied. Total rules applied 34 place count 24 transition count 24
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 35 place count 23 transition count 23
Iterating global reduction 0 with 1 rules applied. Total rules applied 36 place count 23 transition count 23
Applied a total of 36 rules in 16 ms. Remains 23 /41 variables (removed 18) and now considering 23/49 (removed 26) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 23/41 places, 23/49 transitions.
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:49:22] [INFO ] Input system was already deterministic with 23 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 49/49 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 40 transition count 49
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 5 place count 36 transition count 45
Iterating global reduction 1 with 4 rules applied. Total rules applied 9 place count 36 transition count 45
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 11 place count 36 transition count 43
Applied a total of 11 rules in 6 ms. Remains 36 /41 variables (removed 5) and now considering 43/49 (removed 6) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 36/41 places, 43/49 transitions.
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:49:22] [INFO ] Input system was already deterministic with 43 transitions.
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:49:22] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:49:22] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 3 ms.
[2023-03-19 04:49:22] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 41 places, 49 transitions and 157 arcs took 1 ms.
Total runtime 3354 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SmartHome-PT-02
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375

FORMULA SmartHome-PT-02-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-02-CTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-02-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-02-CTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-02-CTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-02-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-02-CTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-02-CTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-02-CTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-02-CTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-02-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-02-CTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679201368360

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 10 (type EXCL) for 9 SmartHome-PT-02-CTLCardinality-05
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:779
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 10 (type EXCL) for SmartHome-PT-02-CTLCardinality-05
lola: result : false
lola: markings : 86401
lola: fired transitions : 1823809
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 SmartHome-PT-02-CTLCardinality-15
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for SmartHome-PT-02-CTLCardinality-15
lola: result : false
lola: markings : 32401
lola: fired transitions : 400689
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 SmartHome-PT-02-CTLCardinality-12
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for SmartHome-PT-02-CTLCardinality-12
lola: result : true
lola: markings : 83194
lola: fired transitions : 1772269
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 SmartHome-PT-02-CTLCardinality-11
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for SmartHome-PT-02-CTLCardinality-11
lola: result : false
lola: markings : 50401
lola: fired transitions : 474575
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 21 SmartHome-PT-02-CTLCardinality-09
lola: time limit : 326 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for SmartHome-PT-02-CTLCardinality-09
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 21 SmartHome-PT-02-CTLCardinality-09
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for SmartHome-PT-02-CTLCardinality-09
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 SmartHome-PT-02-CTLCardinality-08
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for SmartHome-PT-02-CTLCardinality-08
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 SmartHome-PT-02-CTLCardinality-04
lola: time limit : 513 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for SmartHome-PT-02-CTLCardinality-04
lola: result : false
lola: markings : 78
lola: fired transitions : 737
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 SmartHome-PT-02-CTLCardinality-03
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for SmartHome-PT-02-CTLCardinality-03
lola: result : true
lola: markings : 49782
lola: fired transitions : 347369
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 SmartHome-PT-02-CTLCardinality-00
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for SmartHome-PT-02-CTLCardinality-00
lola: result : false
lola: markings : 86400
lola: fired transitions : 1877884
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 15 SmartHome-PT-02-CTLCardinality-07
lola: time limit : 898 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for SmartHome-PT-02-CTLCardinality-07
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 21 SmartHome-PT-02-CTLCardinality-09
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for SmartHome-PT-02-CTLCardinality-09
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 SmartHome-PT-02-CTLCardinality-06
lola: time limit : 1797 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for SmartHome-PT-02-CTLCardinality-06
lola: result : true
lola: markings : 301
lola: fired transitions : 7338
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 SmartHome-PT-02-CTLCardinality-14
lola: time limit : 3595 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for SmartHome-PT-02-CTLCardinality-14
lola: result : true
lola: markings : 2
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmartHome-PT-02-CTLCardinality-00: CTL false CTL model checker
SmartHome-PT-02-CTLCardinality-03: CTL true CTL model checker
SmartHome-PT-02-CTLCardinality-04: CTL false CTL model checker
SmartHome-PT-02-CTLCardinality-05: CTL false CTL model checker
SmartHome-PT-02-CTLCardinality-06: CTL true CTL model checker
SmartHome-PT-02-CTLCardinality-07: EFAG true tscc_search
SmartHome-PT-02-CTLCardinality-08: EXEF false state space /EXEF
SmartHome-PT-02-CTLCardinality-09: CONJ true CONJ
SmartHome-PT-02-CTLCardinality-11: CTL false CTL model checker
SmartHome-PT-02-CTLCardinality-12: CTL true CTL model checker
SmartHome-PT-02-CTLCardinality-14: CTL true CTL model checker
SmartHome-PT-02-CTLCardinality-15: CTL false CTL model checker


Time elapsed: 5 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmartHome-PT-02"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SmartHome-PT-02, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912647000161"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmartHome-PT-02.tgz
mv SmartHome-PT-02 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;