Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r455-smll-167912647000154.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SmartHome-PT-01, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912647000154
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 488K
-rw-r--r-- 1 mcc users 6.8K Feb 26 05:46 CTLCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 26 05:46 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.2K Feb 26 05:44 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 26 05:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.2K Feb 25 17:08 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 17:08 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 17:08 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:08 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 05:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 124K Feb 26 05:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Feb 26 05:48 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 80K Feb 26 05:48 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:08 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:08 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 25K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmartHome-PT-01-CTLFireability-00
FORMULA_NAME SmartHome-PT-01-CTLFireability-01
FORMULA_NAME SmartHome-PT-01-CTLFireability-02
FORMULA_NAME SmartHome-PT-01-CTLFireability-03
FORMULA_NAME SmartHome-PT-01-CTLFireability-04
FORMULA_NAME SmartHome-PT-01-CTLFireability-05
FORMULA_NAME SmartHome-PT-01-CTLFireability-06
FORMULA_NAME SmartHome-PT-01-CTLFireability-07
FORMULA_NAME SmartHome-PT-01-CTLFireability-08
FORMULA_NAME SmartHome-PT-01-CTLFireability-09
FORMULA_NAME SmartHome-PT-01-CTLFireability-10
FORMULA_NAME SmartHome-PT-01-CTLFireability-11
FORMULA_NAME SmartHome-PT-01-CTLFireability-12
FORMULA_NAME SmartHome-PT-01-CTLFireability-13
FORMULA_NAME SmartHome-PT-01-CTLFireability-14
FORMULA_NAME SmartHome-PT-01-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679201206353

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmartHome-PT-01
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 04:46:49] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 04:46:49] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 04:46:50] [INFO ] Load time of PNML (sax parser for PT used): 81 ms
[2023-03-19 04:46:50] [INFO ] Transformed 38 places.
[2023-03-19 04:46:50] [INFO ] Transformed 113 transitions.
[2023-03-19 04:46:50] [INFO ] Found NUPN structural information;
[2023-03-19 04:46:50] [INFO ] Parsed PT model containing 38 places and 113 transitions and 321 arcs in 227 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 22 ms.
Initial state reduction rules removed 4 formulas.
Ensure Unique test removed 58 transitions
Reduce redundant transitions removed 58 transitions.
FORMULA SmartHome-PT-01-CTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmartHome-PT-01-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmartHome-PT-01-CTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmartHome-PT-01-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 30 out of 38 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 55/55 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 37 transition count 54
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 37 transition count 54
Drop transitions removed 10 transitions
Redundant transition composition rules discarded 10 transitions
Iterating global reduction 0 with 10 rules applied. Total rules applied 12 place count 37 transition count 44
Applied a total of 12 rules in 30 ms. Remains 37 /38 variables (removed 1) and now considering 44/55 (removed 11) transitions.
[2023-03-19 04:46:50] [INFO ] Flow matrix only has 33 transitions (discarded 11 similar events)
// Phase 1: matrix 33 rows 37 cols
[2023-03-19 04:46:50] [INFO ] Computed 15 place invariants in 10 ms
[2023-03-19 04:46:50] [INFO ] Implicit Places using invariants in 293 ms returned []
[2023-03-19 04:46:50] [INFO ] Flow matrix only has 33 transitions (discarded 11 similar events)
[2023-03-19 04:46:50] [INFO ] Invariant cache hit.
[2023-03-19 04:46:50] [INFO ] State equation strengthened by 20 read => feed constraints.
[2023-03-19 04:46:50] [INFO ] Implicit Places using invariants and state equation in 135 ms returned []
Implicit Place search using SMT with State Equation took 486 ms to find 0 implicit places.
[2023-03-19 04:46:50] [INFO ] Flow matrix only has 33 transitions (discarded 11 similar events)
[2023-03-19 04:46:50] [INFO ] Invariant cache hit.
[2023-03-19 04:46:50] [INFO ] Dead Transitions using invariants and state equation in 110 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 37/38 places, 44/55 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 628 ms. Remains : 37/38 places, 44/55 transitions.
Support contains 30 out of 37 places after structural reductions.
[2023-03-19 04:46:51] [INFO ] Flatten gal took : 40 ms
[2023-03-19 04:46:51] [INFO ] Flatten gal took : 17 ms
[2023-03-19 04:46:51] [INFO ] Input system was already deterministic with 44 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 786 ms. (steps per millisecond=12 ) properties (out of 47) seen :44
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-19 04:46:52] [INFO ] Flow matrix only has 33 transitions (discarded 11 similar events)
[2023-03-19 04:46:52] [INFO ] Invariant cache hit.
[2023-03-19 04:46:52] [INFO ] [Real]Absence check using 14 positive place invariants in 6 ms returned sat
[2023-03-19 04:46:52] [INFO ] [Real]Absence check using 14 positive and 1 generalized place invariants in 0 ms returned sat
[2023-03-19 04:46:52] [INFO ] After 62ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:2
[2023-03-19 04:46:52] [INFO ] [Nat]Absence check using 14 positive place invariants in 6 ms returned sat
[2023-03-19 04:46:52] [INFO ] [Nat]Absence check using 14 positive and 1 generalized place invariants in 0 ms returned sat
[2023-03-19 04:46:52] [INFO ] After 57ms SMT Verify possible using all constraints in natural domain returned unsat :3 sat :0
Fused 3 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 3 atomic propositions for a total of 12 simplifications.
[2023-03-19 04:46:52] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 6 ms
FORMULA SmartHome-PT-01-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:46:52] [INFO ] Input system was already deterministic with 44 transitions.
Support contains 29 out of 37 places (down from 30) after GAL structural reductions.
Computed a total of 19 stabilizing places and 12 stable transitions
Graph (complete) has 101 edges and 37 vertex of which 36 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.2 ms
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 44/44 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 36 transition count 44
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 4 place count 33 transition count 41
Iterating global reduction 1 with 3 rules applied. Total rules applied 7 place count 33 transition count 41
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 1 with 1 rules applied. Total rules applied 8 place count 33 transition count 40
Applied a total of 8 rules in 6 ms. Remains 33 /37 variables (removed 4) and now considering 40/44 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 33/37 places, 40/44 transitions.
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:46:52] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 44/44 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 34 transition count 41
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 34 transition count 41
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 0 with 2 rules applied. Total rules applied 8 place count 34 transition count 39
Applied a total of 8 rules in 12 ms. Remains 34 /37 variables (removed 3) and now considering 39/44 (removed 5) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 34/37 places, 39/44 transitions.
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 6 ms
[2023-03-19 04:46:52] [INFO ] Input system was already deterministic with 39 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 44/44 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 36 transition count 44
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 4 place count 33 transition count 41
Iterating global reduction 1 with 3 rules applied. Total rules applied 7 place count 33 transition count 41
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 1 with 1 rules applied. Total rules applied 8 place count 33 transition count 40
Applied a total of 8 rules in 8 ms. Remains 33 /37 variables (removed 4) and now considering 40/44 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 33/37 places, 40/44 transitions.
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:46:52] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 44/44 transitions.
Applied a total of 0 rules in 1 ms. Remains 37 /37 variables (removed 0) and now considering 44/44 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 37/37 places, 44/44 transitions.
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:46:52] [INFO ] Input system was already deterministic with 44 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 44/44 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 36 transition count 44
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 5 place count 32 transition count 40
Iterating global reduction 1 with 4 rules applied. Total rules applied 9 place count 32 transition count 40
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 11 place count 32 transition count 38
Applied a total of 11 rules in 6 ms. Remains 32 /37 variables (removed 5) and now considering 38/44 (removed 6) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 32/37 places, 38/44 transitions.
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:46:52] [INFO ] Input system was already deterministic with 38 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 44/44 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 36 transition count 44
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 3 place count 34 transition count 42
Iterating global reduction 1 with 2 rules applied. Total rules applied 5 place count 34 transition count 42
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 1 with 1 rules applied. Total rules applied 6 place count 34 transition count 41
Applied a total of 6 rules in 7 ms. Remains 34 /37 variables (removed 3) and now considering 41/44 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 34/37 places, 41/44 transitions.
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:46:52] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 44/44 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 36 transition count 43
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 36 transition count 43
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 3 place count 36 transition count 42
Applied a total of 3 rules in 5 ms. Remains 36 /37 variables (removed 1) and now considering 42/44 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 36/37 places, 42/44 transitions.
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:46:52] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 44/44 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 36 transition count 44
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 5 place count 32 transition count 40
Iterating global reduction 1 with 4 rules applied. Total rules applied 9 place count 32 transition count 40
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 11 place count 32 transition count 38
Applied a total of 11 rules in 6 ms. Remains 32 /37 variables (removed 5) and now considering 38/44 (removed 6) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 32/37 places, 38/44 transitions.
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:46:52] [INFO ] Input system was already deterministic with 38 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 37/37 places, 44/44 transitions.
Graph (trivial) has 22 edges and 37 vertex of which 4 / 37 are part of one of the 2 SCC in 5 ms
Free SCC test removed 2 places
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Graph (complete) has 97 edges and 35 vertex of which 34 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.1 ms
Discarding 1 places :
Also discarding 0 output transitions
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 4 place count 32 transition count 38
Iterating global reduction 0 with 2 rules applied. Total rules applied 6 place count 32 transition count 38
Performed 7 Post agglomeration using F-continuation condition.Transition count delta: 7
Deduced a syphon composed of 7 places in 0 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 0 with 14 rules applied. Total rules applied 20 place count 25 transition count 31
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 21 place count 24 transition count 29
Iterating global reduction 0 with 1 rules applied. Total rules applied 22 place count 24 transition count 29
Drop transitions removed 6 transitions
Redundant transition composition rules discarded 6 transitions
Iterating global reduction 0 with 6 rules applied. Total rules applied 28 place count 24 transition count 23
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 29 place count 23 transition count 22
Iterating global reduction 0 with 1 rules applied. Total rules applied 30 place count 23 transition count 22
Applied a total of 30 rules in 34 ms. Remains 23 /37 variables (removed 14) and now considering 22/44 (removed 22) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 34 ms. Remains : 23/37 places, 22/44 transitions.
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:46:52] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 37/37 places, 44/44 transitions.
Graph (trivial) has 23 edges and 37 vertex of which 4 / 37 are part of one of the 2 SCC in 0 ms
Free SCC test removed 2 places
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Graph (complete) has 97 edges and 35 vertex of which 34 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.1 ms
Discarding 1 places :
Also discarding 0 output transitions
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 33 transition count 39
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 33 transition count 39
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 0 with 16 rules applied. Total rules applied 20 place count 25 transition count 31
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 22 place count 23 transition count 27
Iterating global reduction 0 with 2 rules applied. Total rules applied 24 place count 23 transition count 27
Drop transitions removed 6 transitions
Redundant transition composition rules discarded 6 transitions
Iterating global reduction 0 with 6 rules applied. Total rules applied 30 place count 23 transition count 21
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 31 place count 22 transition count 21
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 32 place count 21 transition count 20
Iterating global reduction 1 with 1 rules applied. Total rules applied 33 place count 21 transition count 20
Applied a total of 33 rules in 20 ms. Remains 21 /37 variables (removed 16) and now considering 20/44 (removed 24) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 21/37 places, 20/44 transitions.
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:46:52] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 37/37 places, 44/44 transitions.
Graph (complete) has 101 edges and 37 vertex of which 36 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.1 ms
Discarding 1 places :
Also discarding 0 output transitions
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 4 place count 33 transition count 41
Iterating global reduction 0 with 3 rules applied. Total rules applied 7 place count 33 transition count 41
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 0 with 10 rules applied. Total rules applied 17 place count 28 transition count 36
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 18 place count 27 transition count 34
Iterating global reduction 0 with 1 rules applied. Total rules applied 19 place count 27 transition count 34
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 0 with 5 rules applied. Total rules applied 24 place count 27 transition count 29
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 25 place count 26 transition count 28
Iterating global reduction 0 with 1 rules applied. Total rules applied 26 place count 26 transition count 28
Applied a total of 26 rules in 17 ms. Remains 26 /37 variables (removed 11) and now considering 28/44 (removed 16) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 26/37 places, 28/44 transitions.
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:46:52] [INFO ] Input system was already deterministic with 28 transitions.
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 6 ms
[2023-03-19 04:46:52] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:46:52] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-19 04:46:52] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 37 places, 44 transitions and 142 arcs took 1 ms.
Total runtime 3058 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SmartHome-PT-01
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability

FORMULA SmartHome-PT-01-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-01-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-01-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-01-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-01-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-01-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-01-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-01-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-01-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-01-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmartHome-PT-01-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679201217501

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 1 (type EXCL) for 0 SmartHome-PT-01-CTLFireability-00
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 1 (type EXCL) for SmartHome-PT-01-CTLFireability-00
lola: result : false
lola: markings : 39745
lola: fired transitions : 1012372
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 29 SmartHome-PT-01-CTLFireability-08
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for SmartHome-PT-01-CTLFireability-08
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 27 (type EXCL) for 26 SmartHome-PT-01-CTLFireability-06
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 27 (type EXCL) for SmartHome-PT-01-CTLFireability-06
lola: result : true
lola: markings : 39745
lola: fired transitions : 823591
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 23 SmartHome-PT-01-CTLFireability-05
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for SmartHome-PT-01-CTLFireability-05
lola: result : true
lola: markings : 23185
lola: fired transitions : 186852
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 21 (type EXCL) for 20 SmartHome-PT-01-CTLFireability-04
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 21 (type EXCL) for SmartHome-PT-01-CTLFireability-04
lola: result : true
lola: markings : 39745
lola: fired transitions : 779522
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 18 (type EXCL) for 17 SmartHome-PT-01-CTLFireability-03
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 18 (type EXCL) for SmartHome-PT-01-CTLFireability-03
lola: result : true
lola: markings : 39745
lola: fired transitions : 772254
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 15 (type EXCL) for 14 SmartHome-PT-01-CTLFireability-02
lola: time limit : 513 sec
lola: memory limit: 32 pages
lola: FINISHED task # 15 (type EXCL) for SmartHome-PT-01-CTLFireability-02
lola: result : false
lola: markings : 7041
lola: fired transitions : 44630
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 12 (type EXCL) for 3 SmartHome-PT-01-CTLFireability-01
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 12 (type EXCL) for SmartHome-PT-01-CTLFireability-01
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 3 SmartHome-PT-01-CTLFireability-01
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for SmartHome-PT-01-CTLFireability-01
lola: result : true
lola: markings : 113
lola: fired transitions : 336
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 6 (type EXCL) for 3 SmartHome-PT-01-CTLFireability-01
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 6 (type EXCL) for SmartHome-PT-01-CTLFireability-01
lola: result : true
lola: markings : 23184
lola: fired transitions : 165574
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 SmartHome-PT-01-CTLFireability-11
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for SmartHome-PT-01-CTLFireability-11
lola: result : true
lola: markings : 70
lola: fired transitions : 988
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 SmartHome-PT-01-CTLFireability-09
lola: time limit : 1798 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for SmartHome-PT-01-CTLFireability-09
lola: result : false
lola: markings : 3
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 SmartHome-PT-01-CTLFireability-12
lola: time limit : 3597 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for SmartHome-PT-01-CTLFireability-12
lola: result : true
lola: markings : 2
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmartHome-PT-01-CTLFireability-00: CTL false CTL model checker
SmartHome-PT-01-CTLFireability-01: CONJ true CONJ
SmartHome-PT-01-CTLFireability-02: CTL false CTL model checker
SmartHome-PT-01-CTLFireability-03: CTL true CTL model checker
SmartHome-PT-01-CTLFireability-04: CTL true CTL model checker
SmartHome-PT-01-CTLFireability-05: CTL true CTL model checker
SmartHome-PT-01-CTLFireability-06: CTL true CTL model checker
SmartHome-PT-01-CTLFireability-08: DISJ true CTL model checker
SmartHome-PT-01-CTLFireability-09: CTL false CTL model checker
SmartHome-PT-01-CTLFireability-11: AGEF true tscc_search
SmartHome-PT-01-CTLFireability-12: CTL true CTL model checker


Time elapsed: 3 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmartHome-PT-01"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SmartHome-PT-01, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912647000154"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmartHome-PT-01.tgz
mv SmartHome-PT-01 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;