Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r455-smll-167912647000139.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SmallOperatingSystem-PT-MT8192DC2048, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912647000139
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 440K
-rw-r--r-- 1 mcc users 9.6K Feb 25 12:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K Feb 25 12:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.5K Feb 25 12:44 CTLFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 25 12:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 17:08 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 17:08 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Feb 25 17:08 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 25 17:08 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 12:45 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 81K Feb 25 12:45 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Feb 25 12:45 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 25 12:45 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 17:08 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 17:08 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 13 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 8.1K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-00
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-01
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-02
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-03
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-04
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-05
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-06
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-07
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-08
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-09
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-10
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-11
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-12
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-13
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-14
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1679200078345

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=LTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT8192DC2048
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 04:28:01] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 04:28:01] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 04:28:02] [INFO ] Load time of PNML (sax parser for PT used): 41 ms
[2023-03-19 04:28:02] [INFO ] Transformed 9 places.
[2023-03-19 04:28:02] [INFO ] Transformed 8 transitions.
[2023-03-19 04:28:02] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 168 ms.
Parsed 16 properties from file /home/mcc/execution/LTLCardinality.xml in 22 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 2 formulas.
FORMULA SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 9 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 17 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2023-03-19 04:28:02] [INFO ] Computed 4 place invariants in 5 ms
[2023-03-19 04:28:02] [INFO ] Implicit Places using invariants in 213 ms returned []
[2023-03-19 04:28:02] [INFO ] Invariant cache hit.
[2023-03-19 04:28:02] [INFO ] Implicit Places using invariants and state equation in 58 ms returned []
Implicit Place search using SMT with State Equation took 330 ms to find 0 implicit places.
[2023-03-19 04:28:02] [INFO ] Invariant cache hit.
[2023-03-19 04:28:02] [INFO ] Dead Transitions using invariants and state equation in 52 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 402 ms. Remains : 9/9 places, 8/8 transitions.
Support contains 9 out of 9 places after structural reductions.
[2023-03-19 04:28:03] [INFO ] Flatten gal took : 30 ms
[2023-03-19 04:28:03] [INFO ] Flatten gal took : 7 ms
[2023-03-19 04:28:03] [INFO ] Input system was already deterministic with 8 transitions.
Incomplete random walk after 10247 steps, including 2 resets, run finished after 50 ms. (steps per millisecond=204 ) properties (out of 25) seen :6
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 100 ms. (steps per millisecond=10 ) properties (out of 19) seen :6
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 56 ms. (steps per millisecond=17 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 61 ms. (steps per millisecond=16 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=23 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=23 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 56 ms. (steps per millisecond=17 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=25 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 53 ms. (steps per millisecond=18 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=28 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=38 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=38 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=33 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 13) seen :0
Running SMT prover for 13 properties.
[2023-03-19 04:28:03] [INFO ] Invariant cache hit.
[2023-03-19 04:28:03] [INFO ] After 90ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:13
[2023-03-19 04:28:04] [INFO ] [Nat]Absence check using 4 positive place invariants in 2 ms returned sat
[2023-03-19 04:28:04] [INFO ] After 46ms SMT Verify possible using state equation in natural domain returned unsat :5 sat :8
[2023-03-19 04:28:04] [INFO ] After 93ms SMT Verify possible using trap constraints in natural domain returned unsat :5 sat :8
Attempting to minimize the solution found.
Minimization took 35 ms.
[2023-03-19 04:28:04] [INFO ] After 242ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :8
Fused 13 Parikh solutions to 8 different solutions.
Finished Parikh walk after 17416 steps, including 0 resets, run visited all 2 properties in 147 ms. (steps per millisecond=118 )
Parikh walk visited 8 properties in 1001 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-12 FALSE TECHNIQUES REACHABILITY_KNOWLEDGE
Successfully simplified 5 atomic propositions for a total of 13 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((G(p0)||X(G((p1||G(!p0))))))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 5 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 7 cols
[2023-03-19 04:28:05] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 04:28:05] [INFO ] Implicit Places using invariants in 28 ms returned []
[2023-03-19 04:28:05] [INFO ] Invariant cache hit.
[2023-03-19 04:28:05] [INFO ] Implicit Places using invariants and state equation in 31 ms returned []
Implicit Place search using SMT with State Equation took 62 ms to find 0 implicit places.
[2023-03-19 04:28:05] [INFO ] Invariant cache hit.
[2023-03-19 04:28:05] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 99 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 566 ms :[true, (AND p0 (NOT p1)), p0, (NOT p0), false, false]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-00 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=(AND p0 (NOT p1)), acceptance={} source=1 dest: 0}, { cond=p1, acceptance={} source=1 dest: 1}, { cond=(AND (NOT p0) (NOT p1)), acceptance={} source=1 dest: 2}], [{ cond=p0, acceptance={} source=2 dest: 0}, { cond=(NOT p0), acceptance={} source=2 dest: 2}], [{ cond=(NOT p0), acceptance={} source=3 dest: 0}, { cond=p0, acceptance={} source=3 dest: 3}], [{ cond=(NOT p0), acceptance={} source=4 dest: 1}, { cond=p0, acceptance={} source=4 dest: 5}], [{ cond=(AND (NOT p0) p1), acceptance={} source=5 dest: 1}, { cond=(AND (NOT p0) (NOT p1)), acceptance={} source=5 dest: 2}, { cond=(AND p0 (NOT p1)), acceptance={} source=5 dest: 3}, { cond=(AND p0 p1), acceptance={} source=5 dest: 5}]], initial=4, aps=[p0:(LEQ 2 s4), p1:(AND (OR (LEQ 2 s4) (GT s4 s1)) (LEQ 2 s4))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null, null][false, false, false, false, false, false]]
Entered a terminal (fully accepting) state of product in 38 steps with 0 reset in 7 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-00 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-00 finished in 764 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F((p0||G(F((p1 U (p2||G(p1)))))))))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Applied a total of 0 rules in 15 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2023-03-19 04:28:06] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 04:28:06] [INFO ] Implicit Places using invariants in 34 ms returned []
[2023-03-19 04:28:06] [INFO ] Invariant cache hit.
[2023-03-19 04:28:06] [INFO ] Implicit Places using invariants and state equation in 42 ms returned []
Implicit Place search using SMT with State Equation took 91 ms to find 0 implicit places.
[2023-03-19 04:28:06] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:28:06] [INFO ] Invariant cache hit.
[2023-03-19 04:28:06] [INFO ] Dead Transitions using invariants and state equation in 51 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 169 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 122 ms :[(AND (NOT p2) (NOT p0) (NOT p1)), (AND (NOT p2) (NOT p0) (NOT p1))]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-02 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(AND (NOT p2) (NOT p0) (NOT p1)), acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p2) (NOT p0) p1), acceptance={} source=1 dest: 1}, { cond=(AND (NOT p2) (NOT p0) (NOT p1)), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p2:(AND (GT 1 s3) (LEQ 3 s7)), p0:(GT s5 s3), p1:(LEQ 3 s7)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null][true, true]]
Product exploration explored 100000 steps with 0 reset in 422 ms.
Product exploration explored 100000 steps with 0 reset in 413 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p2) p0 (NOT p1)), (X (NOT (AND (NOT p2) (NOT p0) p1))), (X (NOT (AND (NOT p2) (NOT p0) (NOT p1)))), (X (X (NOT (AND (NOT p2) (NOT p0) p1)))), (X (X (NOT (AND (NOT p2) (NOT p0) (NOT p1)))))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 311 ms. Reduced automaton from 2 states, 4 edges and 3 AP (stutter insensitive) to 2 states, 4 edges and 3 AP (stutter insensitive).
Stuttering acceptance computed with spot in 113 ms :[(AND (NOT p0) (NOT p1) (NOT p2)), (AND (NOT p0) (NOT p1) (NOT p2))]
Incomplete random walk after 10250 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=854 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 79 ms. (steps per millisecond=126 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 2) seen :0
Interrupted probabilistic random walk after 317985 steps, run timeout after 3001 ms. (steps per millisecond=105 ) properties seen :{}
Probabilistic random walk after 317985 steps, saw 172513 distinct states, run finished after 3003 ms. (steps per millisecond=105 ) properties seen :0
Running SMT prover for 2 properties.
[2023-03-19 04:28:11] [INFO ] Invariant cache hit.
[2023-03-19 04:28:11] [INFO ] [Real]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-19 04:28:11] [INFO ] After 55ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-19 04:28:11] [INFO ] [Nat]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-19 04:28:11] [INFO ] After 14ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-19 04:28:11] [INFO ] After 24ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 11 ms.
[2023-03-19 04:28:11] [INFO ] After 71ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Finished Parikh walk after 12230 steps, including 0 resets, run visited all 1 properties in 17 ms. (steps per millisecond=719 )
Parikh walk visited 2 properties in 452 ms.
Knowledge obtained : [(AND (NOT p2) p0 (NOT p1)), (X (NOT (AND (NOT p2) (NOT p0) p1))), (X (NOT (AND (NOT p2) (NOT p0) (NOT p1)))), (X (X (NOT (AND (NOT p2) (NOT p0) p1)))), (X (X (NOT (AND (NOT p2) (NOT p0) (NOT p1)))))]
False Knowledge obtained : [(F (AND (NOT p0) (NOT p1) (NOT p2))), (F (AND (NOT p0) p1 (NOT p2)))]
Knowledge based reduction with 5 factoid took 355 ms. Reduced automaton from 2 states, 4 edges and 3 AP (stutter insensitive) to 2 states, 4 edges and 3 AP (stutter insensitive).
Stuttering acceptance computed with spot in 113 ms :[(AND (NOT p0) (NOT p1) (NOT p2)), (AND (NOT p0) (NOT p1) (NOT p2))]
Stuttering acceptance computed with spot in 111 ms :[(AND (NOT p0) (NOT p1) (NOT p2)), (AND (NOT p0) (NOT p1) (NOT p2))]
Support contains 3 out of 8 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 8/8 places, 8/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 8/8 (removed 0) transitions.
[2023-03-19 04:28:12] [INFO ] Invariant cache hit.
[2023-03-19 04:28:12] [INFO ] Implicit Places using invariants in 33 ms returned []
[2023-03-19 04:28:12] [INFO ] Invariant cache hit.
[2023-03-19 04:28:12] [INFO ] Implicit Places using invariants and state equation in 39 ms returned []
Implicit Place search using SMT with State Equation took 76 ms to find 0 implicit places.
[2023-03-19 04:28:12] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:28:12] [INFO ] Invariant cache hit.
[2023-03-19 04:28:12] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 120 ms. Remains : 8/8 places, 8/8 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p0 (NOT p1) (NOT p2)), (X (NOT (AND (NOT p0) (NOT p1) (NOT p2)))), (X (NOT (AND (NOT p0) p1 (NOT p2)))), (X (X (NOT (AND (NOT p0) (NOT p1) (NOT p2))))), (X (X (NOT (AND (NOT p0) p1 (NOT p2)))))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 294 ms. Reduced automaton from 2 states, 4 edges and 3 AP (stutter insensitive) to 2 states, 4 edges and 3 AP (stutter insensitive).
Stuttering acceptance computed with spot in 131 ms :[(AND (NOT p0) (NOT p1) (NOT p2)), (AND (NOT p0) (NOT p1) (NOT p2))]
Incomplete random walk after 10247 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=1707 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 48 ms. (steps per millisecond=208 ) properties (out of 2) seen :0
Interrupted probabilistic random walk after 405087 steps, run timeout after 3001 ms. (steps per millisecond=134 ) properties seen :{}
Probabilistic random walk after 405087 steps, saw 207336 distinct states, run finished after 3001 ms. (steps per millisecond=134 ) properties seen :0
Running SMT prover for 2 properties.
[2023-03-19 04:28:15] [INFO ] Invariant cache hit.
[2023-03-19 04:28:15] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 04:28:15] [INFO ] After 53ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-19 04:28:16] [INFO ] [Nat]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-19 04:28:16] [INFO ] After 13ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-19 04:28:16] [INFO ] After 21ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 10 ms.
[2023-03-19 04:28:16] [INFO ] After 64ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Finished Parikh walk after 12191 steps, including 0 resets, run visited all 1 properties in 28 ms. (steps per millisecond=435 )
Parikh walk visited 2 properties in 511 ms.
Knowledge obtained : [(AND p0 (NOT p1) (NOT p2)), (X (NOT (AND (NOT p0) (NOT p1) (NOT p2)))), (X (NOT (AND (NOT p0) p1 (NOT p2)))), (X (X (NOT (AND (NOT p0) (NOT p1) (NOT p2))))), (X (X (NOT (AND (NOT p0) p1 (NOT p2)))))]
False Knowledge obtained : [(F (AND (NOT p0) (NOT p1) (NOT p2))), (F (AND (NOT p0) p1 (NOT p2)))]
Knowledge based reduction with 5 factoid took 307 ms. Reduced automaton from 2 states, 4 edges and 3 AP (stutter insensitive) to 2 states, 4 edges and 3 AP (stutter insensitive).
Stuttering acceptance computed with spot in 115 ms :[(AND (NOT p0) (NOT p1) (NOT p2)), (AND (NOT p0) (NOT p1) (NOT p2))]
Stuttering acceptance computed with spot in 112 ms :[(AND (NOT p0) (NOT p1) (NOT p2)), (AND (NOT p0) (NOT p1) (NOT p2))]
Stuttering acceptance computed with spot in 113 ms :[(AND (NOT p0) (NOT p1) (NOT p2)), (AND (NOT p0) (NOT p1) (NOT p2))]
Product exploration explored 100000 steps with 0 reset in 173 ms.
Product exploration explored 100000 steps with 0 reset in 196 ms.
Support contains 3 out of 8 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 8/8 places, 8/8 transitions.
Applied a total of 0 rules in 2 ms. Remains 8 /8 variables (removed 0) and now considering 8/8 (removed 0) transitions.
[2023-03-19 04:28:17] [INFO ] Invariant cache hit.
[2023-03-19 04:28:17] [INFO ] Implicit Places using invariants in 35 ms returned []
[2023-03-19 04:28:17] [INFO ] Invariant cache hit.
[2023-03-19 04:28:17] [INFO ] Implicit Places using invariants and state equation in 44 ms returned []
Implicit Place search using SMT with State Equation took 82 ms to find 0 implicit places.
[2023-03-19 04:28:17] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:28:17] [INFO ] Invariant cache hit.
[2023-03-19 04:28:17] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 128 ms. Remains : 8/8 places, 8/8 transitions.
Treatment of property SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-02 finished in 11485 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F(p0)))'
Support contains 1 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8 transition count 6
Reduce places removed 3 places and 0 transitions.
Graph (trivial) has 3 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 4 ms
Free SCC test removed 1 places
Iterating post reduction 1 with 4 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 10 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
// Phase 1: matrix 5 rows 4 cols
[2023-03-19 04:28:17] [INFO ] Computed 2 place invariants in 1 ms
[2023-03-19 04:28:17] [INFO ] Implicit Places using invariants in 28 ms returned []
[2023-03-19 04:28:17] [INFO ] Invariant cache hit.
[2023-03-19 04:28:17] [INFO ] Implicit Places using invariants and state equation in 29 ms returned []
Implicit Place search using SMT with State Equation took 61 ms to find 0 implicit places.
[2023-03-19 04:28:17] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:28:17] [INFO ] Invariant cache hit.
[2023-03-19 04:28:17] [INFO ] Dead Transitions using invariants and state equation in 29 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 4/9 places, 5/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 112 ms. Remains : 4/9 places, 5/8 transitions.
Stuttering acceptance computed with spot in 103 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-04 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={} source=0 dest: 1}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(LEQ 3 s3)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null][true, true]]
Stuttering criterion allowed to conclude after 0 steps with 0 reset in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-04 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-04 finished in 234 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Applied a total of 0 rules in 2 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2023-03-19 04:28:18] [INFO ] Computed 3 place invariants in 0 ms
[2023-03-19 04:28:18] [INFO ] Implicit Places using invariants in 32 ms returned []
[2023-03-19 04:28:18] [INFO ] Invariant cache hit.
[2023-03-19 04:28:18] [INFO ] Implicit Places using invariants and state equation in 39 ms returned []
Implicit Place search using SMT with State Equation took 73 ms to find 0 implicit places.
[2023-03-19 04:28:18] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:28:18] [INFO ] Invariant cache hit.
[2023-03-19 04:28:18] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 119 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 51 ms :[(NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-05 automaton TGBA Formula[mat=[[{ cond=p0, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(AND (LEQ s7 s5) (LEQ 3 s1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null][true]]
Product exploration explored 100000 steps with 0 reset in 355 ms.
Stack based approach found an accepted trace after 90054 steps with 0 reset with depth 90055 and stack size 79839 in 192 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-05 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-05 finished in 741 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(((p0||X(F((p1||G(F(p1)))))) U (G((p0||X(F((p1||G(F(p1)))))))||(p2&&(p0||X(F((p1||G(F(p1))))))))))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
[2023-03-19 04:28:18] [INFO ] Invariant cache hit.
[2023-03-19 04:28:18] [INFO ] Implicit Places using invariants in 35 ms returned []
[2023-03-19 04:28:18] [INFO ] Invariant cache hit.
[2023-03-19 04:28:18] [INFO ] Implicit Places using invariants and state equation in 40 ms returned []
Implicit Place search using SMT with State Equation took 78 ms to find 0 implicit places.
[2023-03-19 04:28:18] [INFO ] Invariant cache hit.
[2023-03-19 04:28:18] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 8/9 places, 8/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 116 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 136 ms :[(AND (NOT p0) (NOT p1)), (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-06 automaton TGBA Formula[mat=[[{ cond=(NOT p2), acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={} source=0 dest: 1}], [{ cond=(NOT p1), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p2:(GT s0 s3), p0:(GT 2 s1), p1:(GT s3 s2)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive], stateDesc=[null, null][false, false]]
Product exploration explored 100000 steps with 24991 reset in 238 ms.
Product exploration explored 100000 steps with 25008 reset in 287 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p2 (NOT p0) (NOT p1)), (X p2), (X (NOT p0)), (X (NOT p1)), (X (X p2)), (X (X (NOT p0)))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1))]
Knowledge based reduction with 6 factoid took 385 ms. Reduced automaton from 2 states, 3 edges and 3 AP (stutter sensitive) to 2 states, 2 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 100 ms :[(NOT p1), (NOT p1)]
Finished random walk after 2050 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=1025 )
Knowledge obtained : [(AND p2 (NOT p0) (NOT p1)), (X p2), (X (NOT p0)), (X (NOT p1)), (X (X p2)), (X (X (NOT p0)))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1)), (F p1)]
Knowledge based reduction with 6 factoid took 433 ms. Reduced automaton from 2 states, 2 edges and 1 AP (stutter sensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 50 ms :[(NOT p1)]
Stuttering acceptance computed with spot in 50 ms :[(NOT p1)]
[2023-03-19 04:28:20] [INFO ] Invariant cache hit.
[2023-03-19 04:28:20] [INFO ] [Real]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-19 04:28:20] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2023-03-19 04:28:20] [INFO ] [Real]Absence check using state equation in 9 ms returned sat
[2023-03-19 04:28:20] [INFO ] Solution in real domain found non-integer solution.
[2023-03-19 04:28:20] [INFO ] [Nat]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-19 04:28:20] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2023-03-19 04:28:20] [INFO ] [Nat]Absence check using state equation in 9 ms returned sat
[2023-03-19 04:28:20] [INFO ] Computed and/alt/rep : 7/10/7 causal constraints (skipped 0 transitions) in 2 ms.
[2023-03-19 04:28:20] [INFO ] Added : 0 causal constraints over 0 iterations in 6 ms. Result :sat
Could not prove EG (NOT p1)
Support contains 2 out of 8 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in SI_LTL mode, iteration 0 : 8/8 places, 8/8 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 6 transition count 7
Applied a total of 3 rules in 5 ms. Remains 6 /8 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 6 cols
[2023-03-19 04:28:20] [INFO ] Computed 2 place invariants in 7 ms
[2023-03-19 04:28:20] [INFO ] Implicit Places using invariants in 33 ms returned []
[2023-03-19 04:28:20] [INFO ] Invariant cache hit.
[2023-03-19 04:28:20] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-19 04:28:20] [INFO ] Implicit Places using invariants and state equation in 37 ms returned []
Implicit Place search using SMT with State Equation took 71 ms to find 0 implicit places.
[2023-03-19 04:28:20] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:28:20] [INFO ] Invariant cache hit.
[2023-03-19 04:28:20] [INFO ] Dead Transitions using invariants and state equation in 37 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 6/8 places, 7/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 124 ms. Remains : 6/8 places, 7/8 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(NOT p1), (X (NOT p1))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1))]
Knowledge based reduction with 2 factoid took 164 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 52 ms :[(NOT p1)]
Finished random walk after 2050 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=2050 )
Knowledge obtained : [(NOT p1), (X (NOT p1))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1)), (F p1)]
Knowledge based reduction with 2 factoid took 209 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 50 ms :[(NOT p1)]
Stuttering acceptance computed with spot in 178 ms :[(NOT p1)]
[2023-03-19 04:28:21] [INFO ] Invariant cache hit.
[2023-03-19 04:28:21] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-19 04:28:21] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2023-03-19 04:28:21] [INFO ] [Real]Absence check using state equation in 7 ms returned sat
[2023-03-19 04:28:21] [INFO ] Solution in real domain found non-integer solution.
[2023-03-19 04:28:21] [INFO ] [Nat]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-19 04:28:21] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2023-03-19 04:28:21] [INFO ] [Nat]Absence check using state equation in 6 ms returned sat
[2023-03-19 04:28:21] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-19 04:28:21] [INFO ] [Nat]Added 1 Read/Feed constraints in 1 ms returned sat
[2023-03-19 04:28:21] [INFO ] Computed and/alt/rep : 6/8/6 causal constraints (skipped 0 transitions) in 2 ms.
[2023-03-19 04:28:21] [INFO ] Added : 0 causal constraints over 0 iterations in 6 ms. Result :sat
Could not prove EG (NOT p1)
Stuttering acceptance computed with spot in 50 ms :[(NOT p1)]
Product exploration explored 100000 steps with 24989 reset in 104 ms.
Product exploration explored 100000 steps with 24976 reset in 154 ms.
Support contains 2 out of 6 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 6/6 places, 7/7 transitions.
Applied a total of 0 rules in 1 ms. Remains 6 /6 variables (removed 0) and now considering 7/7 (removed 0) transitions.
[2023-03-19 04:28:21] [INFO ] Invariant cache hit.
[2023-03-19 04:28:21] [INFO ] Implicit Places using invariants in 29 ms returned []
[2023-03-19 04:28:21] [INFO ] Invariant cache hit.
[2023-03-19 04:28:22] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-19 04:28:22] [INFO ] Implicit Places using invariants and state equation in 33 ms returned []
Implicit Place search using SMT with State Equation took 64 ms to find 0 implicit places.
[2023-03-19 04:28:22] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:28:22] [INFO ] Invariant cache hit.
[2023-03-19 04:28:22] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 104 ms. Remains : 6/6 places, 7/7 transitions.
Treatment of property SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-06 finished in 3339 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F(p0)&&X(p1)))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 0 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2023-03-19 04:28:22] [INFO ] Computed 3 place invariants in 0 ms
[2023-03-19 04:28:22] [INFO ] Implicit Places using invariants in 29 ms returned []
[2023-03-19 04:28:22] [INFO ] Invariant cache hit.
[2023-03-19 04:28:22] [INFO ] Implicit Places using invariants and state equation in 39 ms returned []
Implicit Place search using SMT with State Equation took 70 ms to find 0 implicit places.
[2023-03-19 04:28:22] [INFO ] Invariant cache hit.
[2023-03-19 04:28:22] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 8/9 places, 8/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 109 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 173 ms :[(OR (NOT p1) (NOT p0)), (NOT p0), (NOT p1), true]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-07 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={} source=0 dest: 1}, { cond=true, acceptance={} source=0 dest: 2}], [{ cond=(NOT p0), acceptance={} source=1 dest: 1}], [{ cond=(NOT p1), acceptance={} source=2 dest: 3}], [{ cond=true, acceptance={} source=3 dest: 3}]], initial=0, aps=[p0:(LEQ s7 s0), p1:(GT 3 s5)], nbAcceptance=0, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Entered a terminal (fully accepting) state of product in 1 steps with 0 reset in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-07 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-07 finished in 305 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 1 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8 transition count 6
Reduce places removed 3 places and 0 transitions.
Graph (trivial) has 3 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 0 ms
Free SCC test removed 1 places
Iterating post reduction 1 with 4 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 8 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
// Phase 1: matrix 5 rows 4 cols
[2023-03-19 04:28:22] [INFO ] Computed 2 place invariants in 1 ms
[2023-03-19 04:28:22] [INFO ] Implicit Places using invariants in 29 ms returned []
[2023-03-19 04:28:22] [INFO ] Invariant cache hit.
[2023-03-19 04:28:22] [INFO ] Implicit Places using invariants and state equation in 28 ms returned []
Implicit Place search using SMT with State Equation took 59 ms to find 0 implicit places.
[2023-03-19 04:28:22] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:28:22] [INFO ] Invariant cache hit.
[2023-03-19 04:28:22] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 4/9 places, 5/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 110 ms. Remains : 4/9 places, 5/8 transitions.
Stuttering acceptance computed with spot in 49 ms :[(NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-08 automaton TGBA Formula[mat=[[{ cond=p0, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(LEQ 2 s2)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null][true]]
Stuttering criterion allowed to conclude after 33008 steps with 0 reset in 55 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-08 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-08 finished in 232 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((G(p0)||(p0&&F(p1)))))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 2 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 7 cols
[2023-03-19 04:28:22] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 04:28:22] [INFO ] Implicit Places using invariants in 29 ms returned []
[2023-03-19 04:28:22] [INFO ] Invariant cache hit.
[2023-03-19 04:28:22] [INFO ] Implicit Places using invariants and state equation in 37 ms returned []
Implicit Place search using SMT with State Equation took 68 ms to find 0 implicit places.
[2023-03-19 04:28:22] [INFO ] Invariant cache hit.
[2023-03-19 04:28:22] [INFO ] Dead Transitions using invariants and state equation in 38 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 109 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 229 ms :[true, (NOT p1), (NOT p0), (NOT p0), (AND (NOT p1) (NOT p0))]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-09 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=(NOT p1), acceptance={0} source=1 dest: 1}], [{ cond=true, acceptance={} source=2 dest: 3}], [{ cond=(NOT p0), acceptance={} source=3 dest: 0}, { cond=(AND p0 (NOT p1)), acceptance={} source=3 dest: 4}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={} source=4 dest: 1}, { cond=(AND p0 (NOT p1)), acceptance={} source=4 dest: 4}]], initial=2, aps=[p1:(LEQ 3 s6), p0:(GT 1 s4)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Product exploration explored 100000 steps with 1762 reset in 138 ms.
Stack based approach found an accepted trace after 9 steps with 0 reset with depth 10 and stack size 10 in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-09 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-09 finished in 499 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((F(p0)&&F(G(p1)))))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 2 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2023-03-19 04:28:23] [INFO ] Computed 4 place invariants in 0 ms
[2023-03-19 04:28:23] [INFO ] Implicit Places using invariants in 38 ms returned []
[2023-03-19 04:28:23] [INFO ] Invariant cache hit.
[2023-03-19 04:28:23] [INFO ] Implicit Places using invariants and state equation in 39 ms returned []
Implicit Place search using SMT with State Equation took 79 ms to find 0 implicit places.
[2023-03-19 04:28:23] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:28:23] [INFO ] Invariant cache hit.
[2023-03-19 04:28:23] [INFO ] Dead Transitions using invariants and state equation in 37 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 126 ms. Remains : 9/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 159 ms :[(OR (NOT p0) (NOT p1)), (NOT p0), (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-11 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={} source=0 dest: 1}, { cond=(NOT p1), acceptance={} source=0 dest: 2}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}], [{ cond=p1, acceptance={} source=2 dest: 2}, { cond=(NOT p1), acceptance={0} source=2 dest: 2}]], initial=0, aps=[p0:(LEQ s3 s6), p1:(AND (LEQ s2 s0) (LEQ 2 s3))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null, null][true, true, true]]
Product exploration explored 100000 steps with 0 reset in 181 ms.
Stack based approach found an accepted trace after 6 steps with 0 reset with depth 7 and stack size 7 in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-11 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-11 finished in 489 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(!p0))'
Support contains 1 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 3 place count 7 transition count 6
Reduce places removed 2 places and 0 transitions.
Graph (trivial) has 2 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 0 ms
Free SCC test removed 1 places
Iterating post reduction 2 with 3 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 7 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
// Phase 1: matrix 5 rows 4 cols
[2023-03-19 04:28:23] [INFO ] Computed 2 place invariants in 1 ms
[2023-03-19 04:28:23] [INFO ] Implicit Places using invariants in 26 ms returned []
[2023-03-19 04:28:23] [INFO ] Invariant cache hit.
[2023-03-19 04:28:23] [INFO ] Implicit Places using invariants and state equation in 30 ms returned []
Implicit Place search using SMT with State Equation took 58 ms to find 0 implicit places.
[2023-03-19 04:28:23] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:28:23] [INFO ] Invariant cache hit.
[2023-03-19 04:28:23] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 4/9 places, 5/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 102 ms. Remains : 4/9 places, 5/8 transitions.
Stuttering acceptance computed with spot in 49 ms :[p0]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-14 automaton TGBA Formula[mat=[[{ cond=p0, acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(GT 1 s1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, colored, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null][true]]
Stuttering criterion allowed to conclude after 0 steps with 0 reset in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-14 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-14 finished in 171 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F((p0||G(F((p1 U (p2||G(p1)))))))))'
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(((p0||X(F((p1||G(F(p1)))))) U (G((p0||X(F((p1||G(F(p1)))))))||(p2&&(p0||X(F((p1||G(F(p1))))))))))'
Found a Shortening insensitive property : SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-06
Stuttering acceptance computed with spot in 108 ms :[(AND (NOT p0) (NOT p1)), (NOT p1)]
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in LI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 6 transition count 7
Applied a total of 3 rules in 2 ms. Remains 6 /9 variables (removed 3) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 6 cols
[2023-03-19 04:28:24] [INFO ] Computed 2 place invariants in 1 ms
[2023-03-19 04:28:24] [INFO ] Implicit Places using invariants in 24 ms returned []
[2023-03-19 04:28:24] [INFO ] Invariant cache hit.
[2023-03-19 04:28:24] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-19 04:28:24] [INFO ] Implicit Places using invariants and state equation in 37 ms returned []
Implicit Place search using SMT with State Equation took 63 ms to find 0 implicit places.
[2023-03-19 04:28:24] [INFO ] Invariant cache hit.
[2023-03-19 04:28:24] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Starting structural reductions in LI_LTL mode, iteration 1 : 6/9 places, 7/8 transitions.
Finished structural reductions in LI_LTL mode , in 1 iterations and 101 ms. Remains : 6/9 places, 7/8 transitions.
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-06 automaton TGBA Formula[mat=[[{ cond=(NOT p2), acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={} source=0 dest: 1}], [{ cond=(NOT p1), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p2:(GT s0 s3), p0:(GT 2 s1), p1:(GT s3 s2)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, cl-invariant], stateDesc=[null, null][false, false]]
Product exploration explored 100000 steps with 25038 reset in 89 ms.
Product exploration explored 100000 steps with 24973 reset in 118 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p2 (NOT p0) (NOT p1)), (X p2), (X (NOT p0)), (X (NOT p1)), (X (X p2)), (X (X (NOT p0)))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1))]
Knowledge based reduction with 6 factoid took 374 ms. Reduced automaton from 2 states, 3 edges and 3 AP (stutter sensitive) to 2 states, 2 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 98 ms :[(NOT p1), (NOT p1)]
Finished random walk after 2050 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=1025 )
Knowledge obtained : [(AND p2 (NOT p0) (NOT p1)), (X p2), (X (NOT p0)), (X (NOT p1)), (X (X p2)), (X (X (NOT p0)))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1)), (F p1)]
Knowledge based reduction with 6 factoid took 408 ms. Reduced automaton from 2 states, 2 edges and 1 AP (stutter sensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 51 ms :[(NOT p1)]
Stuttering acceptance computed with spot in 49 ms :[(NOT p1)]
[2023-03-19 04:28:25] [INFO ] Invariant cache hit.
[2023-03-19 04:28:25] [INFO ] [Real]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-19 04:28:25] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2023-03-19 04:28:25] [INFO ] [Real]Absence check using state equation in 6 ms returned sat
[2023-03-19 04:28:25] [INFO ] Solution in real domain found non-integer solution.
[2023-03-19 04:28:25] [INFO ] [Nat]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-19 04:28:25] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2023-03-19 04:28:25] [INFO ] [Nat]Absence check using state equation in 7 ms returned sat
[2023-03-19 04:28:25] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-19 04:28:25] [INFO ] [Nat]Added 1 Read/Feed constraints in 1 ms returned sat
[2023-03-19 04:28:25] [INFO ] Computed and/alt/rep : 6/8/6 causal constraints (skipped 0 transitions) in 6 ms.
[2023-03-19 04:28:25] [INFO ] Added : 0 causal constraints over 0 iterations in 11 ms. Result :sat
Could not prove EG (NOT p1)
Support contains 2 out of 6 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in SI_LTL mode, iteration 0 : 6/6 places, 7/7 transitions.
Applied a total of 0 rules in 2 ms. Remains 6 /6 variables (removed 0) and now considering 7/7 (removed 0) transitions.
[2023-03-19 04:28:25] [INFO ] Invariant cache hit.
[2023-03-19 04:28:25] [INFO ] Implicit Places using invariants in 25 ms returned []
[2023-03-19 04:28:25] [INFO ] Invariant cache hit.
[2023-03-19 04:28:25] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-19 04:28:25] [INFO ] Implicit Places using invariants and state equation in 32 ms returned []
Implicit Place search using SMT with State Equation took 60 ms to find 0 implicit places.
[2023-03-19 04:28:25] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:28:25] [INFO ] Invariant cache hit.
[2023-03-19 04:28:25] [INFO ] Dead Transitions using invariants and state equation in 41 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 114 ms. Remains : 6/6 places, 7/7 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(NOT p1), (X (NOT p1))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1))]
Knowledge based reduction with 2 factoid took 162 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 56 ms :[(NOT p1)]
Finished random walk after 2050 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=1025 )
Knowledge obtained : [(NOT p1), (X (NOT p1))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1)), (F p1)]
Knowledge based reduction with 2 factoid took 303 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 48 ms :[(NOT p1)]
Stuttering acceptance computed with spot in 51 ms :[(NOT p1)]
[2023-03-19 04:28:26] [INFO ] Invariant cache hit.
[2023-03-19 04:28:26] [INFO ] [Real]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-19 04:28:26] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2023-03-19 04:28:26] [INFO ] [Real]Absence check using state equation in 7 ms returned sat
[2023-03-19 04:28:26] [INFO ] Solution in real domain found non-integer solution.
[2023-03-19 04:28:26] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-19 04:28:26] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2023-03-19 04:28:26] [INFO ] [Nat]Absence check using state equation in 12 ms returned sat
[2023-03-19 04:28:26] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-19 04:28:26] [INFO ] [Nat]Added 1 Read/Feed constraints in 1 ms returned sat
[2023-03-19 04:28:26] [INFO ] Computed and/alt/rep : 6/8/6 causal constraints (skipped 0 transitions) in 2 ms.
[2023-03-19 04:28:26] [INFO ] Added : 0 causal constraints over 0 iterations in 7 ms. Result :sat
Could not prove EG (NOT p1)
Stuttering acceptance computed with spot in 51 ms :[(NOT p1)]
Product exploration explored 100000 steps with 24959 reset in 87 ms.
Product exploration explored 100000 steps with 25094 reset in 120 ms.
Support contains 2 out of 6 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 6/6 places, 7/7 transitions.
Applied a total of 0 rules in 1 ms. Remains 6 /6 variables (removed 0) and now considering 7/7 (removed 0) transitions.
[2023-03-19 04:28:26] [INFO ] Invariant cache hit.
[2023-03-19 04:28:26] [INFO ] Implicit Places using invariants in 29 ms returned []
[2023-03-19 04:28:26] [INFO ] Invariant cache hit.
[2023-03-19 04:28:27] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-19 04:28:27] [INFO ] Implicit Places using invariants and state equation in 36 ms returned []
Implicit Place search using SMT with State Equation took 67 ms to find 0 implicit places.
[2023-03-19 04:28:27] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:28:27] [INFO ] Invariant cache hit.
[2023-03-19 04:28:27] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 110 ms. Remains : 6/6 places, 7/7 transitions.
Treatment of property SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-06 finished in 2998 ms.
[2023-03-19 04:28:27] [INFO ] Flatten gal took : 5 ms
[2023-03-19 04:28:27] [INFO ] Export to MCC of 2 properties in file /home/mcc/execution/LTLCardinality.sr.xml took 2 ms.
[2023-03-19 04:28:27] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 9 places, 8 transitions and 27 arcs took 0 ms.
Total runtime 25239 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SmallOperatingSystem-PT-MT8192DC2048
BK_EXAMINATION: LTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/368
LTLCardinality

FORMULA SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679200119224

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/368/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/368/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/368/LTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 1 (type EXCL) for 0 SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-02
lola: time limit : 1800 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 5/1800 18/32 SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-02 2670489 m, 534097 m/sec, 6635473 t fired, .

Time elapsed: 5 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 2
lola: CANCELED task # 1 (type EXCL) for SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 10 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 2
lola: LAUNCH task # 4 (type EXCL) for 3 SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-06
lola: time limit : 3590 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-06
lola: result : true
lola: markings : 155556
lola: fired transitions : 920435
lola: time used : 1.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 2

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-02: LTL unknown AGGR
SmallOperatingSystem-PT-MT8192DC2048-LTLCardinality-06: LTL true LTL model checker


Time elapsed: 11 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT8192DC2048"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SmallOperatingSystem-PT-MT8192DC2048, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912647000139"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT8192DC2048.tgz
mv SmallOperatingSystem-PT-MT8192DC2048 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;