fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r455-smll-167912647000131
Last Updated
May 14, 2023

About the Execution of LoLa+red for SmallOperatingSystem-PT-MT4096DC2048

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
938.096 27645.00 48410.00 577.80 TTFTTFTFFFTTTTFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r455-smll-167912647000131.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SmallOperatingSystem-PT-MT4096DC2048, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912647000131
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 448K
-rw-r--r-- 1 mcc users 8.6K Feb 25 12:48 CTLCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 25 12:48 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Feb 25 12:48 CTLFireability.txt
-rw-r--r-- 1 mcc users 60K Feb 25 12:48 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 17:08 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 17:08 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 17:08 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 17:08 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 12:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 105K Feb 25 12:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.5K Feb 25 12:49 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 25 12:49 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 17:08 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 17:08 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 13 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 8.1K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-00
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-01
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-02
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-03
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-04
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-05
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-06
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-07
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-08
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-09
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-10
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-11
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-12
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-13
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-14
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1679196141747

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=LTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT4096DC2048
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 03:22:25] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 03:22:25] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 03:22:25] [INFO ] Load time of PNML (sax parser for PT used): 44 ms
[2023-03-19 03:22:25] [INFO ] Transformed 9 places.
[2023-03-19 03:22:25] [INFO ] Transformed 8 transitions.
[2023-03-19 03:22:25] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 199 ms.
Parsed 16 properties from file /home/mcc/execution/LTLCardinality.xml in 15 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 3 formulas.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 9 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 23 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2023-03-19 03:22:26] [INFO ] Computed 4 place invariants in 5 ms
[2023-03-19 03:22:26] [INFO ] Implicit Places using invariants in 208 ms returned []
[2023-03-19 03:22:26] [INFO ] Invariant cache hit.
[2023-03-19 03:22:26] [INFO ] Implicit Places using invariants and state equation in 50 ms returned []
Implicit Place search using SMT with State Equation took 303 ms to find 0 implicit places.
[2023-03-19 03:22:26] [INFO ] Invariant cache hit.
[2023-03-19 03:22:26] [INFO ] Dead Transitions using invariants and state equation in 40 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 370 ms. Remains : 9/9 places, 8/8 transitions.
Support contains 9 out of 9 places after structural reductions.
[2023-03-19 03:22:26] [INFO ] Flatten gal took : 30 ms
[2023-03-19 03:22:26] [INFO ] Flatten gal took : 7 ms
[2023-03-19 03:22:26] [INFO ] Input system was already deterministic with 8 transitions.
Incomplete random walk after 10247 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=310 ) properties (out of 26) seen :11
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 77 ms. (steps per millisecond=13 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=33 ) properties (out of 15) seen :3
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=23 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=32 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=25 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=26 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=30 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=38 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 12) seen :0
Running SMT prover for 12 properties.
[2023-03-19 03:22:27] [INFO ] Invariant cache hit.
[2023-03-19 03:22:27] [INFO ] [Real]Absence check using 4 positive place invariants in 2 ms returned sat
[2023-03-19 03:22:27] [INFO ] After 153ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:11
[2023-03-19 03:22:27] [INFO ] [Nat]Absence check using 4 positive place invariants in 2 ms returned sat
[2023-03-19 03:22:27] [INFO ] After 33ms SMT Verify possible using state equation in natural domain returned unsat :4 sat :8
[2023-03-19 03:22:27] [INFO ] After 82ms SMT Verify possible using trap constraints in natural domain returned unsat :4 sat :8
Attempting to minimize the solution found.
Minimization took 33 ms.
[2023-03-19 03:22:27] [INFO ] After 191ms SMT Verify possible using all constraints in natural domain returned unsat :4 sat :8
Fused 12 Parikh solutions to 5 different solutions.
Finished Parikh walk after 10240 steps, including 0 resets, run visited all 1 properties in 48 ms. (steps per millisecond=213 )
Parikh walk visited 8 properties in 1139 ms.
Successfully simplified 4 atomic propositions for a total of 13 simplifications.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F(p0)))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 5 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 8 cols
[2023-03-19 03:22:29] [INFO ] Computed 4 place invariants in 1 ms
[2023-03-19 03:22:29] [INFO ] Implicit Places using invariants in 41 ms returned [6]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 45 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 7 /7 variables (removed 0) and now considering 7/7 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 51 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 290 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-01 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(LEQ s0 s1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null][false, false]]
Product exploration explored 100000 steps with 50000 reset in 379 ms.
Product exploration explored 100000 steps with 50000 reset in 252 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X p0)]
False Knowledge obtained : [(X (X (NOT p0))), (X (X p0))]
Property proved to be true thanks to knowledge :(X p0)
Knowledge based reduction with 2 factoid took 107 ms. Reduced automaton from 2 states, 2 edges and 1 AP (stutter sensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-01 TRUE TECHNIQUES KNOWLEDGE
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-01 finished in 1169 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((F(p0)&&F(G(p1)))))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Applied a total of 0 rules in 5 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2023-03-19 03:22:30] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 03:22:30] [INFO ] Implicit Places using invariants in 32 ms returned []
[2023-03-19 03:22:30] [INFO ] Invariant cache hit.
[2023-03-19 03:22:30] [INFO ] Implicit Places using invariants and state equation in 46 ms returned []
Implicit Place search using SMT with State Equation took 81 ms to find 0 implicit places.
[2023-03-19 03:22:30] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 03:22:30] [INFO ] Invariant cache hit.
[2023-03-19 03:22:30] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 126 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 150 ms :[(OR (NOT p0) (NOT p1)), (NOT p0), (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-02 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={} source=0 dest: 1}, { cond=(NOT p1), acceptance={} source=0 dest: 2}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}], [{ cond=p1, acceptance={} source=2 dest: 2}, { cond=(NOT p1), acceptance={0} source=2 dest: 2}]], initial=0, aps=[p0:(LEQ s1 s2), p1:(AND (LEQ 2 s0) (LEQ 1 s5))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null, null][true, true, true]]
Product exploration explored 100000 steps with 0 reset in 215 ms.
Stack based approach found an accepted trace after 22 steps with 0 reset with depth 23 and stack size 23 in 3 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-02 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-02 finished in 509 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((p0&&F(p1)&&(p2||(!p1&&X(!p1))))))'
Support contains 5 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 1 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 7 cols
[2023-03-19 03:22:30] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 03:22:30] [INFO ] Implicit Places using invariants in 22 ms returned []
[2023-03-19 03:22:30] [INFO ] Invariant cache hit.
[2023-03-19 03:22:30] [INFO ] Implicit Places using invariants and state equation in 25 ms returned []
Implicit Place search using SMT with State Equation took 49 ms to find 0 implicit places.
[2023-03-19 03:22:30] [INFO ] Invariant cache hit.
[2023-03-19 03:22:30] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 85 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 197 ms :[(OR (NOT p1) (NOT p2) (NOT p0)), (NOT p1), true, (OR (NOT p0) (NOT p1) (NOT p2)), true]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-03 automaton TGBA Formula[mat=[[{ cond=(AND p0 (NOT p1) p2), acceptance={} source=0 dest: 1}, { cond=(OR (NOT p0) (AND p1 (NOT p2))), acceptance={} source=0 dest: 2}, { cond=(AND p0 (NOT p1) (NOT p2)), acceptance={} source=0 dest: 4}], [{ cond=(NOT p1), acceptance={0} source=1 dest: 1}], [{ cond=true, acceptance={0} source=2 dest: 2}], [{ cond=true, acceptance={} source=3 dest: 0}], [{ cond=(NOT p1), acceptance={} source=4 dest: 1}, { cond=p1, acceptance={} source=4 dest: 2}]], initial=3, aps=[p0:(GT 2 s4), p1:(GT s5 s0), p2:(GT s1 s6)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Product exploration explored 100000 steps with 50000 reset in 110 ms.
Product exploration explored 100000 steps with 50000 reset in 157 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p0 (NOT p1) p2), (X (NOT (AND p0 (NOT p1) (NOT p2)))), (X (NOT (OR (NOT p0) (AND p1 (NOT p2))))), (X (NOT (AND p0 (NOT p1) p2))), true, (X (X p1))]
False Knowledge obtained : []
Property proved to be true thanks to knowledge :(X (NOT (AND p0 (NOT p1) p2)))
Knowledge based reduction with 6 factoid took 157 ms. Reduced automaton from 5 states, 8 edges and 3 AP (stutter sensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-03 TRUE TECHNIQUES KNOWLEDGE
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-03 finished in 728 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G((G(p0) U p1))))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 7 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 3 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
[2023-03-19 03:22:31] [INFO ] Invariant cache hit.
[2023-03-19 03:22:31] [INFO ] Implicit Places using invariants in 39 ms returned [5]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 42 ms to find 1 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 6/9 places, 7/8 transitions.
Applied a total of 0 rules in 2 ms. Remains 6 /6 variables (removed 0) and now considering 7/7 (removed 0) transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 49 ms. Remains : 6/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 128 ms :[(NOT p1), (AND (NOT p1) (NOT p0)), (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-05 automaton TGBA Formula[mat=[[{ cond=(OR p1 p0), acceptance={0} source=0 dest: 0}, { cond=(AND (NOT p1) (NOT p0)), acceptance={0, 1} source=0 dest: 0}, { cond=(AND (NOT p1) p0), acceptance={1} source=0 dest: 1}, { cond=(AND (NOT p1) p0), acceptance={0, 1} source=0 dest: 2}], [{ cond=(AND p1 (NOT p0)), acceptance={0} source=1 dest: 0}, { cond=(AND (NOT p1) (NOT p0)), acceptance={0, 1} source=1 dest: 0}, { cond=(AND p1 p0), acceptance={} source=1 dest: 1}, { cond=(AND (NOT p1) p0), acceptance={1} source=1 dest: 1}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={0, 1} source=2 dest: 0}, { cond=(AND (NOT p1) p0), acceptance={1} source=2 dest: 1}, { cond=(AND (NOT p1) p0), acceptance={0, 1} source=2 dest: 2}]], initial=0, aps=[p1:(LEQ s1 s3), p0:(GT s3 s5)], nbAcceptance=2, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null, null][true, true, true]]
Product exploration explored 100000 steps with 0 reset in 231 ms.
Stack based approach found an accepted trace after 27 steps with 0 reset with depth 28 and stack size 28 in 2 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-05 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-05 finished in 428 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((p0||X((G(p1) U p2)))))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2023-03-19 03:22:32] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 03:22:32] [INFO ] Implicit Places using invariants in 32 ms returned []
[2023-03-19 03:22:32] [INFO ] Invariant cache hit.
[2023-03-19 03:22:32] [INFO ] Implicit Places using invariants and state equation in 39 ms returned []
Implicit Place search using SMT with State Equation took 74 ms to find 0 implicit places.
[2023-03-19 03:22:32] [INFO ] Invariant cache hit.
[2023-03-19 03:22:32] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 8/9 places, 8/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 110 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 177 ms :[(AND (NOT p0) (NOT p2)), (NOT p2), true, (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-07 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p2) p1), acceptance={0} source=1 dest: 1}, { cond=(AND (NOT p2) (NOT p1)), acceptance={0} source=1 dest: 2}, { cond=(AND (NOT p2) p1), acceptance={0} source=1 dest: 3}], [{ cond=true, acceptance={0} source=2 dest: 2}], [{ cond=(NOT p1), acceptance={} source=3 dest: 2}, { cond=p1, acceptance={} source=3 dest: 3}]], initial=0, aps=[p0:(LEQ s5 s2), p2:(LEQ s2 s7), p1:(LEQ 2 s0)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Product exploration explored 100000 steps with 1561 reset in 221 ms.
Product exploration explored 100000 steps with 1249 reset in 260 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) p2 p1), (X (NOT (AND (NOT p2) p1))), (X (NOT (AND (NOT p2) (NOT p1)))), true, (X (X p1)), (X (X (NOT (AND (NOT p2) p1)))), (X (X (NOT (AND (NOT p2) (NOT p1)))))]
False Knowledge obtained : []
Knowledge based reduction with 7 factoid took 453 ms. Reduced automaton from 4 states, 8 edges and 3 AP (stutter sensitive) to 4 states, 8 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 127 ms :[(AND (NOT p0) (NOT p2)), (NOT p2), true, (NOT p1)]
Incomplete random walk after 10247 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=2561 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 72 ms. (steps per millisecond=138 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 78 ms. (steps per millisecond=128 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-19 03:22:33] [INFO ] Invariant cache hit.
[2023-03-19 03:22:33] [INFO ] [Real]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-19 03:22:33] [INFO ] After 9ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1 real:2
[2023-03-19 03:22:33] [INFO ] After 13ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1 real:2
Attempting to minimize the solution found.
Minimization took 6 ms.
[2023-03-19 03:22:33] [INFO ] After 54ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-19 03:22:33] [INFO ] [Nat]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 03:22:33] [INFO ] After 15ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-19 03:22:33] [INFO ] After 27ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 10 ms.
[2023-03-19 03:22:33] [INFO ] After 66ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Fused 3 Parikh solutions to 2 different solutions.
Parikh walk visited 2 properties in 737 ms.
Support contains 2 out of 8 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 8/8 places, 8/8 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 12 ms. Remains 7 /8 variables (removed 1) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 12 ms. Remains : 7/8 places, 7/8 transitions.
Incomplete random walk after 12293 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=3073 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=1666 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 3103446 steps, run timeout after 3001 ms. (steps per millisecond=1034 ) properties seen :{}
Probabilistic random walk after 3103446 steps, saw 1188287 distinct states, run finished after 3004 ms. (steps per millisecond=1033 ) properties seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 7 rows 7 cols
[2023-03-19 03:22:37] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 03:22:37] [INFO ] [Real]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-19 03:22:37] [INFO ] After 44ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-19 03:22:37] [INFO ] [Nat]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 03:22:37] [INFO ] After 8ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-19 03:22:37] [INFO ] After 14ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-19 03:22:37] [INFO ] After 50ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 25 ms.
Support contains 2 out of 7 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 7/7 places, 7/7 transitions.
Applied a total of 0 rules in 1 ms. Remains 7 /7 variables (removed 0) and now considering 7/7 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1 ms. Remains : 7/7 places, 7/7 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 7/7 places, 7/7 transitions.
Applied a total of 0 rules in 1 ms. Remains 7 /7 variables (removed 0) and now considering 7/7 (removed 0) transitions.
[2023-03-19 03:22:37] [INFO ] Invariant cache hit.
[2023-03-19 03:22:37] [INFO ] Implicit Places using invariants in 24 ms returned []
[2023-03-19 03:22:37] [INFO ] Invariant cache hit.
[2023-03-19 03:22:37] [INFO ] Implicit Places using invariants and state equation in 35 ms returned []
Implicit Place search using SMT with State Equation took 63 ms to find 0 implicit places.
[2023-03-19 03:22:37] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 03:22:37] [INFO ] Invariant cache hit.
[2023-03-19 03:22:37] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 99 ms. Remains : 7/7 places, 7/7 transitions.
Graph (trivial) has 2 edges and 7 vertex of which 2 / 7 are part of one of the 1 SCC in 4 ms
Free SCC test removed 1 places
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Applied a total of 1 rules in 7 ms. Remains 6 /7 variables (removed 1) and now considering 5/7 (removed 2) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 5 rows 6 cols
[2023-03-19 03:22:37] [INFO ] Computed 3 place invariants in 0 ms
[2023-03-19 03:22:37] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 03:22:37] [INFO ] After 30ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-19 03:22:37] [INFO ] [Nat]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 03:22:37] [INFO ] After 5ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-19 03:22:37] [INFO ] After 9ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 4 ms.
[2023-03-19 03:22:37] [INFO ] After 35ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Knowledge obtained : [(AND (NOT p0) p2 p1), (X (NOT (AND (NOT p2) p1))), (X (NOT (AND (NOT p2) (NOT p1)))), true, (X (X p1)), (X (X (NOT (AND (NOT p2) p1)))), (X (X (NOT (AND (NOT p2) (NOT p1)))))]
False Knowledge obtained : [(F (NOT p1)), (F (AND (NOT p1) (NOT p2))), (F (AND p1 (NOT p2)))]
Knowledge based reduction with 7 factoid took 438 ms. Reduced automaton from 4 states, 8 edges and 3 AP (stutter sensitive) to 4 states, 8 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 168 ms :[(AND (NOT p0) (NOT p2)), (NOT p2), true, (NOT p1)]
Stuttering acceptance computed with spot in 177 ms :[(AND (NOT p0) (NOT p2)), (NOT p2), true, (NOT p1)]
Support contains 4 out of 8 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 8/8 transitions.
Applied a total of 0 rules in 2 ms. Remains 8 /8 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2023-03-19 03:22:38] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 03:22:38] [INFO ] Implicit Places using invariants in 36 ms returned []
[2023-03-19 03:22:38] [INFO ] Invariant cache hit.
[2023-03-19 03:22:38] [INFO ] Implicit Places using invariants and state equation in 40 ms returned []
Implicit Place search using SMT with State Equation took 78 ms to find 0 implicit places.
[2023-03-19 03:22:38] [INFO ] Invariant cache hit.
[2023-03-19 03:22:38] [INFO ] Dead Transitions using invariants and state equation in 29 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 111 ms. Remains : 8/8 places, 8/8 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) p1 p2), (X (NOT (AND (NOT p1) (NOT p2)))), (X (NOT (AND p1 (NOT p2)))), true, (X (X (NOT (AND (NOT p1) (NOT p2))))), (X (X (NOT (AND p1 (NOT p2))))), (X (X p1))]
False Knowledge obtained : []
Knowledge based reduction with 7 factoid took 378 ms. Reduced automaton from 4 states, 8 edges and 3 AP (stutter sensitive) to 4 states, 8 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 160 ms :[(AND (NOT p0) (NOT p2)), (NOT p2), true, (NOT p1)]
Incomplete random walk after 10247 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=2561 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 81 ms. (steps per millisecond=123 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-19 03:22:39] [INFO ] Invariant cache hit.
[2023-03-19 03:22:39] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 03:22:39] [INFO ] After 11ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1 real:2
[2023-03-19 03:22:39] [INFO ] After 19ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1 real:2
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-19 03:22:39] [INFO ] After 61ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-19 03:22:39] [INFO ] [Nat]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-19 03:22:39] [INFO ] After 13ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-19 03:22:39] [INFO ] After 26ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 11 ms.
[2023-03-19 03:22:39] [INFO ] After 78ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Fused 3 Parikh solutions to 2 different solutions.
Parikh walk visited 2 properties in 806 ms.
Support contains 2 out of 8 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 8/8 places, 8/8 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 3 ms. Remains 7 /8 variables (removed 1) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 3 ms. Remains : 7/8 places, 7/8 transitions.
Incomplete random walk after 12293 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=3073 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=2000 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 3616659 steps, run timeout after 3001 ms. (steps per millisecond=1205 ) properties seen :{}
Probabilistic random walk after 3616659 steps, saw 1380388 distinct states, run finished after 3003 ms. (steps per millisecond=1204 ) properties seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 7 rows 7 cols
[2023-03-19 03:22:43] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 03:22:43] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 03:22:43] [INFO ] After 28ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-19 03:22:43] [INFO ] [Nat]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 03:22:43] [INFO ] After 7ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-19 03:22:43] [INFO ] After 13ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 3 ms.
[2023-03-19 03:22:43] [INFO ] After 39ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 33 ms.
Support contains 2 out of 7 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 7/7 places, 7/7 transitions.
Applied a total of 0 rules in 0 ms. Remains 7 /7 variables (removed 0) and now considering 7/7 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1 ms. Remains : 7/7 places, 7/7 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 7/7 places, 7/7 transitions.
Applied a total of 0 rules in 1 ms. Remains 7 /7 variables (removed 0) and now considering 7/7 (removed 0) transitions.
[2023-03-19 03:22:43] [INFO ] Invariant cache hit.
[2023-03-19 03:22:43] [INFO ] Implicit Places using invariants in 22 ms returned []
[2023-03-19 03:22:43] [INFO ] Invariant cache hit.
[2023-03-19 03:22:43] [INFO ] Implicit Places using invariants and state equation in 27 ms returned []
Implicit Place search using SMT with State Equation took 51 ms to find 0 implicit places.
[2023-03-19 03:22:43] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 03:22:43] [INFO ] Invariant cache hit.
[2023-03-19 03:22:43] [INFO ] Dead Transitions using invariants and state equation in 21 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 80 ms. Remains : 7/7 places, 7/7 transitions.
Graph (trivial) has 2 edges and 7 vertex of which 2 / 7 are part of one of the 1 SCC in 1 ms
Free SCC test removed 1 places
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Applied a total of 1 rules in 1 ms. Remains 6 /7 variables (removed 1) and now considering 5/7 (removed 2) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 5 rows 6 cols
[2023-03-19 03:22:43] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 03:22:43] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 03:22:43] [INFO ] After 28ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-19 03:22:43] [INFO ] [Nat]Absence check using 3 positive place invariants in 0 ms returned sat
[2023-03-19 03:22:43] [INFO ] After 5ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-19 03:22:43] [INFO ] After 9ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 3 ms.
[2023-03-19 03:22:43] [INFO ] After 31ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Knowledge obtained : [(AND (NOT p0) p1 p2), (X (NOT (AND (NOT p1) (NOT p2)))), (X (NOT (AND p1 (NOT p2)))), true, (X (X (NOT (AND (NOT p1) (NOT p2))))), (X (X (NOT (AND p1 (NOT p2))))), (X (X p1))]
False Knowledge obtained : [(F (NOT p1)), (F (AND (NOT p2) (NOT p1))), (F (AND (NOT p2) p1))]
Knowledge based reduction with 7 factoid took 435 ms. Reduced automaton from 4 states, 8 edges and 3 AP (stutter sensitive) to 4 states, 8 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 168 ms :[(AND (NOT p0) (NOT p2)), (NOT p2), true, (NOT p1)]
Stuttering acceptance computed with spot in 164 ms :[(AND (NOT p0) (NOT p2)), (NOT p2), true, (NOT p1)]
Stuttering acceptance computed with spot in 149 ms :[(AND (NOT p0) (NOT p2)), (NOT p2), true, (NOT p1)]
Product exploration explored 100000 steps with 760 reset in 112 ms.
Entered a terminal (fully accepting) state of product in 99921 steps with 188 reset in 341 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-07 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-07 finished in 13145 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((p0 U (G(p1)||X(X(G(p2))))))'
Support contains 6 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2023-03-19 03:22:45] [INFO ] Computed 4 place invariants in 0 ms
[2023-03-19 03:22:45] [INFO ] Implicit Places using invariants in 23 ms returned []
[2023-03-19 03:22:45] [INFO ] Invariant cache hit.
[2023-03-19 03:22:45] [INFO ] Implicit Places using invariants and state equation in 29 ms returned []
Implicit Place search using SMT with State Equation took 54 ms to find 0 implicit places.
[2023-03-19 03:22:45] [INFO ] Invariant cache hit.
[2023-03-19 03:22:45] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 85 ms. Remains : 9/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 226 ms :[(NOT p2), (AND (NOT p1) (NOT p2)), (NOT p2), true, (AND (NOT p1) (NOT p2)), (AND (NOT p2) (NOT p1)), (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-08 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 2}], [{ cond=(NOT p1), acceptance={} source=1 dest: 2}, { cond=p1, acceptance={} source=1 dest: 5}], [{ cond=p2, acceptance={} source=2 dest: 2}, { cond=(NOT p2), acceptance={} source=2 dest: 3}], [{ cond=true, acceptance={0, 1} source=3 dest: 3}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={} source=4 dest: 0}, { cond=(AND p1 (NOT p0)), acceptance={} source=4 dest: 1}, { cond=(AND p1 p0 p2), acceptance={} source=4 dest: 4}, { cond=(AND (NOT p1) p0 p2), acceptance={0} source=4 dest: 4}, { cond=(AND p1 p0 (NOT p2)), acceptance={1} source=4 dest: 4}, { cond=(AND (NOT p1) p0 (NOT p2)), acceptance={0, 1} source=4 dest: 4}], [{ cond=(AND (NOT p1) p2), acceptance={} source=5 dest: 2}, { cond=(AND (NOT p1) (NOT p2)), acceptance={} source=5 dest: 3}, { cond=(AND p1 p2), acceptance={} source=5 dest: 5}, { cond=(AND p1 (NOT p2)), acceptance={} source=5 dest: 6}], [{ cond=(NOT p1), acceptance={} source=6 dest: 3}, { cond=p1, acceptance={} source=6 dest: 6}]], initial=4, aps=[p1:(AND (LEQ 1 s0) (LEQ s1 s3)), p2:(GT s6 s8), p0:(LEQ s4 s8)], nbAcceptance=2, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive], stateDesc=[null, null, null, null, null, null, null][false, false, false, false, false, false, false]]
Entered a terminal (fully accepting) state of product in 95494 steps with 0 reset in 86 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-08 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-08 finished in 418 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((p0&&G(p1))))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Applied a total of 0 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2023-03-19 03:22:45] [INFO ] Computed 3 place invariants in 0 ms
[2023-03-19 03:22:45] [INFO ] Implicit Places using invariants in 25 ms returned [5]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 26 ms to find 1 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 7/9 places, 8/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 7 /7 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 29 ms. Remains : 7/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 74 ms :[(OR (NOT p1) (NOT p0)), (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-09 automaton TGBA Formula[mat=[[{ cond=(OR (NOT p0) (NOT p1)), acceptance={0} source=0 dest: 0}, { cond=(AND p0 p1), acceptance={} source=0 dest: 1}], [{ cond=(NOT p1), acceptance={0} source=1 dest: 0}, { cond=p1, acceptance={} source=1 dest: 1}]], initial=0, aps=[p0:(LEQ 2 s5), p1:(LEQ s3 s6)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null, null][true, true]]
Product exploration explored 100000 steps with 0 reset in 89 ms.
Stack based approach found an accepted trace after 10 steps with 0 reset with depth 11 and stack size 11 in 0 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-09 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-09 finished in 208 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((p0||(F(p1)&&G(p2)))))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
[2023-03-19 03:22:45] [INFO ] Invariant cache hit.
[2023-03-19 03:22:45] [INFO ] Implicit Places using invariants in 26 ms returned [5]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 32 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 7 /7 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 33 ms. Remains : 7/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 218 ms :[(NOT p2), (OR (NOT p2) (NOT p1)), (OR (AND (NOT p0) (NOT p2)) (AND (NOT p0) (NOT p1))), (OR (AND (NOT p0) (NOT p2)) (AND (NOT p0) (NOT p1))), true]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-10 automaton TGBA Formula[mat=[[{ cond=p2, acceptance={} source=0 dest: 0}, { cond=(NOT p2), acceptance={} source=0 dest: 4}], [{ cond=(AND p1 p2), acceptance={0} source=1 dest: 0}, { cond=(AND (NOT p1) p2), acceptance={0} source=1 dest: 1}, { cond=(NOT p2), acceptance={0} source=1 dest: 4}], [{ cond=(AND (NOT p0) p1 p2), acceptance={} source=2 dest: 0}, { cond=(AND (NOT p0) (NOT p1) p2), acceptance={} source=2 dest: 1}, { cond=(AND (NOT p0) (NOT p2)), acceptance={} source=2 dest: 4}], [{ cond=true, acceptance={} source=3 dest: 2}], [{ cond=true, acceptance={0} source=4 dest: 4}]], initial=3, aps=[p2:(LEQ 1 s3), p1:(LEQ s6 s5), p0:(LEQ 1 s6)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Product exploration explored 100000 steps with 50000 reset in 88 ms.
Product exploration explored 100000 steps with 50000 reset in 113 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p2) p1 (NOT p0)), (X (NOT (AND (NOT p0) (NOT p1) p2))), (X (NOT (AND (NOT p0) (NOT p2)))), (X (NOT (AND (NOT p0) p1 p2))), true, (X (X (NOT (AND (NOT p1) p2))))]
False Knowledge obtained : [(X (X p2)), (X (X (NOT p2))), (X (X (AND p1 p2))), (X (X (NOT (AND p1 p2))))]
Property proved to be true thanks to knowledge :(X (NOT (AND (NOT p0) p1 p2)))
Knowledge based reduction with 6 factoid took 298 ms. Reduced automaton from 5 states, 10 edges and 3 AP (stutter sensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-10 TRUE TECHNIQUES KNOWLEDGE
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-10 finished in 777 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(G(p0))))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 8 cols
[2023-03-19 03:22:46] [INFO ] Computed 4 place invariants in 1 ms
[2023-03-19 03:22:46] [INFO ] Implicit Places using invariants in 30 ms returned [6]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 32 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 7 /7 variables (removed 0) and now considering 7/7 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 34 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 150 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-14 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=(NOT p0), acceptance={} source=1 dest: 0}, { cond=p0, acceptance={} source=1 dest: 1}], [{ cond=true, acceptance={} source=2 dest: 1}], [{ cond=true, acceptance={} source=3 dest: 2}]], initial=3, aps=[p0:(GT s0 s6)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Entered a terminal (fully accepting) state of product in 93013 steps with 0 reset in 166 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-14 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-14 finished in 377 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((p0||(X(p1) U ((!p2&&X(p1))||X(G(p1)))))))'
Support contains 5 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2023-03-19 03:22:47] [INFO ] Computed 4 place invariants in 1 ms
[2023-03-19 03:22:47] [INFO ] Implicit Places using invariants in 33 ms returned []
[2023-03-19 03:22:47] [INFO ] Invariant cache hit.
[2023-03-19 03:22:47] [INFO ] Implicit Places using invariants and state equation in 41 ms returned []
Implicit Place search using SMT with State Equation took 76 ms to find 0 implicit places.
[2023-03-19 03:22:47] [INFO ] Invariant cache hit.
[2023-03-19 03:22:47] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 112 ms. Remains : 9/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 204 ms :[true, (NOT p1), (AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1)), (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-15 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=(NOT p1), acceptance={} source=1 dest: 0}], [{ cond=true, acceptance={} source=2 dest: 3}], [{ cond=(AND (NOT p0) (NOT p2)), acceptance={} source=3 dest: 1}, { cond=(AND (NOT p0) p2), acceptance={} source=3 dest: 4}], [{ cond=(NOT p1), acceptance={} source=4 dest: 0}, { cond=(AND (NOT p2) p1), acceptance={} source=4 dest: 1}, { cond=(AND p2 p1), acceptance={} source=4 dest: 4}]], initial=2, aps=[p1:(GT s0 s3), p0:(AND (LEQ s6 s7) (GT 1 s4)), p2:(LEQ 1 s4)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Product exploration explored 100000 steps with 33333 reset in 241 ms.
Product exploration explored 100000 steps with 33333 reset in 257 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p1 (NOT p0) (NOT p2)), (X (AND (NOT p0) (NOT p2))), (X (NOT (AND (NOT p0) p2))), (X (X p1))]
False Knowledge obtained : [(X (X (AND p2 p1))), (X (X (NOT (AND p2 p1)))), (X (X (AND (NOT p2) p1))), (X (X (NOT (AND (NOT p2) p1))))]
Property proved to be true thanks to knowledge :(X (X p1))
Knowledge based reduction with 4 factoid took 273 ms. Reduced automaton from 5 states, 8 edges and 3 AP (stutter sensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-15 TRUE TECHNIQUES KNOWLEDGE
Treatment of property SmallOperatingSystem-PT-MT4096DC2048-LTLCardinality-15 finished in 1133 ms.
All properties solved by simple procedures.
Total runtime 22477 ms.
ITS solved all properties within timeout

BK_STOP 1679196169392

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLCardinality -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT4096DC2048"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SmallOperatingSystem-PT-MT4096DC2048, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912647000131"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT4096DC2048.tgz
mv SmallOperatingSystem-PT-MT4096DC2048 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;