About the Execution of LoLa+red for SmallOperatingSystem-PT-MT4096DC1024
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 994.684 | 45192.00 | 68724.00 | 1039.30 | FFFFFFFF?FFFTFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r455-smll-167912646900123.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SmallOperatingSystem-PT-MT4096DC1024, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912646900123
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 472K
-rw-r--r-- 1 mcc users 8.8K Feb 25 12:51 CTLCardinality.txt
-rw-r--r-- 1 mcc users 81K Feb 25 12:51 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Feb 25 12:50 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 25 12:50 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.7K Feb 25 17:08 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 17:08 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 17:08 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 17:08 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.5K Feb 25 12:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 74K Feb 25 12:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 25 12:51 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 97K Feb 25 12:51 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 17:08 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 17:08 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 13 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 8.1K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-00
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-01
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-02
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-03
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-04
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-05
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-06
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-07
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-08
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-09
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-10
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-11
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-12
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-13
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-14
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1679194294175
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=LTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT4096DC1024
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 02:51:38] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 02:51:38] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 02:51:38] [INFO ] Load time of PNML (sax parser for PT used): 48 ms
[2023-03-19 02:51:38] [INFO ] Transformed 9 places.
[2023-03-19 02:51:38] [INFO ] Transformed 8 transitions.
[2023-03-19 02:51:38] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 206 ms.
Parsed 16 properties from file /home/mcc/execution/LTLCardinality.xml in 22 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 1 formulas.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 9 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 18 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2023-03-19 02:51:38] [INFO ] Computed 4 place invariants in 6 ms
[2023-03-19 02:51:38] [INFO ] Implicit Places using invariants in 191 ms returned []
[2023-03-19 02:51:38] [INFO ] Invariant cache hit.
[2023-03-19 02:51:38] [INFO ] Implicit Places using invariants and state equation in 53 ms returned []
Implicit Place search using SMT with State Equation took 308 ms to find 0 implicit places.
[2023-03-19 02:51:38] [INFO ] Invariant cache hit.
[2023-03-19 02:51:38] [INFO ] Dead Transitions using invariants and state equation in 59 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 388 ms. Remains : 9/9 places, 8/8 transitions.
Support contains 9 out of 9 places after structural reductions.
[2023-03-19 02:51:39] [INFO ] Flatten gal took : 28 ms
[2023-03-19 02:51:39] [INFO ] Flatten gal took : 8 ms
[2023-03-19 02:51:39] [INFO ] Input system was already deterministic with 8 transitions.
Incomplete random walk after 10252 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=233 ) properties (out of 27) seen :8
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 90 ms. (steps per millisecond=11 ) properties (out of 19) seen :1
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 51 ms. (steps per millisecond=19 ) properties (out of 18) seen :5
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 70 ms. (steps per millisecond=14 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=32 ) properties (out of 13) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=27 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=34 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 46 ms. (steps per millisecond=21 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=25 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 46 ms. (steps per millisecond=21 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 56 ms. (steps per millisecond=17 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=28 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=38 ) properties (out of 12) seen :0
Running SMT prover for 12 properties.
[2023-03-19 02:51:39] [INFO ] Invariant cache hit.
[2023-03-19 02:51:40] [INFO ] [Real]Absence check using 4 positive place invariants in 2 ms returned sat
[2023-03-19 02:51:40] [INFO ] After 115ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:12
[2023-03-19 02:51:40] [INFO ] [Nat]Absence check using 4 positive place invariants in 3 ms returned sat
[2023-03-19 02:51:40] [INFO ] After 55ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :11
[2023-03-19 02:51:40] [INFO ] After 124ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :11
Attempting to minimize the solution found.
Minimization took 50 ms.
[2023-03-19 02:51:40] [INFO ] After 287ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :11
Fused 12 Parikh solutions to 11 different solutions.
Finished Parikh walk after 1028 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=514 )
Parikh walk visited 11 properties in 1940 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-09 FALSE TECHNIQUES REACHABILITY_KNOWLEDGE
Successfully simplified 1 atomic propositions for a total of 14 simplifications.
Computed a total of 0 stabilizing places and 0 stable transitions
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F((p0 U (p1||G(p0))))))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 7 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 11 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 7 cols
[2023-03-19 02:51:42] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 02:51:42] [INFO ] Implicit Places using invariants in 37 ms returned []
[2023-03-19 02:51:42] [INFO ] Invariant cache hit.
[2023-03-19 02:51:42] [INFO ] Implicit Places using invariants and state equation in 41 ms returned []
Implicit Place search using SMT with State Equation took 80 ms to find 0 implicit places.
[2023-03-19 02:51:42] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 02:51:42] [INFO ] Invariant cache hit.
[2023-03-19 02:51:42] [INFO ] Dead Transitions using invariants and state equation in 37 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 140 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 326 ms :[(AND (NOT p1) (NOT p0)), (AND (NOT p1) (NOT p0))]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-00 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(AND (NOT p1) (NOT p0)), acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p1) p0), acceptance={} source=1 dest: 1}, { cond=(AND (NOT p1) (NOT p0)), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p1:(AND (GT 1 s3) (LEQ 3 s5)), p0:(LEQ 3 s5)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null][true, true]]
Product exploration explored 100000 steps with 1 reset in 554 ms.
Product exploration explored 100000 steps with 1 reset in 446 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p1 p0), (X (NOT (AND (NOT p1) (NOT p0)))), (X (NOT (AND (NOT p1) p0))), (X (X (NOT (AND (NOT p1) (NOT p0)))))]
False Knowledge obtained : [(X (X (AND (NOT p1) p0))), (X (X (NOT (AND (NOT p1) p0))))]
Knowledge based reduction with 4 factoid took 288 ms. Reduced automaton from 2 states, 4 edges and 2 AP (stutter insensitive) to 2 states, 4 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 105 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Incomplete random walk after 10252 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=1708 ) properties (out of 2) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-19 02:51:44] [INFO ] Invariant cache hit.
[2023-03-19 02:51:44] [INFO ] [Real]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-19 02:51:44] [INFO ] After 42ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-19 02:51:44] [INFO ] [Nat]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 02:51:44] [INFO ] After 8ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-19 02:51:44] [INFO ] After 13ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-19 02:51:44] [INFO ] After 55ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Finished Parikh walk after 6152 steps, including 0 resets, run visited all 1 properties in 19 ms. (steps per millisecond=323 )
Parikh walk visited 1 properties in 18 ms.
Knowledge obtained : [(AND p1 p0), (X (NOT (AND (NOT p1) (NOT p0)))), (X (NOT (AND (NOT p1) p0))), (X (X (NOT (AND (NOT p1) (NOT p0)))))]
False Knowledge obtained : [(X (X (AND (NOT p1) p0))), (X (X (NOT (AND (NOT p1) p0)))), (F (AND (NOT p0) (NOT p1))), (F (AND p0 (NOT p1)))]
Knowledge based reduction with 4 factoid took 361 ms. Reduced automaton from 2 states, 4 edges and 2 AP (stutter insensitive) to 2 states, 4 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 107 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 104 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Support contains 2 out of 7 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 7/7 places, 7/7 transitions.
Applied a total of 0 rules in 1 ms. Remains 7 /7 variables (removed 0) and now considering 7/7 (removed 0) transitions.
[2023-03-19 02:51:45] [INFO ] Invariant cache hit.
[2023-03-19 02:51:45] [INFO ] Implicit Places using invariants in 32 ms returned []
[2023-03-19 02:51:45] [INFO ] Invariant cache hit.
[2023-03-19 02:51:45] [INFO ] Implicit Places using invariants and state equation in 56 ms returned []
Implicit Place search using SMT with State Equation took 92 ms to find 0 implicit places.
[2023-03-19 02:51:45] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 02:51:45] [INFO ] Invariant cache hit.
[2023-03-19 02:51:45] [INFO ] Dead Transitions using invariants and state equation in 39 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 143 ms. Remains : 7/7 places, 7/7 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p0 p1), (X (NOT (AND p0 (NOT p1)))), (X (NOT (AND (NOT p0) (NOT p1)))), (X (X (NOT (AND (NOT p0) (NOT p1)))))]
False Knowledge obtained : [(X (X (AND p0 (NOT p1)))), (X (X (NOT (AND p0 (NOT p1)))))]
Knowledge based reduction with 4 factoid took 299 ms. Reduced automaton from 2 states, 4 edges and 2 AP (stutter insensitive) to 2 states, 4 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 105 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Incomplete random walk after 10252 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=1708 ) properties (out of 2) seen :1
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-19 02:51:46] [INFO ] Invariant cache hit.
[2023-03-19 02:51:46] [INFO ] [Real]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-19 02:51:46] [INFO ] After 42ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-19 02:51:46] [INFO ] [Nat]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-19 02:51:46] [INFO ] After 10ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-19 02:51:46] [INFO ] After 16ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 10 ms.
[2023-03-19 02:51:46] [INFO ] After 79ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Finished Parikh walk after 6248 steps, including 0 resets, run visited all 1 properties in 12 ms. (steps per millisecond=520 )
Parikh walk visited 1 properties in 11 ms.
Knowledge obtained : [(AND p0 p1), (X (NOT (AND p0 (NOT p1)))), (X (NOT (AND (NOT p0) (NOT p1)))), (X (X (NOT (AND (NOT p0) (NOT p1)))))]
False Knowledge obtained : [(X (X (AND p0 (NOT p1)))), (X (X (NOT (AND p0 (NOT p1))))), (F (AND (NOT p0) (NOT p1))), (F (AND p0 (NOT p1)))]
Knowledge based reduction with 4 factoid took 349 ms. Reduced automaton from 2 states, 4 edges and 2 AP (stutter insensitive) to 2 states, 4 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 102 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 105 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 105 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Product exploration explored 100000 steps with 1 reset in 172 ms.
Stack based approach found an accepted trace after 80385 steps with 0 reset with depth 80386 and stack size 23068 in 341 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-00 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-00 finished in 4627 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F(G(p0)) U p1))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 7 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 5 place count 5 transition count 6
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 5 transition count 6
Applied a total of 6 rules in 9 ms. Remains 5 /9 variables (removed 4) and now considering 6/8 (removed 2) transitions.
// Phase 1: matrix 6 rows 5 cols
[2023-03-19 02:51:47] [INFO ] Computed 2 place invariants in 1 ms
[2023-03-19 02:51:47] [INFO ] Implicit Places using invariants in 28 ms returned []
[2023-03-19 02:51:47] [INFO ] Invariant cache hit.
[2023-03-19 02:51:47] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-19 02:51:47] [INFO ] Implicit Places using invariants and state equation in 42 ms returned []
Implicit Place search using SMT with State Equation took 72 ms to find 0 implicit places.
[2023-03-19 02:51:47] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 02:51:47] [INFO ] Invariant cache hit.
[2023-03-19 02:51:47] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 5/9 places, 6/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 124 ms. Remains : 5/9 places, 6/8 transitions.
Stuttering acceptance computed with spot in 299 ms :[(NOT p1), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-01 automaton TGBA Formula[mat=[[{ cond=(NOT p1), acceptance={0} source=0 dest: 0}, { cond=(NOT p1), acceptance={} source=0 dest: 1}], [{ cond=p0, acceptance={} source=1 dest: 1}, { cond=(NOT p0), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p1:(GT 3 s0), p0:(LEQ s0 s1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null][true, true]]
Stuttering criterion allowed to conclude after 2 steps with 0 reset in 0 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-01 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-01 finished in 447 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 1 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 3 place count 7 transition count 6
Reduce places removed 2 places and 0 transitions.
Graph (trivial) has 2 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 4 ms
Free SCC test removed 1 places
Iterating post reduction 2 with 3 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 12 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
// Phase 1: matrix 5 rows 4 cols
[2023-03-19 02:51:47] [INFO ] Computed 2 place invariants in 1 ms
[2023-03-19 02:51:47] [INFO ] Implicit Places using invariants in 57 ms returned []
[2023-03-19 02:51:47] [INFO ] Invariant cache hit.
[2023-03-19 02:51:47] [INFO ] Implicit Places using invariants and state equation in 36 ms returned []
Implicit Place search using SMT with State Equation took 106 ms to find 0 implicit places.
[2023-03-19 02:51:47] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 02:51:47] [INFO ] Invariant cache hit.
[2023-03-19 02:51:47] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 4/9 places, 5/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 164 ms. Remains : 4/9 places, 5/8 transitions.
Stuttering acceptance computed with spot in 54 ms :[(NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-02 automaton TGBA Formula[mat=[[{ cond=p0, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(GT 3 s1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null][true]]
Stuttering criterion allowed to conclude after 80 steps with 0 reset in 2 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-02 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-02 finished in 241 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(!(p0 U ((G(F(p1))&&!p0)||!p2)))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Applied a total of 0 rules in 2 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2023-03-19 02:51:48] [INFO ] Computed 3 place invariants in 2 ms
[2023-03-19 02:51:48] [INFO ] Implicit Places using invariants in 32 ms returned []
[2023-03-19 02:51:48] [INFO ] Invariant cache hit.
[2023-03-19 02:51:48] [INFO ] Implicit Places using invariants and state equation in 36 ms returned []
Implicit Place search using SMT with State Equation took 71 ms to find 0 implicit places.
[2023-03-19 02:51:48] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 02:51:48] [INFO ] Invariant cache hit.
[2023-03-19 02:51:48] [INFO ] Dead Transitions using invariants and state equation in 39 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 129 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 133 ms :[(OR (NOT p2) (AND (NOT p0) p1)), true, p1]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-03 automaton TGBA Formula[mat=[[{ cond=(AND p0 p2), acceptance={} source=0 dest: 0}, { cond=(NOT p2), acceptance={} source=0 dest: 1}, { cond=(AND (NOT p0) p2), acceptance={} source=0 dest: 2}], [{ cond=true, acceptance={0} source=1 dest: 1}], [{ cond=(NOT p1), acceptance={} source=2 dest: 2}, { cond=p1, acceptance={0} source=2 dest: 2}]], initial=0, aps=[p0:(GT 1 s3), p2:(GT 3 s4), p1:(LEQ 2 s2)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null, null, null][true, true, true]]
Product exploration explored 100000 steps with 0 reset in 310 ms.
Stack based approach found an accepted trace after 134 steps with 0 reset with depth 135 and stack size 114 in 7 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-03 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-03 finished in 605 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((G(F(p0))&&F(p1)))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8 transition count 6
Reduce places removed 3 places and 0 transitions.
Graph (trivial) has 3 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 0 ms
Free SCC test removed 1 places
Iterating post reduction 1 with 4 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 5 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
// Phase 1: matrix 5 rows 4 cols
[2023-03-19 02:51:48] [INFO ] Computed 2 place invariants in 1 ms
[2023-03-19 02:51:48] [INFO ] Implicit Places using invariants in 30 ms returned []
[2023-03-19 02:51:48] [INFO ] Invariant cache hit.
[2023-03-19 02:51:48] [INFO ] Implicit Places using invariants and state equation in 30 ms returned []
Implicit Place search using SMT with State Equation took 63 ms to find 0 implicit places.
[2023-03-19 02:51:48] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 02:51:48] [INFO ] Invariant cache hit.
[2023-03-19 02:51:48] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 4/9 places, 5/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 109 ms. Remains : 4/9 places, 5/8 transitions.
Stuttering acceptance computed with spot in 210 ms :[(OR (NOT p0) (NOT p1)), (NOT p0), (NOT p0), (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-04 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={} source=0 dest: 1}, { cond=true, acceptance={} source=0 dest: 2}, { cond=(NOT p1), acceptance={} source=0 dest: 3}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}], [{ cond=(NOT p0), acceptance={} source=2 dest: 1}, { cond=true, acceptance={} source=2 dest: 2}], [{ cond=(NOT p1), acceptance={0} source=3 dest: 3}]], initial=0, aps=[p0:(LEQ 2 s2), p1:(LEQ 1 s3)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][true, true, true, true]]
Stuttering criterion allowed to conclude after 0 steps with 0 reset in 0 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-04 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-04 finished in 345 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(G(p0)))'
Support contains 1 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 2 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 7 cols
[2023-03-19 02:51:48] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 02:51:49] [INFO ] Implicit Places using invariants in 32 ms returned []
[2023-03-19 02:51:49] [INFO ] Invariant cache hit.
[2023-03-19 02:51:49] [INFO ] Implicit Places using invariants and state equation in 34 ms returned []
Implicit Place search using SMT with State Equation took 82 ms to find 0 implicit places.
[2023-03-19 02:51:49] [INFO ] Invariant cache hit.
[2023-03-19 02:51:49] [INFO ] Dead Transitions using invariants and state equation in 47 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 139 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 125 ms :[true, (NOT p0), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-05 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 2}], [{ cond=(NOT p0), acceptance={} source=2 dest: 0}, { cond=p0, acceptance={} source=2 dest: 2}]], initial=1, aps=[p0:(GT 3 s1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Entered a terminal (fully accepting) state of product in 1 steps with 0 reset in 0 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-05 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-05 finished in 285 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(((G(p0)||G(p1)) U (p2&&F(p3))))'
Support contains 5 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Applied a total of 0 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2023-03-19 02:51:49] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 02:51:49] [INFO ] Implicit Places using invariants in 22 ms returned []
[2023-03-19 02:51:49] [INFO ] Invariant cache hit.
[2023-03-19 02:51:49] [INFO ] Implicit Places using invariants and state equation in 43 ms returned []
Implicit Place search using SMT with State Equation took 67 ms to find 0 implicit places.
[2023-03-19 02:51:49] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 02:51:49] [INFO ] Invariant cache hit.
[2023-03-19 02:51:49] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 102 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 229 ms :[(OR (NOT p2) (NOT p3)), true, (NOT p0), (NOT p1), (AND (NOT p0) (NOT p1)), (NOT p3)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-06 automaton TGBA Formula[mat=[[{ cond=(OR (AND (NOT p2) p0) (AND (NOT p2) p1)), acceptance={0} source=0 dest: 0}, { cond=(AND (NOT p2) (NOT p0) (NOT p1)), acceptance={0} source=0 dest: 1}, { cond=(AND (NOT p2) p0 (NOT p1)), acceptance={0} source=0 dest: 2}, { cond=(AND (NOT p2) (NOT p0) p1), acceptance={0} source=0 dest: 3}, { cond=(AND (NOT p2) p0 p1), acceptance={0} source=0 dest: 4}, { cond=(AND p2 (NOT p3)), acceptance={0} source=0 dest: 5}], [{ cond=true, acceptance={0} source=1 dest: 1}], [{ cond=(NOT p0), acceptance={} source=2 dest: 1}, { cond=p0, acceptance={} source=2 dest: 2}], [{ cond=(NOT p1), acceptance={} source=3 dest: 1}, { cond=p1, acceptance={} source=3 dest: 3}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={} source=4 dest: 1}, { cond=(AND p0 (NOT p1)), acceptance={} source=4 dest: 2}, { cond=(AND (NOT p0) p1), acceptance={} source=4 dest: 3}, { cond=(AND p0 p1), acceptance={} source=4 dest: 4}], [{ cond=(NOT p3), acceptance={0} source=5 dest: 5}]], initial=0, aps=[p2:(LEQ s4 s5), p0:(LEQ 2 s2), p1:(LEQ s7 s3), p3:(LEQ 2 s4)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null, null][true, true, true, true, true, true]]
Product exploration explored 100000 steps with 2198 reset in 169 ms.
Stack based approach found an accepted trace after 19 steps with 0 reset with depth 20 and stack size 20 in 1 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-06 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-06 finished in 526 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((G(F(p0)) U p1))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Applied a total of 0 rules in 2 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
[2023-03-19 02:51:49] [INFO ] Invariant cache hit.
[2023-03-19 02:51:49] [INFO ] Implicit Places using invariants in 29 ms returned []
[2023-03-19 02:51:49] [INFO ] Invariant cache hit.
[2023-03-19 02:51:49] [INFO ] Implicit Places using invariants and state equation in 44 ms returned []
Implicit Place search using SMT with State Equation took 75 ms to find 0 implicit places.
[2023-03-19 02:51:49] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 02:51:49] [INFO ] Invariant cache hit.
[2023-03-19 02:51:49] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 122 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 179 ms :[(NOT p1), (NOT p0), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-07 automaton TGBA Formula[mat=[[{ cond=(NOT p1), acceptance={0} source=0 dest: 0}, { cond=(AND (NOT p1) (NOT p0)), acceptance={0} source=0 dest: 1}, { cond=(NOT p1), acceptance={0} source=0 dest: 2}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}], [{ cond=(NOT p0), acceptance={} source=2 dest: 1}, { cond=true, acceptance={} source=2 dest: 2}]], initial=0, aps=[p1:(GT s7 s5), p0:(LEQ s3 s1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null, null][true, true, true]]
Product exploration explored 100000 steps with 0 reset in 161 ms.
Product exploration explored 100000 steps with 0 reset in 224 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p1) p0), (X p0), (X (NOT (AND (NOT p1) (NOT p0)))), (X (NOT p1)), (X (X p0)), (X (X (NOT (AND (NOT p1) (NOT p0))))), true, (X (X (NOT p1)))]
False Knowledge obtained : []
Knowledge based reduction with 8 factoid took 326 ms. Reduced automaton from 3 states, 6 edges and 2 AP (stutter insensitive) to 3 states, 6 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 163 ms :[(NOT p1), (NOT p0), (NOT p0)]
Incomplete random walk after 10252 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=1464 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 3) seen :2
Running SMT prover for 1 properties.
[2023-03-19 02:51:51] [INFO ] Invariant cache hit.
[2023-03-19 02:51:51] [INFO ] After 33ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-19 02:51:51] [INFO ] [Nat]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-19 02:51:51] [INFO ] After 11ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-19 02:51:51] [INFO ] After 16ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-19 02:51:51] [INFO ] After 54ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Finished Parikh walk after 11262 steps, including 0 resets, run visited all 1 properties in 23 ms. (steps per millisecond=489 )
Parikh walk visited 1 properties in 23 ms.
Knowledge obtained : [(AND (NOT p1) p0), (X p0), (X (NOT (AND (NOT p1) (NOT p0)))), (X (NOT p1)), (X (X p0)), (X (X (NOT (AND (NOT p1) (NOT p0))))), true, (X (X (NOT p1)))]
False Knowledge obtained : [(F p1), (F (NOT p0)), (F (AND (NOT p0) (NOT p1)))]
Knowledge based reduction with 8 factoid took 563 ms. Reduced automaton from 3 states, 6 edges and 2 AP (stutter insensitive) to 3 states, 6 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 163 ms :[(NOT p1), (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 166 ms :[(NOT p1), (NOT p0), (NOT p0)]
[2023-03-19 02:51:52] [INFO ] Invariant cache hit.
[2023-03-19 02:51:52] [INFO ] [Real]Absence check using 3 positive place invariants in 2 ms returned unsat
Proved EG (NOT p1)
Knowledge obtained : [(AND (NOT p1) p0), (X p0), (X (NOT (AND (NOT p1) (NOT p0)))), (X (NOT p1)), (X (X p0)), (X (X (NOT (AND (NOT p1) (NOT p0))))), true, (X (X (NOT p1)))]
False Knowledge obtained : [(F p1), (F (NOT p0)), (F (AND (NOT p0) (NOT p1))), (G (NOT p1))]
Property proved to be false thanks to negative knowledge :(G (NOT p1))
Knowledge based reduction with 8 factoid took 283 ms. Reduced automaton from 3 states, 6 edges and 2 AP (stutter insensitive) to 1 states, 1 edges and 0 AP (stutter insensitive).
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-07 FALSE TECHNIQUES KNOWLEDGE
Treatment of property SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-07 finished in 2630 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(G(p0)))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
[2023-03-19 02:51:52] [INFO ] Invariant cache hit.
[2023-03-19 02:51:52] [INFO ] Implicit Places using invariants in 41 ms returned []
[2023-03-19 02:51:52] [INFO ] Invariant cache hit.
[2023-03-19 02:51:52] [INFO ] Implicit Places using invariants and state equation in 37 ms returned []
Implicit Place search using SMT with State Equation took 79 ms to find 0 implicit places.
[2023-03-19 02:51:52] [INFO ] Invariant cache hit.
[2023-03-19 02:51:52] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 8/9 places, 8/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 114 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 185 ms :[true, (NOT p0), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-08 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 2}], [{ cond=(NOT p0), acceptance={} source=2 dest: 0}, { cond=p0, acceptance={} source=2 dest: 2}]], initial=1, aps=[p0:(LEQ s2 s1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 0 reset in 155 ms.
Product exploration explored 100000 steps with 0 reset in 217 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X p0), (X (X p0)), true]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 206 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 119 ms :[true, (NOT p0), (NOT p0)]
Incomplete random walk after 10253 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=2563 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=1428 ) properties (out of 1) seen :0
Finished probabilistic random walk after 51961 steps, run visited all 1 properties in 169 ms. (steps per millisecond=307 )
Probabilistic random walk after 51961 steps, saw 28805 distinct states, run finished after 170 ms. (steps per millisecond=305 ) properties seen :1
Knowledge obtained : [p0, (X p0), (X (X p0)), true]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 4 factoid took 248 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 116 ms :[true, (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 120 ms :[true, (NOT p0), (NOT p0)]
Support contains 2 out of 8 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 8/8 (removed 0) transitions.
[2023-03-19 02:51:54] [INFO ] Invariant cache hit.
[2023-03-19 02:51:54] [INFO ] Implicit Places using invariants in 29 ms returned []
[2023-03-19 02:51:54] [INFO ] Invariant cache hit.
[2023-03-19 02:51:54] [INFO ] Implicit Places using invariants and state equation in 35 ms returned []
Implicit Place search using SMT with State Equation took 67 ms to find 0 implicit places.
[2023-03-19 02:51:54] [INFO ] Invariant cache hit.
[2023-03-19 02:51:54] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 104 ms. Remains : 8/8 places, 8/8 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X p0), (X (X p0)), true]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 209 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 111 ms :[true, (NOT p0), (NOT p0)]
Incomplete random walk after 10252 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=2563 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=1428 ) properties (out of 1) seen :0
Finished probabilistic random walk after 51961 steps, run visited all 1 properties in 100 ms. (steps per millisecond=519 )
Probabilistic random walk after 51961 steps, saw 28805 distinct states, run finished after 100 ms. (steps per millisecond=519 ) properties seen :1
Knowledge obtained : [p0, (X p0), (X (X p0)), true]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 4 factoid took 240 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 113 ms :[true, (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 117 ms :[true, (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 115 ms :[true, (NOT p0), (NOT p0)]
Product exploration explored 100000 steps with 0 reset in 155 ms.
Product exploration explored 100000 steps with 0 reset in 291 ms.
Applying partial POR strategy [true, false, true]
Stuttering acceptance computed with spot in 112 ms :[true, (NOT p0), (NOT p0)]
Support contains 2 out of 8 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 8/8 places, 8/8 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 0
Deduced a syphon composed of 1 places in 0 ms
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Deduced a syphon composed of 1 places in 0 ms
Applied a total of 1 rules in 2 ms. Remains 8 /8 variables (removed 0) and now considering 8/8 (removed 0) transitions.
[2023-03-19 02:51:56] [INFO ] Redundant transitions in 0 ms returned []
// Phase 1: matrix 8 rows 8 cols
[2023-03-19 02:51:56] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 02:51:56] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 8/8 places, 8/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 46 ms. Remains : 8/8 places, 8/8 transitions.
Support contains 2 out of 8 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2023-03-19 02:51:56] [INFO ] Computed 3 place invariants in 3 ms
[2023-03-19 02:51:56] [INFO ] Implicit Places using invariants in 32 ms returned []
[2023-03-19 02:51:56] [INFO ] Invariant cache hit.
[2023-03-19 02:51:56] [INFO ] Implicit Places using invariants and state equation in 34 ms returned []
Implicit Place search using SMT with State Equation took 69 ms to find 0 implicit places.
[2023-03-19 02:51:56] [INFO ] Invariant cache hit.
[2023-03-19 02:51:56] [INFO ] Dead Transitions using invariants and state equation in 37 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 109 ms. Remains : 8/8 places, 8/8 transitions.
Treatment of property SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-08 finished in 3915 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F((p0&&G(F((p1||(F(G(p2)) U !p2))))))))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
[2023-03-19 02:51:56] [INFO ] Invariant cache hit.
[2023-03-19 02:51:56] [INFO ] Implicit Places using invariants in 26 ms returned []
[2023-03-19 02:51:56] [INFO ] Invariant cache hit.
[2023-03-19 02:51:56] [INFO ] Implicit Places using invariants and state equation in 37 ms returned []
Implicit Place search using SMT with State Equation took 64 ms to find 0 implicit places.
[2023-03-19 02:51:56] [INFO ] Invariant cache hit.
[2023-03-19 02:51:56] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 8/9 places, 8/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 101 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 269 ms :[(OR (NOT p0) (AND (NOT p1) p2)), (OR (NOT p0) (AND (NOT p1) p2)), (AND (NOT p1) p2), (AND (NOT p1) p2), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-10 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p1) p2), acceptance={} source=1 dest: 2}, { cond=true, acceptance={} source=1 dest: 3}, { cond=(NOT p0), acceptance={} source=1 dest: 4}], [{ cond=(AND (NOT p1) p2), acceptance={0} source=2 dest: 2}], [{ cond=(AND (NOT p1) p2), acceptance={} source=3 dest: 2}, { cond=true, acceptance={} source=3 dest: 3}], [{ cond=(NOT p0), acceptance={0} source=4 dest: 4}]], initial=0, aps=[p1:(LEQ s4 s2), p2:(GT 1 s5), p0:(LEQ 2 s7)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Product exploration explored 100000 steps with 3 reset in 160 ms.
Product exploration explored 100000 steps with 3 reset in 223 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p1 (NOT p2) (NOT p0)), (X (NOT p0)), (X (NOT (AND (NOT p1) p2))), true, (X (X (NOT (AND (NOT p1) p2))))]
False Knowledge obtained : [(X (X (NOT p0))), (X (X p0))]
Knowledge sufficient to adopt a stutter insensitive property.
Knowledge based reduction with 5 factoid took 386 ms. Reduced automaton from 5 states, 8 edges and 3 AP (stutter sensitive) to 4 states, 6 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 266 ms :[(OR (NOT p0) (AND (NOT p1) p2)), (AND (NOT p1) p2), (AND (NOT p1) p2), (NOT p0)]
Incomplete random walk after 10255 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=2051 ) properties (out of 2) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=909 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-19 02:51:57] [INFO ] Invariant cache hit.
[2023-03-19 02:51:57] [INFO ] After 24ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-19 02:51:57] [INFO ] [Nat]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-19 02:51:57] [INFO ] After 10ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-19 02:51:57] [INFO ] After 15ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-19 02:51:57] [INFO ] After 50ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Finished Parikh walk after 6214 steps, including 0 resets, run visited all 1 properties in 11 ms. (steps per millisecond=564 )
Parikh walk visited 1 properties in 11 ms.
Knowledge obtained : [(AND p1 (NOT p2) (NOT p0)), (X (NOT p0)), (X (NOT (AND (NOT p1) p2))), true, (X (X (NOT (AND (NOT p1) p2))))]
False Knowledge obtained : [(X (X (NOT p0))), (X (X p0)), (F (AND (NOT p1) p2)), (F p0)]
Knowledge based reduction with 5 factoid took 421 ms. Reduced automaton from 4 states, 6 edges and 3 AP (stutter sensitive) to 4 states, 6 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 208 ms :[(OR (NOT p0) (AND (NOT p1) p2)), (AND (NOT p1) p2), (AND (NOT p1) p2), (NOT p0)]
Stuttering acceptance computed with spot in 221 ms :[(OR (NOT p0) (AND (NOT p1) p2)), (AND (NOT p1) p2), (AND (NOT p1) p2), (NOT p0)]
[2023-03-19 02:51:58] [INFO ] Invariant cache hit.
Proved EG (NOT p0)
Knowledge obtained : [(AND p1 (NOT p2) (NOT p0)), (X (NOT p0)), (X (NOT (AND (NOT p1) p2))), true, (X (X (NOT (AND (NOT p1) p2))))]
False Knowledge obtained : [(X (X (NOT p0))), (X (X p0)), (F (AND (NOT p1) p2)), (F p0), (G (NOT p0))]
Property proved to be false thanks to negative knowledge :(G (NOT p0))
Knowledge based reduction with 5 factoid took 258 ms. Reduced automaton from 4 states, 6 edges and 3 AP (stutter sensitive) to 1 states, 1 edges and 0 AP (stutter insensitive).
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-10 FALSE TECHNIQUES KNOWLEDGE
Treatment of property SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-10 finished in 2749 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((F((p0&&X(p1)))||X((p2&&(!p2 U p1))))))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 2 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 7 cols
[2023-03-19 02:51:59] [INFO ] Computed 3 place invariants in 0 ms
[2023-03-19 02:51:59] [INFO ] Implicit Places using invariants in 28 ms returned []
[2023-03-19 02:51:59] [INFO ] Invariant cache hit.
[2023-03-19 02:51:59] [INFO ] Implicit Places using invariants and state equation in 33 ms returned []
Implicit Place search using SMT with State Equation took 62 ms to find 0 implicit places.
[2023-03-19 02:51:59] [INFO ] Invariant cache hit.
[2023-03-19 02:51:59] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 96 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 283 ms :[(NOT p1), (OR (NOT p1) (AND (NOT p0) (NOT p2))), (OR (NOT p1) (AND (NOT p0) (NOT p2))), (OR (NOT p1) (AND (NOT p0) (NOT p2))), (OR (NOT p0) (NOT p1))]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-11 automaton TGBA Formula[mat=[[{ cond=(AND p0 (NOT p1)), acceptance={0} source=0 dest: 0}, { cond=(AND (NOT p0) (NOT p1)), acceptance={0} source=0 dest: 4}], [{ cond=(OR (AND p0 (NOT p2)) (AND p0 (NOT p1))), acceptance={} source=1 dest: 0}, { cond=(OR (AND (NOT p0) (NOT p2)) (AND (NOT p0) (NOT p1))), acceptance={} source=1 dest: 4}], [{ cond=true, acceptance={} source=2 dest: 3}], [{ cond=p0, acceptance={} source=3 dest: 0}, { cond=(NOT p0), acceptance={} source=3 dest: 1}], [{ cond=p0, acceptance={0} source=4 dest: 0}, { cond=(NOT p0), acceptance={0} source=4 dest: 4}]], initial=2, aps=[p0:(GT 2 s0), p1:(LEQ 1 s4), p2:(LEQ s5 s6)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, weak, inherently-weak], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Product exploration explored 100000 steps with 0 reset in 161 ms.
Stack based approach found an accepted trace after 11 steps with 0 reset with depth 12 and stack size 12 in 1 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-11 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-11 finished in 566 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((X(!p0) U (G(!p0)||X(F(!p1)))))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 3 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
[2023-03-19 02:51:59] [INFO ] Invariant cache hit.
[2023-03-19 02:51:59] [INFO ] Implicit Places using invariants in 31 ms returned []
[2023-03-19 02:51:59] [INFO ] Invariant cache hit.
[2023-03-19 02:51:59] [INFO ] Implicit Places using invariants and state equation in 33 ms returned []
Implicit Place search using SMT with State Equation took 67 ms to find 0 implicit places.
[2023-03-19 02:51:59] [INFO ] Invariant cache hit.
[2023-03-19 02:51:59] [INFO ] Dead Transitions using invariants and state equation in 29 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 102 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 168 ms :[p1, (AND p1 p0), (AND p1 p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-12 automaton TGBA Formula[mat=[[{ cond=p1, acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 2}], [{ cond=(AND p0 p1), acceptance={} source=2 dest: 0}, { cond=(AND (NOT p0) p1), acceptance={} source=2 dest: 2}]], initial=1, aps=[p1:(GT 1 s5), p0:(GT 3 s4)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 50000 reset in 117 ms.
Product exploration explored 100000 steps with 50000 reset in 125 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p1) p0), (X (NOT (AND (NOT p0) p1))), (X (NOT (AND p0 p1))), (X (X (NOT (AND (NOT p0) p1)))), (X (X (NOT (AND p0 p1)))), (X (X (NOT p1)))]
False Knowledge obtained : []
Property proved to be true thanks to knowledge :(X (NOT (AND p0 p1)))
Knowledge based reduction with 6 factoid took 165 ms. Reduced automaton from 3 states, 4 edges and 2 AP (stutter sensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-12 TRUE TECHNIQUES KNOWLEDGE
Treatment of property SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-12 finished in 706 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(((F(p0)||X(F(p1))) U X(p2)))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 5 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
[2023-03-19 02:52:00] [INFO ] Invariant cache hit.
[2023-03-19 02:52:00] [INFO ] Implicit Places using invariants in 37 ms returned []
[2023-03-19 02:52:00] [INFO ] Invariant cache hit.
[2023-03-19 02:52:00] [INFO ] Implicit Places using invariants and state equation in 31 ms returned []
Implicit Place search using SMT with State Equation took 72 ms to find 0 implicit places.
[2023-03-19 02:52:00] [INFO ] Invariant cache hit.
[2023-03-19 02:52:00] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 110 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 223 ms :[(NOT p2), (AND (NOT p0) (NOT p2) (NOT p1)), (NOT p2), (AND (NOT p0) (NOT p1))]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-14 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={} source=0 dest: 1}, { cond=true, acceptance={} source=0 dest: 2}], [{ cond=(AND (NOT p0) (NOT p2) (NOT p1)), acceptance={} source=1 dest: 3}], [{ cond=(AND (NOT p0) (NOT p2)), acceptance={} source=2 dest: 1}, { cond=(NOT p2), acceptance={} source=2 dest: 2}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={} source=3 dest: 3}]], initial=0, aps=[p0:(GT 2 s1), p2:(AND (LEQ s1 s3) (LEQ 2 s1)), p1:(GT s4 s6)], nbAcceptance=0, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Product exploration explored 100000 steps with 3551 reset in 147 ms.
Stack based approach found an accepted trace after 32 steps with 3 reset with depth 6 and stack size 6 in 0 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-14 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-14 finished in 510 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F((p0||X(p1)))))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2023-03-19 02:52:00] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 02:52:00] [INFO ] Implicit Places using invariants in 32 ms returned []
[2023-03-19 02:52:00] [INFO ] Invariant cache hit.
[2023-03-19 02:52:00] [INFO ] Implicit Places using invariants and state equation in 34 ms returned []
Implicit Place search using SMT with State Equation took 68 ms to find 0 implicit places.
[2023-03-19 02:52:00] [INFO ] Invariant cache hit.
[2023-03-19 02:52:00] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 8/9 places, 8/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 104 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 155 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-15 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(NOT p0), acceptance={} source=1 dest: 2}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={0} source=2 dest: 2}]], initial=0, aps=[p0:(LEQ 2 s7), p1:(LEQ s0 s7)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 14176 reset in 126 ms.
Stack based approach found an accepted trace after 9 steps with 1 reset with depth 5 and stack size 5 in 1 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-15 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-15 finished in 410 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(G(p0)))'
Found a Lengthening insensitive property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-08
Stuttering acceptance computed with spot in 114 ms :[true, (NOT p0), (NOT p0)]
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in LI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 6 transition count 7
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 0
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 5 place count 5 transition count 7
Applied a total of 5 rules in 3 ms. Remains 5 /9 variables (removed 4) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 5 cols
[2023-03-19 02:52:01] [INFO ] Computed 2 place invariants in 1 ms
[2023-03-19 02:52:01] [INFO ] Implicit Places using invariants in 25 ms returned []
[2023-03-19 02:52:01] [INFO ] Invariant cache hit.
[2023-03-19 02:52:01] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-19 02:52:01] [INFO ] Implicit Places using invariants and state equation in 30 ms returned []
Implicit Place search using SMT with State Equation took 58 ms to find 0 implicit places.
[2023-03-19 02:52:01] [INFO ] Invariant cache hit.
[2023-03-19 02:52:01] [INFO ] Dead Transitions using invariants and state equation in 30 ms found 0 transitions.
Starting structural reductions in LI_LTL mode, iteration 1 : 5/9 places, 7/8 transitions.
Finished structural reductions in LI_LTL mode , in 1 iterations and 93 ms. Remains : 5/9 places, 7/8 transitions.
Running random walk in product with property : SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-08 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 2}], [{ cond=(NOT p0), acceptance={} source=2 dest: 0}, { cond=p0, acceptance={} source=2 dest: 2}]], initial=1, aps=[p0:(LEQ s2 s1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak, sl-invariant], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 0 reset in 137 ms.
Product exploration explored 100000 steps with 0 reset in 145 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X p0), (X (X p0)), true]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 207 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 115 ms :[true, (NOT p0), (NOT p0)]
Finished random walk after 3075 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=1537 )
Knowledge obtained : [p0, (X p0), (X (X p0)), true]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 4 factoid took 224 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 241 ms :[true, (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 124 ms :[true, (NOT p0), (NOT p0)]
Support contains 2 out of 5 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 5/5 places, 7/7 transitions.
Applied a total of 0 rules in 0 ms. Remains 5 /5 variables (removed 0) and now considering 7/7 (removed 0) transitions.
[2023-03-19 02:52:02] [INFO ] Invariant cache hit.
[2023-03-19 02:52:02] [INFO ] Implicit Places using invariants in 24 ms returned []
[2023-03-19 02:52:02] [INFO ] Invariant cache hit.
[2023-03-19 02:52:02] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-19 02:52:02] [INFO ] Implicit Places using invariants and state equation in 35 ms returned []
Implicit Place search using SMT with State Equation took 61 ms to find 0 implicit places.
[2023-03-19 02:52:02] [INFO ] Invariant cache hit.
[2023-03-19 02:52:02] [INFO ] Dead Transitions using invariants and state equation in 38 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 100 ms. Remains : 5/5 places, 7/7 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X p0), (X (X p0)), true]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 207 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 133 ms :[true, (NOT p0), (NOT p0)]
Incomplete random walk after 10251 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=2562 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=714 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 3856172 steps, run timeout after 3001 ms. (steps per millisecond=1284 ) properties seen :{}
Probabilistic random walk after 3856172 steps, saw 941893 distinct states, run finished after 3002 ms. (steps per millisecond=1284 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-19 02:52:06] [INFO ] Invariant cache hit.
[2023-03-19 02:52:06] [INFO ] After 25ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-19 02:52:06] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-19 02:52:06] [INFO ] After 9ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-19 02:52:06] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-19 02:52:06] [INFO ] After 4ms SMT Verify possible using 1 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-19 02:52:06] [INFO ] After 8ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-19 02:52:06] [INFO ] After 55ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Finished Parikh walk after 7170 steps, including 0 resets, run visited all 1 properties in 8 ms. (steps per millisecond=896 )
Parikh walk visited 1 properties in 8 ms.
Knowledge obtained : [p0, (X p0), (X (X p0)), true]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 4 factoid took 231 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 114 ms :[true, (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 116 ms :[true, (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 115 ms :[true, (NOT p0), (NOT p0)]
Product exploration explored 100000 steps with 0 reset in 158 ms.
Product exploration explored 100000 steps with 0 reset in 171 ms.
Applying partial POR strategy [true, false, true]
Stuttering acceptance computed with spot in 197 ms :[true, (NOT p0), (NOT p0)]
Support contains 2 out of 5 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 5/5 places, 7/7 transitions.
Applied a total of 0 rules in 1 ms. Remains 5 /5 variables (removed 0) and now considering 7/7 (removed 0) transitions.
[2023-03-19 02:52:07] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 02:52:07] [INFO ] Invariant cache hit.
[2023-03-19 02:52:07] [INFO ] Dead Transitions using invariants and state equation in 30 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 40 ms. Remains : 5/5 places, 7/7 transitions.
Support contains 2 out of 5 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 5/5 places, 7/7 transitions.
Applied a total of 0 rules in 0 ms. Remains 5 /5 variables (removed 0) and now considering 7/7 (removed 0) transitions.
[2023-03-19 02:52:07] [INFO ] Invariant cache hit.
[2023-03-19 02:52:07] [INFO ] Implicit Places using invariants in 27 ms returned []
[2023-03-19 02:52:07] [INFO ] Invariant cache hit.
[2023-03-19 02:52:07] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-19 02:52:07] [INFO ] Implicit Places using invariants and state equation in 52 ms returned []
Implicit Place search using SMT with State Equation took 81 ms to find 0 implicit places.
[2023-03-19 02:52:07] [INFO ] Invariant cache hit.
[2023-03-19 02:52:07] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 115 ms. Remains : 5/5 places, 7/7 transitions.
Treatment of property SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-08 finished in 6617 ms.
[2023-03-19 02:52:07] [INFO ] Flatten gal took : 4 ms
[2023-03-19 02:52:07] [INFO ] Export to MCC of 1 properties in file /home/mcc/execution/LTLCardinality.sr.xml took 2 ms.
[2023-03-19 02:52:07] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 9 places, 8 transitions and 27 arcs took 0 ms.
Total runtime 29874 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SmallOperatingSystem-PT-MT4096DC1024
BK_EXAMINATION: LTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
LTLCardinality
BK_STOP 1679194339367
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/LTLCardinality.xml
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 1 (type EXCL) for 0 SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-08
lola: time limit : 3600 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 5/3600 18/32 SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-08 2754599 m, 550919 m/sec, 6844945 t fired, .
Time elapsed: 5 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 1
lola: CANCELED task # 1 (type EXCL) for SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-08 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-08: LTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 10 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 1
lola: Portfolio finished: no open tasks 1
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT4096DC1024-LTLCardinality-08: LTL unknown AGGR
Time elapsed: 10 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT4096DC1024"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SmallOperatingSystem-PT-MT4096DC1024, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912646900123"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT4096DC1024.tgz
mv SmallOperatingSystem-PT-MT4096DC1024 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;