fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r455-smll-167912646900089
Last Updated
May 14, 2023

About the Execution of LoLa+red for SmallOperatingSystem-PT-MT1024DC0256

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16226.031 196757.00 373071.00 10236.60 FFF?FTTFFT??T?FT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r455-smll-167912646900089.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SmallOperatingSystem-PT-MT1024DC0256, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912646900089
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 496K
-rw-r--r-- 1 mcc users 11K Feb 25 12:40 CTLCardinality.txt
-rw-r--r-- 1 mcc users 97K Feb 25 12:40 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Feb 25 12:40 CTLFireability.txt
-rw-r--r-- 1 mcc users 70K Feb 25 12:40 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 17:08 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Feb 25 17:08 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Feb 25 17:08 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:08 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 12:41 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 110K Feb 25 12:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Feb 25 12:41 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 48K Feb 25 12:41 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 17:08 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 17:08 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 13 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 8.1K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-01
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-02
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-03
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-05
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-06
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-07
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-08
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-09
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-12
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1679191331522

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT1024DC0256
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 02:02:15] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 02:02:15] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 02:02:15] [INFO ] Load time of PNML (sax parser for PT used): 28 ms
[2023-03-19 02:02:15] [INFO ] Transformed 9 places.
[2023-03-19 02:02:15] [INFO ] Transformed 8 transitions.
[2023-03-19 02:02:15] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 125 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 23 ms.
Support contains 9 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 13 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2023-03-19 02:02:15] [INFO ] Computed 4 place invariants in 7 ms
[2023-03-19 02:02:15] [INFO ] Implicit Places using invariants in 179 ms returned []
[2023-03-19 02:02:15] [INFO ] Invariant cache hit.
[2023-03-19 02:02:15] [INFO ] Implicit Places using invariants and state equation in 40 ms returned []
Implicit Place search using SMT with State Equation took 263 ms to find 0 implicit places.
[2023-03-19 02:02:15] [INFO ] Invariant cache hit.
[2023-03-19 02:02:15] [INFO ] Dead Transitions using invariants and state equation in 39 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 316 ms. Remains : 9/9 places, 8/8 transitions.
Support contains 9 out of 9 places after structural reductions.
[2023-03-19 02:02:16] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-19 02:02:16] [INFO ] Flatten gal took : 33 ms
FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 02:02:16] [INFO ] Flatten gal took : 8 ms
[2023-03-19 02:02:16] [INFO ] Input system was already deterministic with 8 transitions.
Incomplete random walk after 10025 steps, including 2 resets, run finished after 109 ms. (steps per millisecond=91 ) properties (out of 71) seen :24
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 79 ms. (steps per millisecond=12 ) properties (out of 47) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 85 ms. (steps per millisecond=11 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 51 ms. (steps per millisecond=19 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 70 ms. (steps per millisecond=14 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 49 ms. (steps per millisecond=20 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 80 ms. (steps per millisecond=12 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 54 ms. (steps per millisecond=18 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=15 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=23 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=31 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=32 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=33 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=35 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=25 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=35 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=28 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=31 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=32 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=37 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=37 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Running SMT prover for 46 properties.
[2023-03-19 02:02:17] [INFO ] Invariant cache hit.
[2023-03-19 02:02:17] [INFO ] [Real]Absence check using 4 positive place invariants in 3 ms returned sat
[2023-03-19 02:02:18] [INFO ] After 58ms SMT Verify possible using state equation in real domain returned unsat :17 sat :1 real:28
[2023-03-19 02:02:18] [INFO ] After 66ms SMT Verify possible using trap constraints in real domain returned unsat :17 sat :0 real:29
[2023-03-19 02:02:18] [INFO ] After 283ms SMT Verify possible using all constraints in real domain returned unsat :17 sat :0 real:29
[2023-03-19 02:02:18] [INFO ] [Nat]Absence check using 4 positive place invariants in 3 ms returned sat
[2023-03-19 02:02:18] [INFO ] After 82ms SMT Verify possible using state equation in natural domain returned unsat :25 sat :21
[2023-03-19 02:02:18] [INFO ] After 185ms SMT Verify possible using trap constraints in natural domain returned unsat :25 sat :21
Attempting to minimize the solution found.
Minimization took 94 ms.
[2023-03-19 02:02:18] [INFO ] After 451ms SMT Verify possible using all constraints in natural domain returned unsat :25 sat :21
Fused 46 Parikh solutions to 21 different solutions.
Finished Parikh walk after 3535 steps, including 0 resets, run visited all 2 properties in 37 ms. (steps per millisecond=95 )
Parikh walk visited 21 properties in 1387 ms.
Successfully simplified 25 atomic propositions for a total of 15 simplifications.
[2023-03-19 02:02:19] [INFO ] Flatten gal took : 4 ms
[2023-03-19 02:02:19] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 02:02:19] [INFO ] Flatten gal took : 3 ms
[2023-03-19 02:02:19] [INFO ] Input system was already deterministic with 8 transitions.
FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 8/8 transitions.
[2023-03-19 02:02:19] [INFO ] Flatten gal took : 2 ms
[2023-03-19 02:02:19] [INFO ] Flatten gal took : 2 ms
[2023-03-19 02:02:19] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 3 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 7/9 places, 7/8 transitions.
[2023-03-19 02:02:20] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:20] [INFO ] Flatten gal took : 2 ms
[2023-03-19 02:02:20] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 4 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 8/9 places, 7/8 transitions.
[2023-03-19 02:02:20] [INFO ] Flatten gal took : 2 ms
[2023-03-19 02:02:20] [INFO ] Flatten gal took : 2 ms
[2023-03-19 02:02:20] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 8/8 transitions.
[2023-03-19 02:02:20] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:20] [INFO ] Flatten gal took : 2 ms
[2023-03-19 02:02:20] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 7 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 5 place count 5 transition count 6
Applied a total of 5 rules in 7 ms. Remains 5 /9 variables (removed 4) and now considering 6/8 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 5/9 places, 6/8 transitions.
[2023-03-19 02:02:20] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:20] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:20] [INFO ] Input system was already deterministic with 6 transitions.
Finished random walk after 257 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=128 )
FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 3 place count 7 transition count 6
Reduce places removed 2 places and 0 transitions.
Graph (trivial) has 2 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 3 ms
Free SCC test removed 1 places
Iterating post reduction 2 with 3 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 7 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 4/9 places, 5/8 transitions.
[2023-03-19 02:02:20] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:20] [INFO ] Flatten gal took : 0 ms
[2023-03-19 02:02:20] [INFO ] Input system was already deterministic with 5 transitions.
Incomplete random walk after 10262 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=1710 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 1) seen :0
Finished probabilistic random walk after 7758 steps, run visited all 1 properties in 33 ms. (steps per millisecond=235 )
Probabilistic random walk after 7758 steps, saw 2119 distinct states, run finished after 33 ms. (steps per millisecond=235 ) properties seen :1
FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-06 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 0 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/9 places, 8/8 transitions.
[2023-03-19 02:02:20] [INFO ] Flatten gal took : 2 ms
[2023-03-19 02:02:20] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:20] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Applied a total of 0 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 8/8 transitions.
[2023-03-19 02:02:20] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:20] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:20] [INFO ] Input system was already deterministic with 8 transitions.
Incomplete random walk after 10029 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=2507 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=1000 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 2847415 steps, run timeout after 3001 ms. (steps per millisecond=948 ) properties seen :{}
Probabilistic random walk after 2847415 steps, saw 1201875 distinct states, run finished after 3001 ms. (steps per millisecond=948 ) properties seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 8 rows 8 cols
[2023-03-19 02:02:23] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 02:02:23] [INFO ] [Real]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-19 02:02:23] [INFO ] After 45ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-19 02:02:23] [INFO ] [Nat]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 02:02:23] [INFO ] After 10ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-19 02:02:23] [INFO ] After 14ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 4 ms.
[2023-03-19 02:02:23] [INFO ] After 45ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Finished Parikh walk after 2881 steps, including 0 resets, run visited all 1 properties in 6 ms. (steps per millisecond=480 )
FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-09 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 1 properties in 5 ms.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 9/9 places, 8/8 transitions.
[2023-03-19 02:02:23] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:23] [INFO ] Flatten gal took : 2 ms
[2023-03-19 02:02:23] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 1 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 7/9 places, 7/8 transitions.
[2023-03-19 02:02:23] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:23] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:23] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 1 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 7/9 places, 7/8 transitions.
[2023-03-19 02:02:23] [INFO ] Flatten gal took : 0 ms
[2023-03-19 02:02:23] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:23] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 1 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 7/9 places, 7/8 transitions.
[2023-03-19 02:02:23] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:23] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:23] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 8/8 transitions.
[2023-03-19 02:02:23] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:23] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:23] [INFO ] Input system was already deterministic with 8 transitions.
[2023-03-19 02:02:23] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:23] [INFO ] Flatten gal took : 1 ms
[2023-03-19 02:02:23] [INFO ] Export to MCC of 10 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 1 ms.
[2023-03-19 02:02:23] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 9 places, 8 transitions and 27 arcs took 1 ms.
Total runtime 7974 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SmallOperatingSystem-PT-MT1024DC0256
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/376

FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679191528279

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/376/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/376/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/376/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 5 (type EXCL) for 0 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 42 (type FNDP) for 14 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 43 (type EQUN) for 14 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 45 (type SRCH) for 14 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 42 (type FNDP) for SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-03
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 43 (type EQUN) for SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-03 (obsolete)
lola: CANCELED task # 45 (type SRCH) for SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-03 (obsolete)
lola: FINISHED task # 43 (type EQUN) for SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-03
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 47 (type FNDP) for 0 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 48 (type EQUN) for 0 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type SRCH) for 0 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 50 (type SRCH) for SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00
lola: result : unknown
lola: markings : 4
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 52 (type FNDP) for 33 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 47 (type FNDP) for SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00
lola: result : true
lola: fired transitions : 54
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 5 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00 (obsolete)
lola: CANCELED task # 48 (type EQUN) for SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00 (obsolete)
lola: LAUNCH task # 40 (type EXCL) for 39 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EQUN) for SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00
lola: result : unknown
lola: FINISHED task # 40 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15
lola: result : true
lola: markings : 1181953
lola: fired transitions : 1968902
lola: time used : 2.000000
lola: memory pages used : 5
lola: LAUNCH task # 37 (type EXCL) for 36 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14
lola: time limit : 399 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00: CONJ false findpath
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15: CTL true CTL model checker

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 3/399 3/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14 600830 m, 120166 m/sec, 2862686 t fired, .
52 EF DL FNDP 5/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 71293432 t fired, 72 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 8/399 6/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14 1314300 m, 142694 m/sec, 6964559 t fired, .
52 EF DL FNDP 10/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 149138382 t fired, 150 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 13/399 9/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14 2013902 m, 139920 m/sec, 10979005 t fired, .
52 EF DL FNDP 15/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 224507371 t fired, 225 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 18/399 11/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14 2706057 m, 138431 m/sec, 14946974 t fired, .
52 EF DL FNDP 20/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 299796989 t fired, 300 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 23/399 14/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14 3395868 m, 137962 m/sec, 18900665 t fired, .
52 EF DL FNDP 25/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 371861753 t fired, 372 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 28/399 17/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14 4083801 m, 137586 m/sec, 22841878 t fired, .
52 EF DL FNDP 30/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 449173267 t fired, 450 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 33/399 20/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14 4775799 m, 138399 m/sec, 26806015 t fired, .
52 EF DL FNDP 35/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 527217347 t fired, 528 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 38/399 22/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14 5457381 m, 136316 m/sec, 30707400 t fired, .
52 EF DL FNDP 40/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 605362992 t fired, 606 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 43/399 25/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14 6137228 m, 135969 m/sec, 34599514 t fired, .
52 EF DL FNDP 45/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 683489636 t fired, 684 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 48/399 28/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14 6808472 m, 134248 m/sec, 38442810 t fired, .
52 EF DL FNDP 50/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 761572374 t fired, 762 attempts, .

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lola: FINISHED task # 37 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14
lola: result : false
lola: markings : 6898959
lola: fired transitions : 38963528
lola: time used : 49.000000
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lola: LAUNCH task # 31 (type EXCL) for 30 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11
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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15: CTL true CTL model checker

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 4/443 10/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11 2479890 m, 495978 m/sec, 6579979 t fired, .
52 EF DL FNDP 55/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 839353328 t fired, 840 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15: CTL true CTL model checker

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 9/443 23/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11 5580272 m, 620076 m/sec, 14305322 t fired, .
52 EF DL FNDP 60/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 917054889 t fired, 918 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00: CONJ false findpath
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15: CTL true CTL model checker

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF DL FNDP 65/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 994878917 t fired, 995 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00: CONJ false findpath
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15: CTL true CTL model checker

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 5/505 13/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10 3155535 m, 631107 m/sec, 7843630 t fired, .
52 EF DL FNDP 70/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 1072801728 t fired, 1073 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00: CONJ false findpath
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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-01: CONJ 0 2 0 0 2 0 0 0
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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 10/505 24/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10 5834214 m, 535735 m/sec, 14517707 t fired, .
52 EF DL FNDP 75/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 1150290738 t fired, 1151 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00: CONJ false findpath
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15: CTL true CTL model checker

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 1 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF DL FNDP 80/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 1228010813 t fired, 1229 attempts, .

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lola: FINISHED task # 25 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-08
lola: result : false
lola: markings : 149380
lola: fired transitions : 298379
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lola: result : false
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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-00: CONJ false findpath
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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-08: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15: CTL true CTL model checker

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 0 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 EF DL EXCL 4/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 23064841 m, 4612968 m/sec, 23064840 t fired, .
52 EF DL FNDP 85/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 1305640027 t fired, 1306 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-08: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15: CTL true CTL model checker

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 0 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 EF DL EXCL 9/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 52156250 m, 5818281 m/sec, 52156250 t fired, .
52 EF DL FNDP 90/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 1383281309 t fired, 1384 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-08: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15: CTL true CTL model checker

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 0 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 EF DL EXCL 14/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 81329575 m, 5834665 m/sec, 81329575 t fired, .
52 EF DL FNDP 95/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 1460896343 t fired, 1461 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-08: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15: CTL true CTL model checker

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 0 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 EF DL EXCL 19/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 110451809 m, 5824446 m/sec, 110451808 t fired, .
52 EF DL FNDP 100/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 1538214042 t fired, 1539 attempts, .

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-04: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-08: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-14: CTL false CTL model checker
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-15: CTL true CTL model checker

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SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13: EF DL 0 0 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 EF DL EXCL 24/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 139736978 m, 5857033 m/sec, 139736978 t fired, .
52 EF DL FNDP 105/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 1615362882 t fired, 1616 attempts, .

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51 EF DL EXCL 29/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 168982893 m, 5849183 m/sec, 168982892 t fired, .
52 EF DL FNDP 110/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 1685672345 t fired, 1686 attempts, .

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51 EF DL EXCL 34/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 198306553 m, 5864732 m/sec, 198306554 t fired, .
52 EF DL FNDP 115/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 1761857041 t fired, 1762 attempts, .

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51 EF DL EXCL 39/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 227538958 m, 5846481 m/sec, 227538959 t fired, .
52 EF DL FNDP 120/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 1838063258 t fired, 1839 attempts, .

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51 EF DL EXCL 44/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 256825069 m, 5857222 m/sec, 256825069 t fired, .
52 EF DL FNDP 125/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 1914199789 t fired, 1915 attempts, .

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51 EF DL EXCL 49/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 285866438 m, 5808273 m/sec, 285866437 t fired, .
52 EF DL FNDP 130/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 1990372896 t fired, 1991 attempts, .

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51 EF DL EXCL 54/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 306518957 m, 4130503 m/sec, 306518957 t fired, .
52 EF DL FNDP 135/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 2064431296 t fired, 2065 attempts, .

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51 EF DL EXCL 59/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 316373323 m, 1970873 m/sec, 316373322 t fired, .
52 EF DL FNDP 140/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 2130075535 t fired, 2131 attempts, .

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51 EF DL EXCL 64/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 320615763 m, 848488 m/sec, 320615763 t fired, .
52 EF DL FNDP 145/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 -2093024258 t fired, 2202 attempts, .

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51 EF DL EXCL 69/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 329298923 m, 1736632 m/sec, 329298923 t fired, .
52 EF DL FNDP 150/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 -2023770043 t fired, 2272 attempts, .

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51 EF DL EXCL 75/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 340334810 m, 2207177 m/sec, 340334809 t fired, .
52 EF DL FNDP 156/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 -1940405911 t fired, 2355 attempts, .

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51 EF DL EXCL 80/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 352577088 m, 2448455 m/sec, 352577087 t fired, .
52 EF DL FNDP 161/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 -1875588460 t fired, 2420 attempts, .

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51 EF DL EXCL 85/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 361826062 m, 1849794 m/sec, 361826063 t fired, .
52 EF DL FNDP 166/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 -1807923937 t fired, 2488 attempts, .

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51 EF DL EXCL 90/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 369965987 m, 1627985 m/sec, 369965987 t fired, .
52 EF DL FNDP 171/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 -1738574149 t fired, 2557 attempts, .

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51 EF DL EXCL 95/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 380794234 m, 2165649 m/sec, 380794235 t fired, .
52 EF DL FNDP 176/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 -1672275182 t fired, 2623 attempts, .

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51 EF DL EXCL 100/1759 1/32 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 386989141 m, 1238981 m/sec, 386989140 t fired, .
52 EF DL FNDP 181/3600 0/5 SmallOperatingSystem-PT-MT1024DC0256-CTLCardinality-13 -1600332897 t fired, 2695 attempts, .

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/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 487 Killed lola --conf=$BIN_DIR/configfiles/ctlcardinalityconf --formula=$DIR/CTLCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT1024DC0256"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SmallOperatingSystem-PT-MT1024DC0256, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912646900089"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT1024DC0256.tgz
mv SmallOperatingSystem-PT-MT1024DC0256 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;