Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r455-smll-167912646900073.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SmallOperatingSystem-PT-MT0512DC0128, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912646900073
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 640K
-rw-r--r-- 1 mcc users 9.1K Feb 25 12:42 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K Feb 25 12:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.2K Feb 25 12:42 CTLFireability.txt
-rw-r--r-- 1 mcc users 59K Feb 25 12:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 17:08 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 17:08 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 17:08 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 17:08 LTLFireability.xml
-rw-r--r-- 1 mcc users 23K Feb 25 12:43 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 213K Feb 25 12:43 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Feb 25 12:43 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 110K Feb 25 12:43 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 17:08 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 17:08 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 13 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 8.2K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-00
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-01
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-02
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-03
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-04
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-05
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-06
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-07
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-08
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-10
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-11
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-12
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-13
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14
FORMULA_NAME SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1679184991875

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT0512DC0128
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 00:16:35] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 00:16:35] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 00:16:35] [INFO ] Load time of PNML (sax parser for PT used): 41 ms
[2023-03-19 00:16:35] [INFO ] Transformed 9 places.
[2023-03-19 00:16:35] [INFO ] Transformed 8 transitions.
[2023-03-19 00:16:35] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 186 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 32 ms.
Support contains 9 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 19 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2023-03-19 00:16:36] [INFO ] Computed 4 place invariants in 5 ms
[2023-03-19 00:16:36] [INFO ] Implicit Places using invariants in 215 ms returned []
[2023-03-19 00:16:36] [INFO ] Invariant cache hit.
[2023-03-19 00:16:36] [INFO ] Implicit Places using invariants and state equation in 51 ms returned []
Implicit Place search using SMT with State Equation took 325 ms to find 0 implicit places.
[2023-03-19 00:16:36] [INFO ] Invariant cache hit.
[2023-03-19 00:16:36] [INFO ] Dead Transitions using invariants and state equation in 47 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 393 ms. Remains : 9/9 places, 8/8 transitions.
Support contains 9 out of 9 places after structural reductions.
[2023-03-19 00:16:36] [INFO ] Flatten gal took : 29 ms
[2023-03-19 00:16:36] [INFO ] Flatten gal took : 9 ms
[2023-03-19 00:16:36] [INFO ] Input system was already deterministic with 8 transitions.
Incomplete random walk after 10197 steps, including 2 resets, run finished after 120 ms. (steps per millisecond=84 ) properties (out of 79) seen :42
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 67 ms. (steps per millisecond=14 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 86 ms. (steps per millisecond=11 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 36 ms. (steps per millisecond=27 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=24 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 52 ms. (steps per millisecond=19 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=25 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=32 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=26 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=34 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=28 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=23 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=30 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=32 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=38 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 36 ms. (steps per millisecond=27 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 37) seen :0
Running SMT prover for 37 properties.
[2023-03-19 00:16:38] [INFO ] Invariant cache hit.
[2023-03-19 00:16:38] [INFO ] [Real]Absence check using 4 positive place invariants in 1 ms returned sat
[2023-03-19 00:16:38] [INFO ] After 215ms SMT Verify possible using all constraints in real domain returned unsat :21 sat :0 real:16
[2023-03-19 00:16:38] [INFO ] [Nat]Absence check using 4 positive place invariants in 2 ms returned sat
[2023-03-19 00:16:38] [INFO ] After 57ms SMT Verify possible using state equation in natural domain returned unsat :26 sat :11
[2023-03-19 00:16:38] [INFO ] After 121ms SMT Verify possible using trap constraints in natural domain returned unsat :26 sat :11
Attempting to minimize the solution found.
Minimization took 54 ms.
[2023-03-19 00:16:38] [INFO ] After 295ms SMT Verify possible using all constraints in natural domain returned unsat :26 sat :11
Fused 37 Parikh solutions to 11 different solutions.
Finished Parikh walk after 950 steps, including 0 resets, run visited all 1 properties in 5 ms. (steps per millisecond=190 )
Parikh walk visited 11 properties in 409 ms.
Successfully simplified 26 atomic propositions for a total of 16 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 00:16:38] [INFO ] Flatten gal took : 6 ms
[2023-03-19 00:16:39] [INFO ] Flatten gal took : 4 ms
[2023-03-19 00:16:39] [INFO ] Input system was already deterministic with 8 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 7 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 10 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 7/9 places, 7/8 transitions.
[2023-03-19 00:16:39] [INFO ] Flatten gal took : 2 ms
[2023-03-19 00:16:39] [INFO ] Flatten gal took : 2 ms
[2023-03-19 00:16:39] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 2 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 7/9 places, 7/8 transitions.
[2023-03-19 00:16:39] [INFO ] Flatten gal took : 2 ms
[2023-03-19 00:16:39] [INFO ] Flatten gal took : 2 ms
[2023-03-19 00:16:39] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 5 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 7/9 places, 7/8 transitions.
[2023-03-19 00:16:39] [INFO ] Flatten gal took : 2 ms
[2023-03-19 00:16:39] [INFO ] Flatten gal took : 2 ms
[2023-03-19 00:16:39] [INFO ] Input system was already deterministic with 7 transitions.
Incomplete random walk after 10062 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=838 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 3345795 steps, run timeout after 3001 ms. (steps per millisecond=1114 ) properties seen :{}
Probabilistic random walk after 3345795 steps, saw 1224361 distinct states, run finished after 3001 ms. (steps per millisecond=1114 ) properties seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 7 rows 7 cols
[2023-03-19 00:16:42] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 00:16:42] [INFO ] After 21ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-19 00:16:42] [INFO ] [Nat]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 00:16:42] [INFO ] After 7ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-19 00:16:42] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-19 00:16:42] [INFO ] After 5ms SMT Verify possible using 1 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-19 00:16:42] [INFO ] After 8ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 3 ms.
[2023-03-19 00:16:42] [INFO ] After 43ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Finished Parikh walk after 763 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=254 )
FORMULA SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-02 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 1 properties in 2 ms.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 1 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 7/9 places, 7/8 transitions.
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 2 ms
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 1 ms
[2023-03-19 00:16:42] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 9/9 places, 8/8 transitions.
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 1 ms
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 1 ms
[2023-03-19 00:16:42] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 3 place count 7 transition count 6
Reduce places removed 2 places and 0 transitions.
Graph (trivial) has 2 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 2 ms
Free SCC test removed 1 places
Iterating post reduction 2 with 3 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 4 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 4/9 places, 5/8 transitions.
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 1 ms
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 1 ms
[2023-03-19 00:16:42] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 9/9 places, 8/8 transitions.
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 1 ms
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 1 ms
[2023-03-19 00:16:42] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 9/9 places, 8/8 transitions.
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 1 ms
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 1 ms
[2023-03-19 00:16:42] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 1 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 7/9 places, 7/8 transitions.
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 0 ms
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 1 ms
[2023-03-19 00:16:42] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8 transition count 6
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 5 place count 5 transition count 6
Applied a total of 5 rules in 1 ms. Remains 5 /9 variables (removed 4) and now considering 6/8 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 5/9 places, 6/8 transitions.
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 0 ms
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 1 ms
[2023-03-19 00:16:42] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 7/8 transitions.
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 1 ms
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 1 ms
[2023-03-19 00:16:42] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 7 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 1 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 7/9 places, 7/8 transitions.
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 1 ms
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 1 ms
[2023-03-19 00:16:42] [INFO ] Input system was already deterministic with 7 transitions.
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 2 ms
[2023-03-19 00:16:42] [INFO ] Flatten gal took : 36 ms
[2023-03-19 00:16:42] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 2 ms.
[2023-03-19 00:16:42] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 9 places, 8 transitions and 27 arcs took 1 ms.
Total runtime 6617 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SmallOperatingSystem-PT-MT0512DC0128
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/364

FORMULA SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679185079211

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/364/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/364/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/364/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:207
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: LAUNCH task # 19 (type EXCL) for 18 SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:703
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-00: AGEF 0 1 0 0 1 0 0 0
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SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
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SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09: CTL 0 0 1 0 1 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-13: DISJ 0 2 0 0 2 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 5/300 5/32 SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09 1238942 m, 247788 m/sec, 4654115 t fired, .

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SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-13: DISJ 0 2 0 0 2 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

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19 CTL EXCL 10/300 10/32 SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09 2266618 m, 205535 m/sec, 8937180 t fired, .

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SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-13: DISJ 0 2 0 0 2 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

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19 CTL EXCL 15/300 14/32 SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09 3375915 m, 221859 m/sec, 13538628 t fired, .

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lola: FINISHED task # 19 (type EXCL) for SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09
lola: result : false
lola: markings : 3833196
lola: fired transitions : 15428962
lola: time used : 18.000000
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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lola: FINISHED task # 16 (type EXCL) for SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-08
lola: result : false
lola: markings : 332358
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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10 CTL EXCL 4/511 8/32 SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-06 1797104 m, 359420 m/sec, 6258683 t fired, .

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lola: result : false
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lola: fired transitions : 6546063
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1 AGEF EXCL 9/595 31/32 SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-00 8268589 m, 838452 m/sec, 11430424 t fired, .

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lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-07
lola: result : true
lola: markings : 3917
lola: fired transitions : 16592
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-01
lola: time limit : 890 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-06: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-07: AGEF true tscc_search
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-08: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-10: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-13: DISJ true state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-00: AGEF 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-01: CTL 0 0 1 0 1 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

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4 CTL EXCL 5/890 12/32 SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-01 2942099 m, 588419 m/sec, 7312215 t fired, .

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SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-08: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-10: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-13: DISJ true state space /EXEF

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SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/890 24/32 SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-01 5895938 m, 590767 m/sec, 14616867 t fired, .

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SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-06: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-07: AGEF true tscc_search
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-08: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-10: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-13: DISJ true state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-00: AGEF 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-01: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

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lola: LAUNCH task # 7 (type EXCL) for 6 SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-05
lola: time limit : 1181 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-05
lola: result : true
lola: markings : 1
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-12
lola: time limit : 1772 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-12
lola: result : false
lola: markings : 1232
lola: fired transitions : 4207
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 34 SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14
lola: time limit : 3545 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-05: CTL true CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-06: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-07: AGEF true tscc_search
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-08: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-10: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-12: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-13: DISJ true state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-00: AGEF 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-01: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 5/3545 12/32 SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14 2891462 m, 578292 m/sec, 7926952 t fired, .

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SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-05: CTL true CTL model checker
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SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-07: AGEF true tscc_search
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-08: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-10: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-12: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-13: DISJ true state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-01: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 10/3545 22/32 SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14 5442024 m, 510112 m/sec, 15274764 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-05: CTL true CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-06: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-07: AGEF true tscc_search
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-08: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-10: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-12: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-13: DISJ true state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-00: AGEF 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-01: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 15/3545 32/32 SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14 7937136 m, 499022 m/sec, 22481544 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-05: CTL true CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-06: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-07: AGEF true tscc_search
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-08: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-10: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-12: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-13: DISJ true state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-00: AGEF 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-01: CTL 0 0 0 0 1 0 1 0
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-00: AGEF unknown AGGR
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-01: CTL unknown AGGR
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-05: CTL true CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-06: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-07: AGEF true tscc_search
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-08: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-09: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-10: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-12: CTL false CTL model checker
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-13: DISJ true state space /EXEF
SmallOperatingSystem-PT-MT0512DC0128-CTLCardinality-14: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT0512DC0128"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SmallOperatingSystem-PT-MT0512DC0128, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912646900073"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT0512DC0128.tgz
mv SmallOperatingSystem-PT-MT0512DC0128 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;