fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r454-smll-167912646400460
Last Updated
May 14, 2023

About the Execution of LoLA for StigmergyCommit-PT-06a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
641.779 54669.00 55467.00 184.50 FTFTTFFFFFTFFFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r454-smll-167912646400460.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is StigmergyCommit-PT-06a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r454-smll-167912646400460
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.3M
-rw-r--r-- 1 mcc users 9.5K Feb 26 11:04 CTLCardinality.txt
-rw-r--r-- 1 mcc users 110K Feb 26 11:04 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 26 11:02 CTLFireability.txt
-rw-r--r-- 1 mcc users 55K Feb 26 11:02 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 26 11:05 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 122K Feb 26 11:05 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.6K Feb 26 11:04 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 72K Feb 26 11:04 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 1.8M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-00
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-01
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-02
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-03
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-04
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-05
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-06
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-07
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-08
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-09
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-10
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-11
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-12
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-13
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-14
FORMULA_NAME StigmergyCommit-PT-06a-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1679374284685

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=StigmergyCommit-PT-06a
Not applying reductions.
Model is PT
LTLFireability PT
starting LoLA
BK_INPUT StigmergyCommit-PT-06a
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
LTLFireability

FORMULA StigmergyCommit-PT-06a-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-06a-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-06a-LTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-06a-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-06a-LTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-06a-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-06a-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-06a-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-06a-LTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-06a-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-06a-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-06a-LTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-06a-LTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-06a-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-06a-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-06a-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679374339354

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:518
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:427
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:409
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 23 (type EXCL) for 22 StigmergyCommit-PT-06a-LTLFireability-06
lola: time limit : 128 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for StigmergyCommit-PT-06a-LTLFireability-06
lola: result : false
lola: markings : 14
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 46 (type CNST) for 43 StigmergyCommit-PT-06a-LTLFireability-13
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 46 (type CNST) for StigmergyCommit-PT-06a-LTLFireability-13
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 60 (type EXCL) for 9 StigmergyCommit-PT-06a-LTLFireability-03
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 62 (type FNDP) for 6 StigmergyCommit-PT-06a-LTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 6 StigmergyCommit-PT-06a-LTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SRCH) for 6 StigmergyCommit-PT-06a-LTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: FINISHED task # 65 (type SRCH) for StigmergyCommit-PT-06a-LTLFireability-02
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 60 (type EXCL) for StigmergyCommit-PT-06a-LTLFireability-03
lola: result : false
lola: markings : 127
lola: fired transitions : 441
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 58 (type EXCL) for 57 StigmergyCommit-PT-06a-LTLFireability-15
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 62 (type FNDP) for StigmergyCommit-PT-06a-LTLFireability-02
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 63 (type EQUN) for StigmergyCommit-PT-06a-LTLFireability-02 (obsolete)
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/LTLFireability-63.sara.
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 63 (type EQUN) for StigmergyCommit-PT-06a-LTLFireability-02
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-06a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-06a-LTLFireability-03: F true state space / EG
StigmergyCommit-PT-06a-LTLFireability-06: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-13: CONJ false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-06a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-06a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-14: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-06a-LTLFireability-15: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 LTL EXCL 5/257 4/32 StigmergyCommit-PT-06a-LTLFireability-15 523184 m, 104636 m/sec, 3091186 t fired, .

Time elapsed: 6 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 58 (type EXCL) for StigmergyCommit-PT-06a-LTLFireability-15
lola: result : true
lola: markings : 1058842
lola: fired transitions : 6386661
lola: time used : 9.000000
lola: memory pages used : 7
lola: LAUNCH task # 55 (type EXCL) for 50 StigmergyCommit-PT-06a-LTLFireability-14
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 55 (type EXCL) for StigmergyCommit-PT-06a-LTLFireability-14
lola: result : false
lola: markings : 56
lola: fired transitions : 56
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 40 StigmergyCommit-PT-06a-LTLFireability-12
lola: time limit : 326 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-06a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-06a-LTLFireability-03: F true state space / EG
StigmergyCommit-PT-06a-LTLFireability-06: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-13: CONJ false preprocessing
StigmergyCommit-PT-06a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-06a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-06a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-12: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 1/326 1/32 StigmergyCommit-PT-06a-LTLFireability-12 47012 m, 9402 m/sec, 233314 t fired, .

Time elapsed: 11 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-06a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-06a-LTLFireability-03: F true state space / EG
StigmergyCommit-PT-06a-LTLFireability-06: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-13: CONJ false preprocessing
StigmergyCommit-PT-06a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-06a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-06a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-12: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 6/326 5/32 StigmergyCommit-PT-06a-LTLFireability-12 621994 m, 114996 m/sec, 3695250 t fired, .

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StigmergyCommit-PT-06a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-06a-LTLFireability-03: F true state space / EG
StigmergyCommit-PT-06a-LTLFireability-06: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-13: CONJ false preprocessing
StigmergyCommit-PT-06a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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StigmergyCommit-PT-06a-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-06a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-12: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 11/326 7/32 StigmergyCommit-PT-06a-LTLFireability-12 997667 m, 75134 m/sec, 7833034 t fired, .

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StigmergyCommit-PT-06a-LTLFireability-06: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-13: CONJ false preprocessing
StigmergyCommit-PT-06a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-15: LTL true LTL model checker

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41 LTL EXCL 16/326 9/32 StigmergyCommit-PT-06a-LTLFireability-12 1336130 m, 67692 m/sec, 11934587 t fired, .

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lola: FINISHED task # 41 (type EXCL) for StigmergyCommit-PT-06a-LTLFireability-12
lola: result : false
lola: markings : 1555909
lola: fired transitions : 13965688
lola: time used : 18.000000
lola: memory pages used : 10
lola: LAUNCH task # 38 (type EXCL) for 37 StigmergyCommit-PT-06a-LTLFireability-11
lola: time limit : 357 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for StigmergyCommit-PT-06a-LTLFireability-11
lola: result : false
lola: markings : 2212
lola: fired transitions : 17260
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 34 StigmergyCommit-PT-06a-LTLFireability-10
lola: time limit : 396 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-06a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-06a-LTLFireability-03: F true state space / EG
StigmergyCommit-PT-06a-LTLFireability-06: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-12: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-13: CONJ false preprocessing
StigmergyCommit-PT-06a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-15: LTL true LTL model checker

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StigmergyCommit-PT-06a-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
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StigmergyCommit-PT-06a-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 LTL EXCL 2/396 2/32 StigmergyCommit-PT-06a-LTLFireability-10 255086 m, 51017 m/sec, 1472830 t fired, .

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StigmergyCommit-PT-06a-LTLFireability-06: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-12: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-13: CONJ false preprocessing
StigmergyCommit-PT-06a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-15: LTL true LTL model checker

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 LTL EXCL 7/396 6/32 StigmergyCommit-PT-06a-LTLFireability-10 816469 m, 112276 m/sec, 4883349 t fired, .

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StigmergyCommit-PT-06a-LTLFireability-03: F true state space / EG
StigmergyCommit-PT-06a-LTLFireability-06: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-12: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-13: CONJ false preprocessing
StigmergyCommit-PT-06a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-15: LTL true LTL model checker

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StigmergyCommit-PT-06a-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-05: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-06a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 LTL EXCL 12/396 9/32 StigmergyCommit-PT-06a-LTLFireability-10 1246037 m, 85913 m/sec, 8521712 t fired, .

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StigmergyCommit-PT-06a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-06a-LTLFireability-03: F true state space / EG
StigmergyCommit-PT-06a-LTLFireability-06: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-12: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-13: CONJ false preprocessing
StigmergyCommit-PT-06a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-15: LTL true LTL model checker

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StigmergyCommit-PT-06a-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
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StigmergyCommit-PT-06a-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-06a-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 LTL EXCL 17/396 11/32 StigmergyCommit-PT-06a-LTLFireability-10 1583574 m, 67507 m/sec, 12588869 t fired, .

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StigmergyCommit-PT-06a-LTLFireability-03: F true state space / EG
StigmergyCommit-PT-06a-LTLFireability-06: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-12: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-13: CONJ false preprocessing
StigmergyCommit-PT-06a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-15: LTL true LTL model checker

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35 LTL EXCL 22/396 13/32 StigmergyCommit-PT-06a-LTLFireability-10 1888627 m, 61010 m/sec, 16320095 t fired, .

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lola: FINISHED task # 35 (type EXCL) for StigmergyCommit-PT-06a-LTLFireability-10
lola: result : true
lola: markings : 2117683
lola: fired transitions : 19159982
lola: time used : 26.000000
lola: memory pages used : 14
lola: LAUNCH task # 29 (type EXCL) for 28 StigmergyCommit-PT-06a-LTLFireability-08
lola: time limit : 443 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for StigmergyCommit-PT-06a-LTLFireability-08
lola: result : false
lola: markings : 47
lola: fired transitions : 47
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 15 StigmergyCommit-PT-06a-LTLFireability-05
lola: time limit : 506 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for StigmergyCommit-PT-06a-LTLFireability-05
lola: result : false
lola: markings : 46
lola: fired transitions : 46
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 StigmergyCommit-PT-06a-LTLFireability-04
lola: time limit : 709 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for StigmergyCommit-PT-06a-LTLFireability-04
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 StigmergyCommit-PT-06a-LTLFireability-01
lola: time limit : 886 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for StigmergyCommit-PT-06a-LTLFireability-01
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 StigmergyCommit-PT-06a-LTLFireability-00
lola: time limit : 1181 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for StigmergyCommit-PT-06a-LTLFireability-00
lola: result : false
lola: markings : 48
lola: fired transitions : 48
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 StigmergyCommit-PT-06a-LTLFireability-09
lola: time limit : 1772 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for StigmergyCommit-PT-06a-LTLFireability-09
lola: result : false
lola: markings : 72
lola: fired transitions : 201
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 StigmergyCommit-PT-06a-LTLFireability-07
lola: time limit : 3545 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for StigmergyCommit-PT-06a-LTLFireability-07
lola: result : false
lola: markings : 756
lola: fired transitions : 8698
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-06a-LTLFireability-00: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-01: LTL true LTL model checker
StigmergyCommit-PT-06a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-06a-LTLFireability-03: F true state space / EG
StigmergyCommit-PT-06a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-06a-LTLFireability-05: CONJ false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-06: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-07: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-08: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-10: LTL true LTL model checker
StigmergyCommit-PT-06a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-12: LTL false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-13: CONJ false preprocessing
StigmergyCommit-PT-06a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-06a-LTLFireability-15: LTL true LTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyCommit-PT-06a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is StigmergyCommit-PT-06a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r454-smll-167912646400460"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/StigmergyCommit-PT-06a.tgz
mv StigmergyCommit-PT-06a execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;