fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r436-tajo-167905984800319
Last Updated
May 14, 2023

About the Execution of LoLA for SimpleLoadBal-PT-05

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
53.428 197.00 80.00 0.00 F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r436-tajo-167905984800319.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.......................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is SimpleLoadBal-PT-05, examination is Liveness
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r436-tajo-167905984800319
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 724K
-rw-r--r-- 1 mcc users 6.6K Feb 26 03:49 CTLCardinality.txt
-rw-r--r-- 1 mcc users 54K Feb 26 03:49 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.2K Feb 26 03:48 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 26 03:48 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.1K Feb 25 17:06 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 17:06 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Feb 25 17:06 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:06 LTLFireability.xml
-rw-r--r-- 1 mcc users 28K Feb 26 03:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 241K Feb 26 03:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 03:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 71K Feb 26 03:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 17:06 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:06 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 155K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME Liveness

=== Now, execution of the tool begins

BK_START 1679510618691

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=Liveness
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=1800
BK_INPUT=SimpleLoadBal-PT-05
Not applying reductions.
Model is PT
Liveness PT
starting LoLA
BK_INPUT SimpleLoadBal-PT-05
BK_EXAMINATION: Liveness
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
GlobalProperty: Liveness

FORMULA Liveness FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679510618888

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: LAUNCH SYMM
lola: ..... T-lb_balance_to_2_97: true
lola: ..... T-lb_idle_receive_notification_11: false
lola: INDIVIDUAL RESULTS
lola: T-server_process_10: void (by not produced)
lola: T-lb_idle_receive_notification_10: void (by not produced)
lola: T-lb_idle_receive_notification_11: false (by universal search)
lola: T-lb_idle_receive_notification_12: void (by not produced)
lola: T-lb_balance_to_1_116: void (by not produced)
lola: T-lb_balance_to_1_117: void (by not produced)
lola: T-lb_balance_to_1_118: void (by not produced)
lola: T-lb_balance_to_1_119: void (by not produced)
lola: T-lb_balance_to_1_120: void (by not produced)
lola: T-lb_balance_to_2_61: void (by not produced)
lola: T-lb_balance_to_2_62: void (by not produced)
lola: T-lb_balance_to_2_63: void (by not produced)
lola: T-lb_balance_to_2_64: void (by not produced)
lola: T-lb_balance_to_2_65: void (by not produced)
lola: T-lb_balance_to_2_96: void (by not produced)
lola: T-lb_balance_to_2_97: true (by goal oriented search)
lola: T-lb_balance_to_2_98: void (by not produced)
lola: T-lb_balance_to_2_99: void (by not produced)
lola: T-lb_route_to_2_100: void (by not produced)
lola: T-lb_route_to_2_107: void (by not produced)
lola: T-lb_route_to_2_115: void (by not produced)
lola: T-lb_route_to_2_122: void (by not produced)
lola: T-lb_route_to_2_129: void (by not produced)
lola: T-lb_route_to_2_136: void (by not produced)
lola: T-lb_route_to_2_143: void (by not produced)
lola: T-lb_route_to_2_151: void (by not produced)
lola: T-lb_route_to_2_158: void (by not produced)
lola: T-lb_route_to_2_165: void (by not produced)
lola: T-lb_route_to_2_172: void (by not produced)
lola: T-lb_route_to_2_179: void (by not produced)
lola: T-lb_balance_to_1_11: void (by not produced)
lola: T-lb_balance_to_1_12: void (by not produced)
lola: T-lb_balance_to_1_13: void (by not produced)
lola: T-lb_balance_to_1_14: void (by not produced)
lola: T-lb_balance_to_1_15: void (by not produced)
lola: T-lb_balance_to_1_46: void (by not produced)
lola: T-lb_balance_to_1_47: void (by not produced)
lola: T-lb_balance_to_1_48: void (by not produced)
lola: T-lb_balance_to_1_49: void (by not produced)
lola: T-lb_balance_to_1_50: void (by not produced)
lola: T-lb_balance_to_1_81: void (by not produced)
lola: T-lb_balance_to_1_82: void (by not produced)
lola: T-lb_balance_to_1_83: void (by not produced)
lola: T-lb_balance_to_1_84: void (by not produced)
lola: T-lb_balance_to_1_85: void (by not produced)
lola: T-lb_idle_receive_notification_2: void (by not produced)
lola: T-lb_idle_receive_notification_3: void (by not produced)
lola: T-lb_idle_receive_notification_4: void (by not produced)
lola: T-lb_idle_receive_notification_5: void (by not produced)
lola: T-lb_idle_receive_notification_6: void (by not produced)
lola: T-lb_idle_receive_notification_8: void (by not produced)
lola: T-lb_idle_receive_notification_9: void (by not produced)
lola: T-server_process_1: void (by not produced)
lola: T-server_process_2: void (by not produced)
lola: T-server_process_3: void (by not produced)
lola: T-server_process_4: void (by not produced)
lola: T-server_process_5: void (by not produced)
lola: T-server_process_6: void (by not produced)
lola: T-server_process_7: void (by not produced)
lola: T-server_process_8: void (by not produced)
lola: T-server_process_9: void (by not produced)
lola: T-lb_balancing_receive_notification_2: void (by not produced)
lola: T-lb_balancing_receive_notification_3: void (by not produced)
lola: T-lb_balancing_receive_notification_4: void (by not produced)
lola: T-lb_balancing_receive_notification_5: void (by not produced)
lola: T-lb_balancing_receive_notification_6: void (by not produced)
lola: T-lb_balancing_receive_notification_8: void (by not produced)
lola: T-lb_balancing_receive_notification_9: void (by not produced)
lola: T-lb_balancing_receive_notification_10: void (by not produced)
lola: T-lb_balancing_receive_notification_11: void (by not produced)
lola: T-lb_balancing_receive_notification_12: void (by not produced)
lola: T-lb_receive_client_1: void (by not produced)
lola: T-lb_receive_client_2: void (by not produced)
lola: T-lb_receive_client_3: void (by not produced)
lola: T-lb_receive_client_4: void (by not produced)
lola: T-lb_receive_client_5: void (by not produced)
lola: T-lb_balance_to_2_100: void (by not produced)
lola: T-lb_balance_to_2_131: void (by not produced)
lola: T-lb_balance_to_2_132: void (by not produced)
lola: T-lb_balance_to_2_133: void (by not produced)
lola: T-lb_balance_to_2_134: void (by not produced)
lola: T-lb_balance_to_2_135: void (by not produced)
lola: T-lb_balance_to_2_166: void (by not produced)
lola: T-lb_balance_to_2_167: void (by not produced)
lola: T-lb_balance_to_2_168: void (by not produced)
lola: T-lb_balance_to_2_169: void (by not produced)
lola: T-lb_balance_to_2_170: void (by not produced)
lola: T-lb_route_to_2_14: void (by not produced)
lola: T-lb_route_to_2_21: void (by not produced)
lola: T-lb_route_to_2_28: void (by not produced)
lola: T-lb_route_to_2_35: void (by not produced)
lola: T-lb_route_to_2_43: void (by not produced)
lola: T-lb_route_to_2_50: void (by not produced)
lola: T-lb_route_to_2_57: void (by not produced)
lola: T-lb_route_to_2_64: void (by not produced)
lola: T-lb_route_to_2_71: void (by not produced)
lola: T-lb_route_to_2_79: void (by not produced)
lola: T-lb_route_to_2_86: void (by not produced)
lola: T-lb_route_to_2_93: void (by not produced)
lola: T-lb_no_balance_1: void (by not produced)
lola: T-lb_no_balance_2: void (by not produced)
lola: T-lb_no_balance_7: void (by not produced)
lola: T-lb_no_balance_8: void (by not produced)
lola: T-lb_no_balance_9: void (by not produced)
lola: T-lb_route_to_1_15: void (by not produced)
lola: T-lb_route_to_1_16: void (by not produced)
lola: T-lb_route_to_1_22: void (by not produced)
lola: T-lb_route_to_1_23: void (by not produced)
lola: T-lb_route_to_1_29: void (by not produced)
lola: T-lb_route_to_1_30: void (by not produced)
lola: T-lb_route_to_1_37: void (by not produced)
lola: T-lb_route_to_1_38: void (by not produced)
lola: T-lb_route_to_1_44: void (by not produced)
lola: T-lb_route_to_1_45: void (by not produced)
lola: T-lb_route_to_1_51: void (by not produced)
lola: T-lb_route_to_1_52: void (by not produced)
lola: T-lb_route_to_1_58: void (by not produced)
lola: T-lb_route_to_1_59: void (by not produced)
lola: T-lb_route_to_1_65: void (by not produced)
lola: T-lb_route_to_1_66: void (by not produced)
lola: T-lb_route_to_1_73: void (by not produced)
lola: T-lb_route_to_1_74: void (by not produced)
lola: T-lb_route_to_1_80: void (by not produced)
lola: T-lb_route_to_1_81: void (by not produced)
lola: T-lb_route_to_1_87: void (by not produced)
lola: T-lb_route_to_1_88: void (by not produced)
lola: T-lb_route_to_1_94: void (by not produced)
lola: T-lb_route_to_1_95: void (by not produced)
lola: T-lb_route_to_1_1: void (by not produced)
lola: T-lb_route_to_1_2: void (by not produced)
lola: T-lb_route_to_1_8: void (by not produced)
lola: T-lb_route_to_1_9: void (by not produced)
lola: T-lb_route_to_2_7: void (by not produced)
lola: T-lb_no_balance_14: void (by not produced)
lola: T-lb_no_balance_15: void (by not produced)
lola: T-lb_no_balance_16: void (by not produced)
lola: T-lb_no_balance_21: void (by not produced)
lola: T-lb_no_balance_22: void (by not produced)
lola: T-lb_no_balance_23: void (by not produced)
lola: T-lb_no_balance_28: void (by not produced)
lola: T-lb_no_balance_29: void (by not produced)
lola: T-lb_no_balance_30: void (by not produced)
lola: T-lb_no_balance_35: void (by not produced)
lola: T-lb_no_balance_36: void (by not produced)
lola: T-server_endloop_1: void (by not produced)
lola: T-server_endloop_2: void (by not produced)
lola: T-lb_route_to_1_101: void (by not produced)
lola: T-lb_route_to_1_102: void (by not produced)
lola: T-lb_route_to_1_109: void (by not produced)
lola: T-lb_route_to_1_110: void (by not produced)
lola: T-lb_route_to_1_116: void (by not produced)
lola: T-lb_route_to_1_117: void (by not produced)
lola: T-lb_route_to_1_123: void (by not produced)
lola: T-lb_route_to_1_124: void (by not produced)
lola: T-lb_route_to_1_130: void (by not produced)
lola: T-lb_route_to_1_131: void (by not produced)
lola: T-lb_route_to_1_137: void (by not produced)
lola: T-lb_route_to_1_138: void (by not produced)
lola: T-lb_route_to_1_145: void (by not produced)
lola: T-lb_route_to_1_146: void (by not produced)
lola: T-lb_route_to_1_152: void (by not produced)
lola: T-lb_route_to_1_153: void (by not produced)
lola: T-lb_route_to_1_159: void (by not produced)
lola: T-lb_route_to_1_160: void (by not produced)
lola: T-lb_route_to_1_166: void (by not produced)
lola: T-lb_route_to_1_167: void (by not produced)
lola: T-lb_route_to_1_173: void (by not produced)
lola: T-lb_route_to_1_174: void (by not produced)
lola: The net is not live
lola: Example for violating transition: T-lb_idle_receive_notification_11

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SimpleLoadBal-PT-05"
export BK_EXAMINATION="Liveness"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is SimpleLoadBal-PT-05, examination is Liveness"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r436-tajo-167905984800319"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SimpleLoadBal-PT-05.tgz
mv SimpleLoadBal-PT-05 execution
cd execution
if [ "Liveness" = "ReachabilityDeadlock" ] || [ "Liveness" = "UpperBounds" ] || [ "Liveness" = "QuasiLiveness" ] || [ "Liveness" = "StableMarking" ] || [ "Liveness" = "Liveness" ] || [ "Liveness" = "OneSafe" ] || [ "Liveness" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "Liveness" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "Liveness" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "Liveness.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property Liveness.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "Liveness.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' Liveness.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "Liveness" = "ReachabilityDeadlock" ] || [ "Liveness" = "QuasiLiveness" ] || [ "Liveness" = "StableMarking" ] || [ "Liveness" = "Liveness" ] || [ "Liveness" = "OneSafe" ] ; then
echo "FORMULA_NAME Liveness"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;