Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r423-tajo-167905976700418.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
....................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SieveSingleMsgMbox-PT-d1m18, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-tajo-167905976700418
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 928K
-rw-r--r-- 1 mcc users 6.3K Feb 26 10:32 CTLCardinality.txt
-rw-r--r-- 1 mcc users 63K Feb 26 10:32 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 26 10:31 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 26 10:31 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:05 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 17:05 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 17:05 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:05 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 10:33 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 114K Feb 26 10:33 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 26 10:33 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 122K Feb 26 10:33 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 17:05 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:05 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 450K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-00
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-01
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-02
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-03
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-04
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-05
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-06
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-07
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-08
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-09
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-10
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-11
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-12
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-13
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-14
FORMULA_NAME SieveSingleMsgMbox-PT-d1m18-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679247146182

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SieveSingleMsgMbox-PT-d1m18
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 17:32:28] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 17:32:28] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 17:32:28] [INFO ] Load time of PNML (sax parser for PT used): 131 ms
[2023-03-19 17:32:28] [INFO ] Transformed 1295 places.
[2023-03-19 17:32:28] [INFO ] Transformed 749 transitions.
[2023-03-19 17:32:28] [INFO ] Parsed PT model containing 1295 places and 749 transitions and 2996 arcs in 259 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 19 ms.
Deduced a syphon composed of 1036 places in 16 ms
Reduce places removed 1036 places and 0 transitions.
Support contains 53 out of 259 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 259/259 places, 749/749 transitions.
Reduce places removed 17 places and 0 transitions.
Ensure Unique test removed 240 transitions
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 0 with 257 rules applied. Total rules applied 257 place count 242 transition count 509
Discarding 33 places :
Symmetric choice reduction at 1 with 33 rule applications. Total rules 290 place count 209 transition count 460
Iterating global reduction 1 with 33 rules applied. Total rules applied 323 place count 209 transition count 460
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 333 place count 209 transition count 450
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 345 place count 197 transition count 438
Iterating global reduction 2 with 12 rules applied. Total rules applied 357 place count 197 transition count 438
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 360 place count 197 transition count 435
Discarding 8 places :
Symmetric choice reduction at 3 with 8 rule applications. Total rules 368 place count 189 transition count 426
Iterating global reduction 3 with 8 rules applied. Total rules applied 376 place count 189 transition count 426
Ensure Unique test removed 18 transitions
Reduce isomorphic transitions removed 18 transitions.
Iterating post reduction 3 with 18 rules applied. Total rules applied 394 place count 189 transition count 408
Applied a total of 394 rules in 98 ms. Remains 189 /259 variables (removed 70) and now considering 408/749 (removed 341) transitions.
// Phase 1: matrix 408 rows 189 cols
[2023-03-19 17:32:28] [INFO ] Computed 5 place invariants in 21 ms
[2023-03-19 17:32:28] [INFO ] Implicit Places using invariants in 325 ms returned []
[2023-03-19 17:32:28] [INFO ] Invariant cache hit.
[2023-03-19 17:32:29] [INFO ] State equation strengthened by 278 read => feed constraints.
[2023-03-19 17:32:29] [INFO ] Implicit Places using invariants and state equation in 1012 ms returned []
Implicit Place search using SMT with State Equation took 1367 ms to find 0 implicit places.
[2023-03-19 17:32:29] [INFO ] Invariant cache hit.
[2023-03-19 17:32:30] [INFO ] Dead Transitions using invariants and state equation in 246 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 189/259 places, 408/749 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1712 ms. Remains : 189/259 places, 408/749 transitions.
Support contains 53 out of 189 places after structural reductions.
[2023-03-19 17:32:30] [INFO ] Flatten gal took : 59 ms
[2023-03-19 17:32:30] [INFO ] Flatten gal took : 26 ms
[2023-03-19 17:32:30] [INFO ] Input system was already deterministic with 408 transitions.
Support contains 52 out of 189 places (down from 53) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2187 resets, run finished after 698 ms. (steps per millisecond=14 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 43 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 43 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 50 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 49 resets, run finished after 30 ms. (steps per millisecond=33 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 48 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 42 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 57 resets, run finished after 31 ms. (steps per millisecond=32 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 49 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 56 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 46 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 46 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 49 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 50 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 100 resets, run finished after 28 ms. (steps per millisecond=35 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 45 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 45 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 56 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 42 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 118 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 39 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 50 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 47 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 50 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 45 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 49 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 50 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 49 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 97 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 48 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 26 ms. (steps per millisecond=38 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 48 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 54 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 55 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 51 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 48 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 46 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1000 steps, including 46 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 42 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 46 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 55) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 55) seen :0
Interrupted probabilistic random walk after 140690 steps, run timeout after 3001 ms. (steps per millisecond=46 ) properties seen :{0=1, 2=1, 3=1, 4=1, 9=1, 11=1, 17=1, 21=1, 22=1, 23=1, 24=1, 25=1, 28=1, 29=1, 30=1, 31=1, 33=1, 34=1, 35=1, 36=1, 38=1, 39=1, 43=1, 45=1, 48=1, 49=1, 53=1, 54=1}
Probabilistic random walk after 140690 steps, saw 66629 distinct states, run finished after 3007 ms. (steps per millisecond=46 ) properties seen :28
Running SMT prover for 27 properties.
[2023-03-19 17:32:34] [INFO ] Invariant cache hit.
[2023-03-19 17:32:35] [INFO ] [Real]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-19 17:32:35] [INFO ] [Real]Absence check using 2 positive and 3 generalized place invariants in 6 ms returned sat
[2023-03-19 17:32:36] [INFO ] After 1039ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:25
[2023-03-19 17:32:36] [INFO ] [Nat]Absence check using 2 positive place invariants in 21 ms returned sat
[2023-03-19 17:32:36] [INFO ] [Nat]Absence check using 2 positive and 3 generalized place invariants in 5 ms returned sat
[2023-03-19 17:32:37] [INFO ] After 968ms SMT Verify possible using state equation in natural domain returned unsat :5 sat :22
[2023-03-19 17:32:37] [INFO ] State equation strengthened by 278 read => feed constraints.
[2023-03-19 17:32:39] [INFO ] After 2225ms SMT Verify possible using 278 Read/Feed constraints in natural domain returned unsat :5 sat :22
[2023-03-19 17:32:40] [INFO ] Deduced a trap composed of 27 places in 104 ms of which 16 ms to minimize.
[2023-03-19 17:32:40] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 132 ms
[2023-03-19 17:32:40] [INFO ] Deduced a trap composed of 24 places in 112 ms of which 1 ms to minimize.
[2023-03-19 17:32:40] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 210 ms
[2023-03-19 17:32:42] [INFO ] After 5315ms SMT Verify possible using trap constraints in natural domain returned unsat :5 sat :22
Attempting to minimize the solution found.
Minimization took 2381 ms.
[2023-03-19 17:32:45] [INFO ] After 9123ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :22
Fused 27 Parikh solutions to 22 different solutions.
Parikh walk visited 1 properties in 1228 ms.
Support contains 25 out of 189 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 189/189 places, 408/408 transitions.
Graph (complete) has 702 edges and 189 vertex of which 188 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.1 ms
Discarding 1 places :
Also discarding 0 output transitions
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 3 place count 188 transition count 406
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 19 place count 172 transition count 307
Iterating global reduction 1 with 16 rules applied. Total rules applied 35 place count 172 transition count 307
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 38 place count 172 transition count 304
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 49 place count 161 transition count 293
Iterating global reduction 2 with 11 rules applied. Total rules applied 60 place count 161 transition count 293
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 61 place count 161 transition count 292
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 64 place count 158 transition count 289
Iterating global reduction 3 with 3 rules applied. Total rules applied 67 place count 158 transition count 289
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 69 place count 158 transition count 287
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 70 place count 157 transition count 286
Iterating global reduction 4 with 1 rules applied. Total rules applied 71 place count 157 transition count 286
Applied a total of 71 rules in 93 ms. Remains 157 /189 variables (removed 32) and now considering 286/408 (removed 122) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 94 ms. Remains : 157/189 places, 286/408 transitions.
Incomplete random walk after 10000 steps, including 2210 resets, run finished after 416 ms. (steps per millisecond=24 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 60 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 38 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 48 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 47 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 50 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 48 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 49 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 48 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 99 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 50 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 47 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 50 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 110 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 52 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 44 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 50 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 59 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 46 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 21) seen :0
Interrupted probabilistic random walk after 175236 steps, run timeout after 3001 ms. (steps per millisecond=58 ) properties seen :{2=1, 13=1}
Probabilistic random walk after 175236 steps, saw 79400 distinct states, run finished after 3001 ms. (steps per millisecond=58 ) properties seen :2
Running SMT prover for 19 properties.
// Phase 1: matrix 286 rows 157 cols
[2023-03-19 17:32:50] [INFO ] Computed 4 place invariants in 4 ms
[2023-03-19 17:32:50] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-19 17:32:50] [INFO ] [Real]Absence check using 2 positive and 2 generalized place invariants in 2 ms returned sat
[2023-03-19 17:32:50] [INFO ] After 617ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:19
[2023-03-19 17:32:51] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-19 17:32:51] [INFO ] [Nat]Absence check using 2 positive and 2 generalized place invariants in 2 ms returned sat
[2023-03-19 17:32:51] [INFO ] After 486ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :19
[2023-03-19 17:32:51] [INFO ] State equation strengthened by 176 read => feed constraints.
[2023-03-19 17:32:52] [INFO ] After 838ms SMT Verify possible using 176 Read/Feed constraints in natural domain returned unsat :0 sat :19
[2023-03-19 17:32:53] [INFO ] Deduced a trap composed of 60 places in 109 ms of which 2 ms to minimize.
[2023-03-19 17:32:53] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 138 ms
[2023-03-19 17:32:53] [INFO ] After 2262ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :19
Attempting to minimize the solution found.
Minimization took 1179 ms.
[2023-03-19 17:32:55] [INFO ] After 4076ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :19
Parikh walk visited 1 properties in 517 ms.
Support contains 22 out of 157 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 157/157 places, 286/286 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 154 transition count 261
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 154 transition count 261
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 9 place count 154 transition count 258
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 11 place count 152 transition count 256
Iterating global reduction 1 with 2 rules applied. Total rules applied 13 place count 152 transition count 256
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 15 place count 152 transition count 254
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 17 place count 150 transition count 252
Iterating global reduction 2 with 2 rules applied. Total rules applied 19 place count 150 transition count 252
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 20 place count 150 transition count 251
Applied a total of 20 rules in 40 ms. Remains 150 /157 variables (removed 7) and now considering 251/286 (removed 35) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 41 ms. Remains : 150/157 places, 251/286 transitions.
Incomplete random walk after 10000 steps, including 2273 resets, run finished after 506 ms. (steps per millisecond=19 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 52 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 50 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 46 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 49 resets, run finished after 32 ms. (steps per millisecond=31 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 48 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 42 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 38 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 88 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 57 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 53 resets, run finished after 28 ms. (steps per millisecond=35 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 59 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 94 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 43 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 51 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 47 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 44 resets, run finished after 30 ms. (steps per millisecond=33 ) properties (out of 18) seen :0
Interrupted probabilistic random walk after 219290 steps, run timeout after 3001 ms. (steps per millisecond=73 ) properties seen :{3=1}
Probabilistic random walk after 219290 steps, saw 97503 distinct states, run finished after 3002 ms. (steps per millisecond=73 ) properties seen :1
Running SMT prover for 17 properties.
// Phase 1: matrix 251 rows 150 cols
[2023-03-19 17:32:59] [INFO ] Computed 4 place invariants in 12 ms
[2023-03-19 17:32:59] [INFO ] [Real]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-19 17:32:59] [INFO ] [Real]Absence check using 2 positive and 2 generalized place invariants in 2 ms returned sat
[2023-03-19 17:33:00] [INFO ] After 709ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:17
[2023-03-19 17:33:00] [INFO ] [Nat]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-19 17:33:00] [INFO ] [Nat]Absence check using 2 positive and 2 generalized place invariants in 2 ms returned sat
[2023-03-19 17:33:00] [INFO ] After 561ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :17
[2023-03-19 17:33:00] [INFO ] State equation strengthened by 148 read => feed constraints.
[2023-03-19 17:33:02] [INFO ] After 1353ms SMT Verify possible using 148 Read/Feed constraints in natural domain returned unsat :0 sat :17
[2023-03-19 17:33:02] [INFO ] Deduced a trap composed of 21 places in 72 ms of which 1 ms to minimize.
[2023-03-19 17:33:02] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 97 ms
[2023-03-19 17:33:03] [INFO ] Deduced a trap composed of 59 places in 67 ms of which 1 ms to minimize.
[2023-03-19 17:33:03] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 128 ms
[2023-03-19 17:33:03] [INFO ] After 2965ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :17
Attempting to minimize the solution found.
Minimization took 950 ms.
[2023-03-19 17:33:04] [INFO ] After 4634ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :17
Parikh walk visited 0 properties in 315 ms.
Support contains 21 out of 150 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 150/150 places, 251/251 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 149 transition count 239
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 149 transition count 239
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 148 transition count 238
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 148 transition count 238
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 5 place count 148 transition count 237
Applied a total of 5 rules in 20 ms. Remains 148 /150 variables (removed 2) and now considering 237/251 (removed 14) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 20 ms. Remains : 148/150 places, 237/251 transitions.
Incomplete random walk after 10000 steps, including 2228 resets, run finished after 397 ms. (steps per millisecond=25 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 49 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 40 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 41 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1000 steps, including 44 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 53 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1000 steps, including 50 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 112 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1000 steps, including 43 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1000 steps, including 53 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 93 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 54 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 44 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1000 steps, including 58 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 17) seen :0
Interrupted probabilistic random walk after 247634 steps, run timeout after 3001 ms. (steps per millisecond=82 ) properties seen :{}
Probabilistic random walk after 247634 steps, saw 109256 distinct states, run finished after 3002 ms. (steps per millisecond=82 ) properties seen :0
Running SMT prover for 17 properties.
// Phase 1: matrix 237 rows 148 cols
[2023-03-19 17:33:08] [INFO ] Computed 4 place invariants in 6 ms
[2023-03-19 17:33:08] [INFO ] [Real]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-19 17:33:08] [INFO ] [Real]Absence check using 2 positive and 2 generalized place invariants in 2 ms returned sat
[2023-03-19 17:33:09] [INFO ] After 703ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:17
[2023-03-19 17:33:09] [INFO ] [Nat]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-19 17:33:09] [INFO ] [Nat]Absence check using 2 positive and 2 generalized place invariants in 2 ms returned sat
[2023-03-19 17:33:10] [INFO ] After 516ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :17
[2023-03-19 17:33:10] [INFO ] State equation strengthened by 136 read => feed constraints.
[2023-03-19 17:33:11] [INFO ] After 886ms SMT Verify possible using 136 Read/Feed constraints in natural domain returned unsat :0 sat :17
[2023-03-19 17:33:11] [INFO ] Deduced a trap composed of 21 places in 65 ms of which 1 ms to minimize.
[2023-03-19 17:33:11] [INFO ] Deduced a trap composed of 59 places in 51 ms of which 0 ms to minimize.
[2023-03-19 17:33:11] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 276 ms
[2023-03-19 17:33:12] [INFO ] After 2399ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :17
Attempting to minimize the solution found.
Minimization took 1158 ms.
[2023-03-19 17:33:13] [INFO ] After 4225ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :17
Parikh walk visited 0 properties in 470 ms.
Support contains 21 out of 148 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 148/148 places, 237/237 transitions.
Applied a total of 0 rules in 12 ms. Remains 148 /148 variables (removed 0) and now considering 237/237 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 12 ms. Remains : 148/148 places, 237/237 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 148/148 places, 237/237 transitions.
Applied a total of 0 rules in 11 ms. Remains 148 /148 variables (removed 0) and now considering 237/237 (removed 0) transitions.
[2023-03-19 17:33:14] [INFO ] Invariant cache hit.
[2023-03-19 17:33:14] [INFO ] Implicit Places using invariants in 118 ms returned []
[2023-03-19 17:33:14] [INFO ] Invariant cache hit.
[2023-03-19 17:33:14] [INFO ] State equation strengthened by 136 read => feed constraints.
[2023-03-19 17:33:14] [INFO ] Implicit Places using invariants and state equation in 371 ms returned []
Implicit Place search using SMT with State Equation took 495 ms to find 0 implicit places.
[2023-03-19 17:33:14] [INFO ] Redundant transitions in 9 ms returned []
[2023-03-19 17:33:14] [INFO ] Invariant cache hit.
[2023-03-19 17:33:14] [INFO ] Dead Transitions using invariants and state equation in 116 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 643 ms. Remains : 148/148 places, 237/237 transitions.
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 148 transition count 232
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 9 place count 144 transition count 232
Performed 14 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 14 Pre rules applied. Total rules applied 9 place count 144 transition count 218
Deduced a syphon composed of 14 places in 4 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 2 with 28 rules applied. Total rules applied 37 place count 130 transition count 218
Performed 14 Post agglomeration using F-continuation condition.Transition count delta: 14
Deduced a syphon composed of 14 places in 1 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 2 with 28 rules applied. Total rules applied 65 place count 116 transition count 204
Free-agglomeration rule applied 3 times.
Iterating global reduction 2 with 3 rules applied. Total rules applied 68 place count 116 transition count 201
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 71 place count 113 transition count 201
Partial Free-agglomeration rule applied 3 times.
Drop transitions removed 3 transitions
Iterating global reduction 3 with 3 rules applied. Total rules applied 74 place count 113 transition count 201
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 75 place count 113 transition count 200
Applied a total of 75 rules in 42 ms. Remains 113 /148 variables (removed 35) and now considering 200/237 (removed 37) transitions.
Running SMT prover for 17 properties.
// Phase 1: matrix 200 rows 113 cols
[2023-03-19 17:33:14] [INFO ] Computed 4 place invariants in 1 ms
[2023-03-19 17:33:15] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-19 17:33:15] [INFO ] [Real]Absence check using 2 positive and 2 generalized place invariants in 2 ms returned sat
[2023-03-19 17:33:15] [INFO ] After 551ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:17
[2023-03-19 17:33:15] [INFO ] [Nat]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-19 17:33:15] [INFO ] [Nat]Absence check using 2 positive and 2 generalized place invariants in 2 ms returned sat
[2023-03-19 17:33:16] [INFO ] After 433ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :17
[2023-03-19 17:33:16] [INFO ] Deduced a trap composed of 44 places in 43 ms of which 1 ms to minimize.
[2023-03-19 17:33:16] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 75 ms
[2023-03-19 17:33:16] [INFO ] Deduced a trap composed of 13 places in 62 ms of which 1 ms to minimize.
[2023-03-19 17:33:16] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 82 ms
[2023-03-19 17:33:16] [INFO ] After 1204ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :17
Attempting to minimize the solution found.
Minimization took 453 ms.
[2023-03-19 17:33:17] [INFO ] After 1779ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :17
Successfully simplified 5 atomic propositions for a total of 16 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA SieveSingleMsgMbox-PT-d1m18-CTLFireability-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 40 ms
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 31 ms
[2023-03-19 17:33:17] [INFO ] Input system was already deterministic with 408 transitions.
FORMULA SieveSingleMsgMbox-PT-d1m18-CTLFireability-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 52 stabilizing places and 90 stable transitions
Graph (complete) has 772 edges and 189 vertex of which 188 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.8 ms
Starting structural reductions in SI_CTL mode, iteration 0 : 189/189 places, 408/408 transitions.
Discarding 32 places :
Symmetric choice reduction at 0 with 32 rule applications. Total rules 32 place count 157 transition count 241
Iterating global reduction 0 with 32 rules applied. Total rules applied 64 place count 157 transition count 241
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 69 place count 157 transition count 236
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 95 place count 131 transition count 208
Iterating global reduction 1 with 26 rules applied. Total rules applied 121 place count 131 transition count 208
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 1 with 7 rules applied. Total rules applied 128 place count 131 transition count 201
Discarding 16 places :
Symmetric choice reduction at 2 with 16 rule applications. Total rules 144 place count 115 transition count 184
Iterating global reduction 2 with 16 rules applied. Total rules applied 160 place count 115 transition count 184
Ensure Unique test removed 22 transitions
Reduce isomorphic transitions removed 22 transitions.
Iterating post reduction 2 with 22 rules applied. Total rules applied 182 place count 115 transition count 162
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 187 place count 110 transition count 156
Iterating global reduction 3 with 5 rules applied. Total rules applied 192 place count 110 transition count 156
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 196 place count 106 transition count 151
Iterating global reduction 3 with 4 rules applied. Total rules applied 200 place count 106 transition count 151
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 203 place count 103 transition count 148
Iterating global reduction 3 with 3 rules applied. Total rules applied 206 place count 103 transition count 148
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 208 place count 101 transition count 146
Iterating global reduction 3 with 2 rules applied. Total rules applied 210 place count 101 transition count 146
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 211 place count 100 transition count 145
Iterating global reduction 3 with 1 rules applied. Total rules applied 212 place count 100 transition count 145
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 213 place count 99 transition count 143
Iterating global reduction 3 with 1 rules applied. Total rules applied 214 place count 99 transition count 143
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 215 place count 98 transition count 142
Iterating global reduction 3 with 1 rules applied. Total rules applied 216 place count 98 transition count 142
Applied a total of 216 rules in 57 ms. Remains 98 /189 variables (removed 91) and now considering 142/408 (removed 266) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 58 ms. Remains : 98/189 places, 142/408 transitions.
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 8 ms
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 8 ms
[2023-03-19 17:33:17] [INFO ] Input system was already deterministic with 142 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 189/189 places, 408/408 transitions.
Discarding 29 places :
Symmetric choice reduction at 0 with 29 rule applications. Total rules 29 place count 160 transition count 233
Iterating global reduction 0 with 29 rules applied. Total rules applied 58 place count 160 transition count 233
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 62 place count 160 transition count 229
Discarding 23 places :
Symmetric choice reduction at 1 with 23 rule applications. Total rules 85 place count 137 transition count 206
Iterating global reduction 1 with 23 rules applied. Total rules applied 108 place count 137 transition count 206
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 117 place count 137 transition count 197
Discarding 14 places :
Symmetric choice reduction at 2 with 14 rule applications. Total rules 131 place count 123 transition count 182
Iterating global reduction 2 with 14 rules applied. Total rules applied 145 place count 123 transition count 182
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 2 with 10 rules applied. Total rules applied 155 place count 123 transition count 172
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 158 place count 120 transition count 168
Iterating global reduction 3 with 3 rules applied. Total rules applied 161 place count 120 transition count 168
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 162 place count 119 transition count 167
Iterating global reduction 3 with 1 rules applied. Total rules applied 163 place count 119 transition count 167
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 164 place count 118 transition count 166
Iterating global reduction 3 with 1 rules applied. Total rules applied 165 place count 118 transition count 166
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 166 place count 117 transition count 165
Iterating global reduction 3 with 1 rules applied. Total rules applied 167 place count 117 transition count 165
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 168 place count 116 transition count 164
Iterating global reduction 3 with 1 rules applied. Total rules applied 169 place count 116 transition count 164
Applied a total of 169 rules in 42 ms. Remains 116 /189 variables (removed 73) and now considering 164/408 (removed 244) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 42 ms. Remains : 116/189 places, 164/408 transitions.
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 8 ms
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 9 ms
[2023-03-19 17:33:17] [INFO ] Input system was already deterministic with 164 transitions.
Starting structural reductions in LTL mode, iteration 0 : 189/189 places, 408/408 transitions.
Discarding 32 places :
Symmetric choice reduction at 0 with 32 rule applications. Total rules 32 place count 157 transition count 219
Iterating global reduction 0 with 32 rules applied. Total rules applied 64 place count 157 transition count 219
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 68 place count 157 transition count 215
Discarding 27 places :
Symmetric choice reduction at 1 with 27 rule applications. Total rules 95 place count 130 transition count 186
Iterating global reduction 1 with 27 rules applied. Total rules applied 122 place count 130 transition count 186
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 130 place count 130 transition count 178
Discarding 17 places :
Symmetric choice reduction at 2 with 17 rule applications. Total rules 147 place count 113 transition count 161
Iterating global reduction 2 with 17 rules applied. Total rules applied 164 place count 113 transition count 161
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 2 with 16 rules applied. Total rules applied 180 place count 113 transition count 145
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 184 place count 109 transition count 140
Iterating global reduction 3 with 4 rules applied. Total rules applied 188 place count 109 transition count 140
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 192 place count 105 transition count 135
Iterating global reduction 3 with 4 rules applied. Total rules applied 196 place count 105 transition count 135
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 198 place count 103 transition count 133
Iterating global reduction 3 with 2 rules applied. Total rules applied 200 place count 103 transition count 133
Applied a total of 200 rules in 17 ms. Remains 103 /189 variables (removed 86) and now considering 133/408 (removed 275) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 103/189 places, 133/408 transitions.
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 6 ms
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 7 ms
[2023-03-19 17:33:17] [INFO ] Input system was already deterministic with 133 transitions.
Starting structural reductions in LTL mode, iteration 0 : 189/189 places, 408/408 transitions.
Discarding 32 places :
Symmetric choice reduction at 0 with 32 rule applications. Total rules 32 place count 157 transition count 241
Iterating global reduction 0 with 32 rules applied. Total rules applied 64 place count 157 transition count 241
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 69 place count 157 transition count 236
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 95 place count 131 transition count 208
Iterating global reduction 1 with 26 rules applied. Total rules applied 121 place count 131 transition count 208
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 129 place count 131 transition count 200
Discarding 17 places :
Symmetric choice reduction at 2 with 17 rule applications. Total rules 146 place count 114 transition count 182
Iterating global reduction 2 with 17 rules applied. Total rules applied 163 place count 114 transition count 182
Ensure Unique test removed 22 transitions
Reduce isomorphic transitions removed 22 transitions.
Iterating post reduction 2 with 22 rules applied. Total rules applied 185 place count 114 transition count 160
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 190 place count 109 transition count 154
Iterating global reduction 3 with 5 rules applied. Total rules applied 195 place count 109 transition count 154
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 199 place count 105 transition count 149
Iterating global reduction 3 with 4 rules applied. Total rules applied 203 place count 105 transition count 149
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 206 place count 102 transition count 146
Iterating global reduction 3 with 3 rules applied. Total rules applied 209 place count 102 transition count 146
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 211 place count 100 transition count 144
Iterating global reduction 3 with 2 rules applied. Total rules applied 213 place count 100 transition count 144
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 214 place count 99 transition count 143
Iterating global reduction 3 with 1 rules applied. Total rules applied 215 place count 99 transition count 143
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 216 place count 98 transition count 141
Iterating global reduction 3 with 1 rules applied. Total rules applied 217 place count 98 transition count 141
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 218 place count 97 transition count 140
Iterating global reduction 3 with 1 rules applied. Total rules applied 219 place count 97 transition count 140
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 220 place count 96 transition count 139
Iterating global reduction 3 with 1 rules applied. Total rules applied 221 place count 96 transition count 139
Applied a total of 221 rules in 24 ms. Remains 96 /189 variables (removed 93) and now considering 139/408 (removed 269) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 96/189 places, 139/408 transitions.
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 7 ms
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 7 ms
[2023-03-19 17:33:17] [INFO ] Input system was already deterministic with 139 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 189/189 places, 408/408 transitions.
Discarding 36 places :
Symmetric choice reduction at 0 with 36 rule applications. Total rules 36 place count 153 transition count 193
Iterating global reduction 0 with 36 rules applied. Total rules applied 72 place count 153 transition count 193
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 77 place count 153 transition count 188
Discarding 30 places :
Symmetric choice reduction at 1 with 30 rule applications. Total rules 107 place count 123 transition count 156
Iterating global reduction 1 with 30 rules applied. Total rules applied 137 place count 123 transition count 156
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 1 with 11 rules applied. Total rules applied 148 place count 123 transition count 145
Discarding 20 places :
Symmetric choice reduction at 2 with 20 rule applications. Total rules 168 place count 103 transition count 124
Iterating global reduction 2 with 20 rules applied. Total rules applied 188 place count 103 transition count 124
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 2 with 12 rules applied. Total rules applied 200 place count 103 transition count 112
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 206 place count 97 transition count 105
Iterating global reduction 3 with 6 rules applied. Total rules applied 212 place count 97 transition count 105
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 217 place count 92 transition count 99
Iterating global reduction 3 with 5 rules applied. Total rules applied 222 place count 92 transition count 99
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 226 place count 88 transition count 95
Iterating global reduction 3 with 4 rules applied. Total rules applied 230 place count 88 transition count 95
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 232 place count 88 transition count 93
Discarding 4 places :
Symmetric choice reduction at 4 with 4 rule applications. Total rules 236 place count 84 transition count 89
Iterating global reduction 4 with 4 rules applied. Total rules applied 240 place count 84 transition count 89
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 241 place count 83 transition count 88
Iterating global reduction 4 with 1 rules applied. Total rules applied 242 place count 83 transition count 88
Applied a total of 242 rules in 29 ms. Remains 83 /189 variables (removed 106) and now considering 88/408 (removed 320) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 29 ms. Remains : 83/189 places, 88/408 transitions.
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 4 ms
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 5 ms
[2023-03-19 17:33:17] [INFO ] Input system was already deterministic with 88 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 189/189 places, 408/408 transitions.
Discarding 31 places :
Symmetric choice reduction at 0 with 31 rule applications. Total rules 31 place count 158 transition count 235
Iterating global reduction 0 with 31 rules applied. Total rules applied 62 place count 158 transition count 235
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 67 place count 158 transition count 230
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 93 place count 132 transition count 202
Iterating global reduction 1 with 26 rules applied. Total rules applied 119 place count 132 transition count 202
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 129 place count 132 transition count 192
Discarding 17 places :
Symmetric choice reduction at 2 with 17 rule applications. Total rules 146 place count 115 transition count 174
Iterating global reduction 2 with 17 rules applied. Total rules applied 163 place count 115 transition count 174
Ensure Unique test removed 19 transitions
Reduce isomorphic transitions removed 19 transitions.
Iterating post reduction 2 with 19 rules applied. Total rules applied 182 place count 115 transition count 155
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 188 place count 109 transition count 148
Iterating global reduction 3 with 6 rules applied. Total rules applied 194 place count 109 transition count 148
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 199 place count 104 transition count 142
Iterating global reduction 3 with 5 rules applied. Total rules applied 204 place count 104 transition count 142
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 208 place count 100 transition count 138
Iterating global reduction 3 with 4 rules applied. Total rules applied 212 place count 100 transition count 138
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 3 with 4 rules applied. Total rules applied 216 place count 100 transition count 134
Discarding 2 places :
Symmetric choice reduction at 4 with 2 rule applications. Total rules 218 place count 98 transition count 132
Iterating global reduction 4 with 2 rules applied. Total rules applied 220 place count 98 transition count 132
Applied a total of 220 rules in 25 ms. Remains 98 /189 variables (removed 91) and now considering 132/408 (removed 276) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 25 ms. Remains : 98/189 places, 132/408 transitions.
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 6 ms
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 7 ms
[2023-03-19 17:33:17] [INFO ] Input system was already deterministic with 132 transitions.
Starting structural reductions in LTL mode, iteration 0 : 189/189 places, 408/408 transitions.
Discarding 33 places :
Symmetric choice reduction at 0 with 33 rule applications. Total rules 33 place count 156 transition count 229
Iterating global reduction 0 with 33 rules applied. Total rules applied 66 place count 156 transition count 229
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 71 place count 156 transition count 224
Discarding 27 places :
Symmetric choice reduction at 1 with 27 rule applications. Total rules 98 place count 129 transition count 195
Iterating global reduction 1 with 27 rules applied. Total rules applied 125 place count 129 transition count 195
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 133 place count 129 transition count 187
Discarding 17 places :
Symmetric choice reduction at 2 with 17 rule applications. Total rules 150 place count 112 transition count 169
Iterating global reduction 2 with 17 rules applied. Total rules applied 167 place count 112 transition count 169
Ensure Unique test removed 19 transitions
Reduce isomorphic transitions removed 19 transitions.
Iterating post reduction 2 with 19 rules applied. Total rules applied 186 place count 112 transition count 150
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 191 place count 107 transition count 144
Iterating global reduction 3 with 5 rules applied. Total rules applied 196 place count 107 transition count 144
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 200 place count 103 transition count 139
Iterating global reduction 3 with 4 rules applied. Total rules applied 204 place count 103 transition count 139
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 207 place count 100 transition count 136
Iterating global reduction 3 with 3 rules applied. Total rules applied 210 place count 100 transition count 136
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 212 place count 98 transition count 134
Iterating global reduction 3 with 2 rules applied. Total rules applied 214 place count 98 transition count 134
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 215 place count 97 transition count 133
Iterating global reduction 3 with 1 rules applied. Total rules applied 216 place count 97 transition count 133
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 217 place count 96 transition count 131
Iterating global reduction 3 with 1 rules applied. Total rules applied 218 place count 96 transition count 131
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 219 place count 95 transition count 130
Iterating global reduction 3 with 1 rules applied. Total rules applied 220 place count 95 transition count 130
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 221 place count 94 transition count 129
Iterating global reduction 3 with 1 rules applied. Total rules applied 222 place count 94 transition count 129
Applied a total of 222 rules in 19 ms. Remains 94 /189 variables (removed 95) and now considering 129/408 (removed 279) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19 ms. Remains : 94/189 places, 129/408 transitions.
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 6 ms
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 5 ms
[2023-03-19 17:33:17] [INFO ] Input system was already deterministic with 129 transitions.
Starting structural reductions in LTL mode, iteration 0 : 189/189 places, 408/408 transitions.
Discarding 33 places :
Symmetric choice reduction at 0 with 33 rule applications. Total rules 33 place count 156 transition count 218
Iterating global reduction 0 with 33 rules applied. Total rules applied 66 place count 156 transition count 218
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 70 place count 156 transition count 214
Discarding 27 places :
Symmetric choice reduction at 1 with 27 rule applications. Total rules 97 place count 129 transition count 187
Iterating global reduction 1 with 27 rules applied. Total rules applied 124 place count 129 transition count 187
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 134 place count 129 transition count 177
Discarding 17 places :
Symmetric choice reduction at 2 with 17 rule applications. Total rules 151 place count 112 transition count 159
Iterating global reduction 2 with 17 rules applied. Total rules applied 168 place count 112 transition count 159
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 2 with 16 rules applied. Total rules applied 184 place count 112 transition count 143
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 188 place count 108 transition count 138
Iterating global reduction 3 with 4 rules applied. Total rules applied 192 place count 108 transition count 138
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 195 place count 105 transition count 134
Iterating global reduction 3 with 3 rules applied. Total rules applied 198 place count 105 transition count 134
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 201 place count 102 transition count 131
Iterating global reduction 3 with 3 rules applied. Total rules applied 204 place count 102 transition count 131
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 3 with 3 rules applied. Total rules applied 207 place count 102 transition count 128
Discarding 3 places :
Symmetric choice reduction at 4 with 3 rule applications. Total rules 210 place count 99 transition count 125
Iterating global reduction 4 with 3 rules applied. Total rules applied 213 place count 99 transition count 125
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 214 place count 98 transition count 124
Iterating global reduction 4 with 1 rules applied. Total rules applied 215 place count 98 transition count 124
Applied a total of 215 rules in 16 ms. Remains 98 /189 variables (removed 91) and now considering 124/408 (removed 284) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 98/189 places, 124/408 transitions.
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 6 ms
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 6 ms
[2023-03-19 17:33:17] [INFO ] Input system was already deterministic with 124 transitions.
Starting structural reductions in LTL mode, iteration 0 : 189/189 places, 408/408 transitions.
Discarding 21 places :
Symmetric choice reduction at 0 with 21 rule applications. Total rules 21 place count 168 transition count 320
Iterating global reduction 0 with 21 rules applied. Total rules applied 42 place count 168 transition count 320
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 47 place count 168 transition count 315
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 63 place count 152 transition count 297
Iterating global reduction 1 with 16 rules applied. Total rules applied 79 place count 152 transition count 297
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 1 with 6 rules applied. Total rules applied 85 place count 152 transition count 291
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 95 place count 142 transition count 280
Iterating global reduction 2 with 10 rules applied. Total rules applied 105 place count 142 transition count 280
Ensure Unique test removed 26 transitions
Reduce isomorphic transitions removed 26 transitions.
Iterating post reduction 2 with 26 rules applied. Total rules applied 131 place count 142 transition count 254
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 134 place count 139 transition count 251
Iterating global reduction 3 with 3 rules applied. Total rules applied 137 place count 139 transition count 251
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 138 place count 138 transition count 250
Iterating global reduction 3 with 1 rules applied. Total rules applied 139 place count 138 transition count 250
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 140 place count 137 transition count 249
Iterating global reduction 3 with 1 rules applied. Total rules applied 141 place count 137 transition count 249
Applied a total of 141 rules in 16 ms. Remains 137 /189 variables (removed 52) and now considering 249/408 (removed 159) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 137/189 places, 249/408 transitions.
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 10 ms
[2023-03-19 17:33:17] [INFO ] Flatten gal took : 10 ms
[2023-03-19 17:33:18] [INFO ] Input system was already deterministic with 249 transitions.
Starting structural reductions in LTL mode, iteration 0 : 189/189 places, 408/408 transitions.
Discarding 34 places :
Symmetric choice reduction at 0 with 34 rule applications. Total rules 34 place count 155 transition count 217
Iterating global reduction 0 with 34 rules applied. Total rules applied 68 place count 155 transition count 217
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 73 place count 155 transition count 212
Discarding 28 places :
Symmetric choice reduction at 1 with 28 rule applications. Total rules 101 place count 127 transition count 182
Iterating global reduction 1 with 28 rules applied. Total rules applied 129 place count 127 transition count 182
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 138 place count 127 transition count 173
Discarding 18 places :
Symmetric choice reduction at 2 with 18 rule applications. Total rules 156 place count 109 transition count 154
Iterating global reduction 2 with 18 rules applied. Total rules applied 174 place count 109 transition count 154
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 2 with 16 rules applied. Total rules applied 190 place count 109 transition count 138
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 195 place count 104 transition count 132
Iterating global reduction 3 with 5 rules applied. Total rules applied 200 place count 104 transition count 132
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 204 place count 100 transition count 127
Iterating global reduction 3 with 4 rules applied. Total rules applied 208 place count 100 transition count 127
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 211 place count 97 transition count 124
Iterating global reduction 3 with 3 rules applied. Total rules applied 214 place count 97 transition count 124
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 216 place count 95 transition count 122
Iterating global reduction 3 with 2 rules applied. Total rules applied 218 place count 95 transition count 122
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 219 place count 94 transition count 121
Iterating global reduction 3 with 1 rules applied. Total rules applied 220 place count 94 transition count 121
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 221 place count 93 transition count 119
Iterating global reduction 3 with 1 rules applied. Total rules applied 222 place count 93 transition count 119
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 223 place count 92 transition count 118
Iterating global reduction 3 with 1 rules applied. Total rules applied 224 place count 92 transition count 118
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 225 place count 91 transition count 117
Iterating global reduction 3 with 1 rules applied. Total rules applied 226 place count 91 transition count 117
Applied a total of 226 rules in 18 ms. Remains 91 /189 variables (removed 98) and now considering 117/408 (removed 291) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 18 ms. Remains : 91/189 places, 117/408 transitions.
[2023-03-19 17:33:18] [INFO ] Flatten gal took : 6 ms
[2023-03-19 17:33:18] [INFO ] Flatten gal took : 5 ms
[2023-03-19 17:33:18] [INFO ] Input system was already deterministic with 117 transitions.
Starting structural reductions in LTL mode, iteration 0 : 189/189 places, 408/408 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 161 transition count 251
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 161 transition count 251
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 0 with 7 rules applied. Total rules applied 63 place count 161 transition count 244
Discarding 22 places :
Symmetric choice reduction at 1 with 22 rule applications. Total rules 85 place count 139 transition count 220
Iterating global reduction 1 with 22 rules applied. Total rules applied 107 place count 139 transition count 220
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 111 place count 139 transition count 216
Discarding 15 places :
Symmetric choice reduction at 2 with 15 rule applications. Total rules 126 place count 124 transition count 199
Iterating global reduction 2 with 15 rules applied. Total rules applied 141 place count 124 transition count 199
Ensure Unique test removed 20 transitions
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 2 with 20 rules applied. Total rules applied 161 place count 124 transition count 179
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 166 place count 119 transition count 172
Iterating global reduction 3 with 5 rules applied. Total rules applied 171 place count 119 transition count 172
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 175 place count 115 transition count 167
Iterating global reduction 3 with 4 rules applied. Total rules applied 179 place count 115 transition count 167
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 182 place count 112 transition count 164
Iterating global reduction 3 with 3 rules applied. Total rules applied 185 place count 112 transition count 164
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 186 place count 111 transition count 163
Iterating global reduction 3 with 1 rules applied. Total rules applied 187 place count 111 transition count 163
Applied a total of 187 rules in 15 ms. Remains 111 /189 variables (removed 78) and now considering 163/408 (removed 245) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 111/189 places, 163/408 transitions.
[2023-03-19 17:33:18] [INFO ] Flatten gal took : 6 ms
[2023-03-19 17:33:18] [INFO ] Flatten gal took : 6 ms
[2023-03-19 17:33:18] [INFO ] Input system was already deterministic with 163 transitions.
Starting structural reductions in LTL mode, iteration 0 : 189/189 places, 408/408 transitions.
Discarding 36 places :
Symmetric choice reduction at 0 with 36 rule applications. Total rules 36 place count 153 transition count 193
Iterating global reduction 0 with 36 rules applied. Total rules applied 72 place count 153 transition count 193
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 77 place count 153 transition count 188
Discarding 30 places :
Symmetric choice reduction at 1 with 30 rule applications. Total rules 107 place count 123 transition count 156
Iterating global reduction 1 with 30 rules applied. Total rules applied 137 place count 123 transition count 156
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 1 with 11 rules applied. Total rules applied 148 place count 123 transition count 145
Discarding 19 places :
Symmetric choice reduction at 2 with 19 rule applications. Total rules 167 place count 104 transition count 125
Iterating global reduction 2 with 19 rules applied. Total rules applied 186 place count 104 transition count 125
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 2 with 11 rules applied. Total rules applied 197 place count 104 transition count 114
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 203 place count 98 transition count 107
Iterating global reduction 3 with 6 rules applied. Total rules applied 209 place count 98 transition count 107
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 214 place count 93 transition count 101
Iterating global reduction 3 with 5 rules applied. Total rules applied 219 place count 93 transition count 101
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 223 place count 89 transition count 97
Iterating global reduction 3 with 4 rules applied. Total rules applied 227 place count 89 transition count 97
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 228 place count 89 transition count 96
Discarding 3 places :
Symmetric choice reduction at 4 with 3 rule applications. Total rules 231 place count 86 transition count 93
Iterating global reduction 4 with 3 rules applied. Total rules applied 234 place count 86 transition count 93
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 235 place count 85 transition count 92
Iterating global reduction 4 with 1 rules applied. Total rules applied 236 place count 85 transition count 92
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 237 place count 84 transition count 90
Iterating global reduction 4 with 1 rules applied. Total rules applied 238 place count 84 transition count 90
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 239 place count 83 transition count 89
Iterating global reduction 4 with 1 rules applied. Total rules applied 240 place count 83 transition count 89
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 241 place count 82 transition count 88
Iterating global reduction 4 with 1 rules applied. Total rules applied 242 place count 82 transition count 88
Applied a total of 242 rules in 17 ms. Remains 82 /189 variables (removed 107) and now considering 88/408 (removed 320) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 82/189 places, 88/408 transitions.
[2023-03-19 17:33:18] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:33:18] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:33:18] [INFO ] Input system was already deterministic with 88 transitions.
Starting structural reductions in LTL mode, iteration 0 : 189/189 places, 408/408 transitions.
Discarding 32 places :
Symmetric choice reduction at 0 with 32 rule applications. Total rules 32 place count 157 transition count 230
Iterating global reduction 0 with 32 rules applied. Total rules applied 64 place count 157 transition count 230
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 68 place count 157 transition count 226
Discarding 27 places :
Symmetric choice reduction at 1 with 27 rule applications. Total rules 95 place count 130 transition count 197
Iterating global reduction 1 with 27 rules applied. Total rules applied 122 place count 130 transition count 197
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 130 place count 130 transition count 189
Discarding 17 places :
Symmetric choice reduction at 2 with 17 rule applications. Total rules 147 place count 113 transition count 171
Iterating global reduction 2 with 17 rules applied. Total rules applied 164 place count 113 transition count 171
Ensure Unique test removed 19 transitions
Reduce isomorphic transitions removed 19 transitions.
Iterating post reduction 2 with 19 rules applied. Total rules applied 183 place count 113 transition count 152
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 187 place count 109 transition count 148
Iterating global reduction 3 with 4 rules applied. Total rules applied 191 place count 109 transition count 148
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 194 place count 106 transition count 144
Iterating global reduction 3 with 3 rules applied. Total rules applied 197 place count 106 transition count 144
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 199 place count 104 transition count 142
Iterating global reduction 3 with 2 rules applied. Total rules applied 201 place count 104 transition count 142
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 202 place count 103 transition count 141
Iterating global reduction 3 with 1 rules applied. Total rules applied 203 place count 103 transition count 141
Applied a total of 203 rules in 12 ms. Remains 103 /189 variables (removed 86) and now considering 141/408 (removed 267) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 103/189 places, 141/408 transitions.
[2023-03-19 17:33:18] [INFO ] Flatten gal took : 4 ms
[2023-03-19 17:33:18] [INFO ] Flatten gal took : 5 ms
[2023-03-19 17:33:18] [INFO ] Input system was already deterministic with 141 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 189/189 places, 408/408 transitions.
Discarding 31 places :
Symmetric choice reduction at 0 with 31 rule applications. Total rules 31 place count 158 transition count 234
Iterating global reduction 0 with 31 rules applied. Total rules applied 62 place count 158 transition count 234
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 67 place count 158 transition count 229
Discarding 25 places :
Symmetric choice reduction at 1 with 25 rule applications. Total rules 92 place count 133 transition count 204
Iterating global reduction 1 with 25 rules applied. Total rules applied 117 place count 133 transition count 204
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 127 place count 133 transition count 194
Discarding 14 places :
Symmetric choice reduction at 2 with 14 rule applications. Total rules 141 place count 119 transition count 179
Iterating global reduction 2 with 14 rules applied. Total rules applied 155 place count 119 transition count 179
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 2 with 16 rules applied. Total rules applied 171 place count 119 transition count 163
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 174 place count 116 transition count 159
Iterating global reduction 3 with 3 rules applied. Total rules applied 177 place count 116 transition count 159
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 179 place count 114 transition count 156
Iterating global reduction 3 with 2 rules applied. Total rules applied 181 place count 114 transition count 156
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 183 place count 112 transition count 154
Iterating global reduction 3 with 2 rules applied. Total rules applied 185 place count 112 transition count 154
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 186 place count 111 transition count 153
Iterating global reduction 3 with 1 rules applied. Total rules applied 187 place count 111 transition count 153
Applied a total of 187 rules in 23 ms. Remains 111 /189 variables (removed 78) and now considering 153/408 (removed 255) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 23 ms. Remains : 111/189 places, 153/408 transitions.
[2023-03-19 17:33:18] [INFO ] Flatten gal took : 4 ms
[2023-03-19 17:33:18] [INFO ] Flatten gal took : 5 ms
[2023-03-19 17:33:18] [INFO ] Input system was already deterministic with 153 transitions.
[2023-03-19 17:33:18] [INFO ] Flatten gal took : 12 ms
[2023-03-19 17:33:18] [INFO ] Flatten gal took : 10 ms
[2023-03-19 17:33:18] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-19 17:33:18] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 189 places, 408 transitions and 1614 arcs took 2 ms.
Total runtime 50150 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SieveSingleMsgMbox-PT-d1m18
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA SieveSingleMsgMbox-PT-d1m18-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m18-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m18-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m18-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m18-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m18-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m18-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m18-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m18-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m18-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m18-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m18-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679247278932

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:463
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 1 (type EXCL) for 0 SieveSingleMsgMbox-PT-d1m18-CTLFireability-00
lola: time limit : 144 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:715
lola: FINISHED task # 1 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-00
lola: result : false
lola: markings : 3576
lola: fired transitions : 4280
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 25 SieveSingleMsgMbox-PT-d1m18-CTLFireability-08
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 59 (type FNDP) for 36 SieveSingleMsgMbox-PT-d1m18-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type EQUN) for 36 SieveSingleMsgMbox-PT-d1m18-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SRCH) for 36 SieveSingleMsgMbox-PT-d1m18-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: FINISHED task # 28 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-08
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 25 SieveSingleMsgMbox-PT-d1m18-CTLFireability-08
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-08
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 61 (type EXCL) for 36 SieveSingleMsgMbox-PT-d1m18-CTLFireability-09
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: FINISHED task # 62 (type SRCH) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-09
lola: result : unknown
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 61 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-09
lola: result : true
lola: markings : 77
lola: fired transitions : 76
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 59 (type FNDP) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-09 (obsolete)
lola: CANCELED task # 60 (type EQUN) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-09 (obsolete)
lola: FINISHED task # 59 (type FNDP) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-09
lola: result : unknown
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/375/CTLFireability-60.sara.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 4 (type EXCL) for 3 SieveSingleMsgMbox-PT-d1m18-CTLFireability-01
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-01
lola: result : false
lola: markings : 8
lola: fired transitions : 25
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 10 (type EXCL) for 9 SieveSingleMsgMbox-PT-d1m18-CTLFireability-04
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:715
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 10 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-04
lola: result : true
lola: markings : 10100
lola: fired transitions : 24083
lola: time used : 1.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 53 (type EXCL) for 52 SieveSingleMsgMbox-PT-d1m18-CTLFireability-13
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-13
lola: result : false
lola: markings : 934
lola: fired transitions : 1115
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 50 (type EXCL) for 49 SieveSingleMsgMbox-PT-d1m18-CTLFireability-12
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-12
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 SieveSingleMsgMbox-PT-d1m18-CTLFireability-11
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-11
lola: result : true
lola: markings : 942
lola: fired transitions : 1177
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 39 SieveSingleMsgMbox-PT-d1m18-CTLFireability-10
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-10
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 39 SieveSingleMsgMbox-PT-d1m18-CTLFireability-10
lola: time limit : 449 sec
lola: memory limit: 32 pages

lola: FINISHED task # 60 (type EQUN) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-09
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ 0 1 0 0 5 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 4/449 3/32 SieveSingleMsgMbox-PT-d1m18-CTLFireability-10 499503 m, 99900 m/sec, 1297209 t fired, .

Time elapsed: 5 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ 0 1 0 0 5 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 9/449 6/32 SieveSingleMsgMbox-PT-d1m18-CTLFireability-10 1054980 m, 111095 m/sec, 2777037 t fired, .

Time elapsed: 10 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ 0 1 0 0 5 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 14/449 9/32 SieveSingleMsgMbox-PT-d1m18-CTLFireability-10 1574125 m, 103829 m/sec, 4124165 t fired, .

Time elapsed: 15 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ 0 1 0 0 5 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 19/449 12/32 SieveSingleMsgMbox-PT-d1m18-CTLFireability-10 2086242 m, 102423 m/sec, 5526055 t fired, .

Time elapsed: 20 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ 0 1 0 0 5 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 24/449 15/32 SieveSingleMsgMbox-PT-d1m18-CTLFireability-10 2659229 m, 114597 m/sec, 7029183 t fired, .

Time elapsed: 25 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ 0 1 0 0 5 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 29/449 18/32 SieveSingleMsgMbox-PT-d1m18-CTLFireability-10 3162420 m, 100638 m/sec, 8388049 t fired, .

Time elapsed: 30 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ 0 1 0 0 5 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 34/449 21/32 SieveSingleMsgMbox-PT-d1m18-CTLFireability-10 3673309 m, 102177 m/sec, 9819882 t fired, .

Time elapsed: 35 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ 0 1 0 0 5 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 39/449 24/32 SieveSingleMsgMbox-PT-d1m18-CTLFireability-10 4251008 m, 115539 m/sec, 11319098 t fired, .

Time elapsed: 40 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ 0 1 0 0 5 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 44/449 27/32 SieveSingleMsgMbox-PT-d1m18-CTLFireability-10 4816626 m, 113123 m/sec, 12821376 t fired, .

Time elapsed: 45 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ 0 1 0 0 5 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 49/449 30/32 SieveSingleMsgMbox-PT-d1m18-CTLFireability-10 5323757 m, 101426 m/sec, 14187252 t fired, .

Time elapsed: 50 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 14
lola: CANCELED task # 42 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ 0 1 0 0 5 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 55 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
lola: LAUNCH task # 32 (type EXCL) for 25 SieveSingleMsgMbox-PT-d1m18-CTLFireability-08
lola: time limit : 506 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-08
lola: result : false
lola: markings : 1372
lola: fired transitions : 1673
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 SieveSingleMsgMbox-PT-d1m18-CTLFireability-07
lola: time limit : 590 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ false DISJ
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 5/590 7/32 SieveSingleMsgMbox-PT-d1m18-CTLFireability-07 1225437 m, 245087 m/sec, 1538821 t fired, .

Time elapsed: 60 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ false DISJ
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 10/590 14/32 SieveSingleMsgMbox-PT-d1m18-CTLFireability-07 2375264 m, 229965 m/sec, 3004086 t fired, .

Time elapsed: 65 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ false DISJ
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 15/590 20/32 SieveSingleMsgMbox-PT-d1m18-CTLFireability-07 3564484 m, 237844 m/sec, 4553248 t fired, .

Time elapsed: 70 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ false DISJ
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 20/590 27/32 SieveSingleMsgMbox-PT-d1m18-CTLFireability-07 4779003 m, 242903 m/sec, 6085063 t fired, .

Time elapsed: 75 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
lola: CANCELED task # 23 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ false DISJ
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 80 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
lola: LAUNCH task # 7 (type EXCL) for 6 SieveSingleMsgMbox-PT-d1m18-CTLFireability-02
lola: time limit : 704 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-02
lola: result : true
lola: markings : 7
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 63 (type EXCL) for 15 SieveSingleMsgMbox-PT-d1m18-CTLFireability-06
lola: time limit : 880 sec
lola: memory limit: 32 pages
lola: FINISHED task # 63 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-06
lola: result : true
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 SieveSingleMsgMbox-PT-d1m18-CTLFireability-05
lola: time limit : 1760 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-05
lola: result : false
lola: markings : 14
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 56 (type EXCL) for 55 SieveSingleMsgMbox-PT-d1m18-CTLFireability-15
lola: time limit : 3520 sec
lola: memory limit: 32 pages
lola: FINISHED task # 56 (type EXCL) for SieveSingleMsgMbox-PT-d1m18-CTLFireability-15
lola: result : false
lola: markings : 1652
lola: fired transitions : 3648
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 14

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m18-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-02: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-04: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-05: AGEF false tscc_search
SieveSingleMsgMbox-PT-d1m18-CTLFireability-06: CONJ false state space / EG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-07: CTL unknown AGGR
SieveSingleMsgMbox-PT-d1m18-CTLFireability-08: DISJ false DISJ
SieveSingleMsgMbox-PT-d1m18-CTLFireability-09: AG false state space
SieveSingleMsgMbox-PT-d1m18-CTLFireability-10: DISJ unknown DISJ
SieveSingleMsgMbox-PT-d1m18-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-12: EXEG true state space /EXEG
SieveSingleMsgMbox-PT-d1m18-CTLFireability-13: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m18-CTLFireability-15: CTL false CTL model checker


Time elapsed: 80 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SieveSingleMsgMbox-PT-d1m18"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SieveSingleMsgMbox-PT-d1m18, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-tajo-167905976700418"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SieveSingleMsgMbox-PT-d1m18.tgz
mv SieveSingleMsgMbox-PT-d1m18 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;