Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r423-tajo-167905976600378.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SieveSingleMsgMbox-PT-d0m36, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-tajo-167905976600378
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 564K
-rw-r--r-- 1 mcc users 7.3K Feb 26 10:29 CTLCardinality.txt
-rw-r--r-- 1 mcc users 81K Feb 26 10:29 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 26 10:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 26 10:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:05 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 17:05 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 17:05 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:05 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 26 10:30 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 188K Feb 26 10:30 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.1K Feb 26 10:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 59K Feb 26 10:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 17:05 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:05 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 57K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-00
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-01
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-02
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-03
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-04
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-05
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-06
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-07
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-08
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-09
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-10
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-11
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-12
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-13
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-14
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679246761095

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SieveSingleMsgMbox-PT-d0m36
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 17:26:02] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 17:26:02] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 17:26:02] [INFO ] Load time of PNML (sax parser for PT used): 46 ms
[2023-03-19 17:26:02] [INFO ] Transformed 262 places.
[2023-03-19 17:26:02] [INFO ] Transformed 73 transitions.
[2023-03-19 17:26:02] [INFO ] Parsed PT model containing 262 places and 73 transitions and 292 arcs in 109 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Deduced a syphon composed of 190 places in 2 ms
Reduce places removed 190 places and 0 transitions.
Support contains 56 out of 72 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 73/73 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 70 transition count 73
Applied a total of 2 rules in 12 ms. Remains 70 /72 variables (removed 2) and now considering 73/73 (removed 0) transitions.
// Phase 1: matrix 73 rows 70 cols
[2023-03-19 17:26:02] [INFO ] Computed 5 place invariants in 10 ms
[2023-03-19 17:26:02] [INFO ] Implicit Places using invariants in 153 ms returned []
[2023-03-19 17:26:02] [INFO ] Invariant cache hit.
[2023-03-19 17:26:03] [INFO ] State equation strengthened by 31 read => feed constraints.
[2023-03-19 17:26:03] [INFO ] Implicit Places using invariants and state equation in 92 ms returned []
Implicit Place search using SMT with State Equation took 272 ms to find 0 implicit places.
[2023-03-19 17:26:03] [INFO ] Invariant cache hit.
[2023-03-19 17:26:03] [INFO ] Dead Transitions using invariants and state equation in 71 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 70/72 places, 73/73 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 359 ms. Remains : 70/72 places, 73/73 transitions.
Support contains 56 out of 70 places after structural reductions.
[2023-03-19 17:26:03] [INFO ] Flatten gal took : 28 ms
[2023-03-19 17:26:03] [INFO ] Flatten gal took : 11 ms
[2023-03-19 17:26:03] [INFO ] Input system was already deterministic with 73 transitions.
Incomplete random walk after 10000 steps, including 2232 resets, run finished after 477 ms. (steps per millisecond=20 ) properties (out of 56) seen :22
Incomplete Best-First random walk after 1001 steps, including 52 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 106 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 102 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 49 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 56 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 126 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 44 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 100 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 97 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 54 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 111 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 53 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 104 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 112 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 97 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 200 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 107 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 52 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 49 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 34) seen :3
Incomplete Best-First random walk after 1000 steps, including 86 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 57 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 96 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 115 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 40 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 30 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 53 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 68 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 60 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 113 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 48 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 31) seen :0
Running SMT prover for 31 properties.
[2023-03-19 17:26:04] [INFO ] Invariant cache hit.
[2023-03-19 17:26:04] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-19 17:26:04] [INFO ] [Real]Absence check using 2 positive and 3 generalized place invariants in 2 ms returned sat
[2023-03-19 17:26:04] [INFO ] After 81ms SMT Verify possible using state equation in real domain returned unsat :5 sat :1 real:25
[2023-03-19 17:26:04] [INFO ] State equation strengthened by 31 read => feed constraints.
[2023-03-19 17:26:04] [INFO ] After 9ms SMT Verify possible using 31 Read/Feed constraints in real domain returned unsat :5 sat :0 real:26
[2023-03-19 17:26:04] [INFO ] After 211ms SMT Verify possible using all constraints in real domain returned unsat :5 sat :0 real:26
[2023-03-19 17:26:04] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-19 17:26:04] [INFO ] [Nat]Absence check using 2 positive and 3 generalized place invariants in 1 ms returned sat
[2023-03-19 17:26:04] [INFO ] After 132ms SMT Verify possible using state equation in natural domain returned unsat :7 sat :24
[2023-03-19 17:26:05] [INFO ] After 157ms SMT Verify possible using 31 Read/Feed constraints in natural domain returned unsat :7 sat :24
[2023-03-19 17:26:05] [INFO ] After 396ms SMT Verify possible using trap constraints in natural domain returned unsat :7 sat :24
Attempting to minimize the solution found.
Minimization took 171 ms.
[2023-03-19 17:26:05] [INFO ] After 807ms SMT Verify possible using all constraints in natural domain returned unsat :7 sat :24
Fused 31 Parikh solutions to 24 different solutions.
Parikh walk visited 0 properties in 207 ms.
Support contains 32 out of 70 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 68 transition count 71
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 68 transition count 71
Applied a total of 4 rules in 10 ms. Remains 68 /70 variables (removed 2) and now considering 71/73 (removed 2) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10 ms. Remains : 68/70 places, 71/73 transitions.
Incomplete random walk after 10000 steps, including 2251 resets, run finished after 179 ms. (steps per millisecond=55 ) properties (out of 24) seen :1
Incomplete Best-First random walk after 1001 steps, including 36 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 75 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 105 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 52 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 107 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 49 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 114 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 111 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 55 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 92 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 108 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 104 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 96 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 200 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 50 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 105 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 112 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 50 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 30 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 41 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 109 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 23) seen :0
Finished probabilistic random walk after 1802 steps, run visited all 23 properties in 31 ms. (steps per millisecond=58 )
Probabilistic random walk after 1802 steps, saw 925 distinct states, run finished after 31 ms. (steps per millisecond=58 ) properties seen :23
Successfully simplified 7 atomic propositions for a total of 16 simplifications.
FORMULA SieveSingleMsgMbox-PT-d0m36-CTLFireability-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 6 ms
[2023-03-19 17:26:06] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA SieveSingleMsgMbox-PT-d0m36-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 6 ms
[2023-03-19 17:26:06] [INFO ] Input system was already deterministic with 73 transitions.
Support contains 50 out of 70 places (down from 51) after GAL structural reductions.
Computed a total of 10 stabilizing places and 13 stable transitions
Graph (complete) has 213 edges and 70 vertex of which 69 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.2 ms
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 65 transition count 68
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 65 transition count 68
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 11 place count 64 transition count 67
Iterating global reduction 0 with 1 rules applied. Total rules applied 12 place count 64 transition count 67
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 13 place count 63 transition count 66
Iterating global reduction 0 with 1 rules applied. Total rules applied 14 place count 63 transition count 66
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 15 place count 63 transition count 65
Applied a total of 15 rules in 6 ms. Remains 63 /70 variables (removed 7) and now considering 65/73 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 63/70 places, 65/73 transitions.
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 62 transition count 65
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 62 transition count 65
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 17 place count 61 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 18 place count 61 transition count 64
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 19 place count 60 transition count 63
Iterating global reduction 0 with 1 rules applied. Total rules applied 20 place count 60 transition count 63
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 21 place count 60 transition count 62
Applied a total of 21 rules in 7 ms. Remains 60 /70 variables (removed 10) and now considering 62/73 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 60/70 places, 62/73 transitions.
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 6 ms
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 63 transition count 66
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 63 transition count 66
Applied a total of 14 rules in 3 ms. Remains 63 /70 variables (removed 7) and now considering 66/73 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 63/70 places, 66/73 transitions.
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 63 transition count 66
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 63 transition count 66
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 62 transition count 65
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 62 transition count 65
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 17 place count 61 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 18 place count 61 transition count 64
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 19 place count 61 transition count 63
Applied a total of 19 rules in 7 ms. Remains 61 /70 variables (removed 9) and now considering 63/73 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 61/70 places, 63/73 transitions.
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 61 transition count 64
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 61 transition count 64
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 19 place count 60 transition count 63
Iterating global reduction 0 with 1 rules applied. Total rules applied 20 place count 60 transition count 63
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 21 place count 59 transition count 62
Iterating global reduction 0 with 1 rules applied. Total rules applied 22 place count 59 transition count 62
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 23 place count 59 transition count 61
Applied a total of 23 rules in 5 ms. Remains 59 /70 variables (removed 11) and now considering 61/73 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 59/70 places, 61/73 transitions.
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 2 ms
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Input system was already deterministic with 61 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 61 transition count 64
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 61 transition count 64
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 19 place count 60 transition count 63
Iterating global reduction 0 with 1 rules applied. Total rules applied 20 place count 60 transition count 63
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 21 place count 59 transition count 62
Iterating global reduction 0 with 1 rules applied. Total rules applied 22 place count 59 transition count 62
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 23 place count 59 transition count 61
Applied a total of 23 rules in 4 ms. Remains 59 /70 variables (removed 11) and now considering 61/73 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 59/70 places, 61/73 transitions.
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Input system was already deterministic with 61 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 62 transition count 65
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 62 transition count 65
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 17 place count 61 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 18 place count 61 transition count 64
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 19 place count 60 transition count 63
Iterating global reduction 0 with 1 rules applied. Total rules applied 20 place count 60 transition count 63
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 21 place count 60 transition count 62
Applied a total of 21 rules in 5 ms. Remains 60 /70 variables (removed 10) and now considering 62/73 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 60/70 places, 62/73 transitions.
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 62 transition count 65
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 62 transition count 65
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 17 place count 61 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 18 place count 61 transition count 64
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 19 place count 60 transition count 63
Iterating global reduction 0 with 1 rules applied. Total rules applied 20 place count 60 transition count 63
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 21 place count 60 transition count 62
Applied a total of 21 rules in 8 ms. Remains 60 /70 variables (removed 10) and now considering 62/73 (removed 11) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 60/70 places, 62/73 transitions.
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 5 ms
[2023-03-19 17:26:06] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 63 transition count 66
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 63 transition count 66
Applied a total of 14 rules in 1 ms. Remains 63 /70 variables (removed 7) and now considering 66/73 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 63/70 places, 66/73 transitions.
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 61 transition count 64
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 61 transition count 64
Applied a total of 18 rules in 4 ms. Remains 61 /70 variables (removed 9) and now considering 64/73 (removed 9) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 61/70 places, 64/73 transitions.
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 2 ms
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 63 transition count 66
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 63 transition count 66
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 62 transition count 65
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 62 transition count 65
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 17 place count 61 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 18 place count 61 transition count 64
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 19 place count 61 transition count 63
Applied a total of 19 rules in 6 ms. Remains 61 /70 variables (removed 9) and now considering 63/73 (removed 10) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 61/70 places, 63/73 transitions.
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 62 transition count 65
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 62 transition count 65
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 17 place count 61 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 18 place count 61 transition count 64
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 19 place count 60 transition count 63
Iterating global reduction 0 with 1 rules applied. Total rules applied 20 place count 60 transition count 63
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 21 place count 60 transition count 62
Applied a total of 21 rules in 6 ms. Remains 60 /70 variables (removed 10) and now considering 62/73 (removed 11) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 60/70 places, 62/73 transitions.
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 63 transition count 66
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 63 transition count 66
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 62 transition count 65
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 62 transition count 65
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 17 place count 61 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 18 place count 61 transition count 64
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 19 place count 61 transition count 63
Applied a total of 19 rules in 3 ms. Remains 61 /70 variables (removed 9) and now considering 63/73 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 61/70 places, 63/73 transitions.
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 2 ms
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 64 transition count 67
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 64 transition count 67
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 13 place count 63 transition count 66
Iterating global reduction 0 with 1 rules applied. Total rules applied 14 place count 63 transition count 66
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 62 transition count 65
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 62 transition count 65
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 17 place count 62 transition count 64
Applied a total of 17 rules in 5 ms. Remains 62 /70 variables (removed 8) and now considering 64/73 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 62/70 places, 64/73 transitions.
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Input system was already deterministic with 64 transitions.
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:26:06] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-19 17:26:06] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 70 places, 73 transitions and 289 arcs took 0 ms.
Total runtime 3786 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SieveSingleMsgMbox-PT-d0m36
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/368
CTLFireability

FORMULA SieveSingleMsgMbox-PT-d0m36-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d0m36-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d0m36-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d0m36-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d0m36-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d0m36-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d0m36-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679246957059

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/368/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/368/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/368/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 12 (type EXCL) for 9 SieveSingleMsgMbox-PT-d0m36-CTLFireability-03
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 12 (type EXCL) for SieveSingleMsgMbox-PT-d0m36-CTLFireability-03
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 23 SieveSingleMsgMbox-PT-d0m36-CTLFireability-05
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 51 (type FNDP) for 9 SieveSingleMsgMbox-PT-d0m36-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 51 (type FNDP) for SieveSingleMsgMbox-PT-d0m36-CTLFireability-03
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:737
lola: rewrite Frontend/Parser/formula_rewrite.k:693
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:788
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d0m36-CTLFireability-03: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d0m36-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 5/276 6/32 SieveSingleMsgMbox-PT-d0m36-CTLFireability-05 1425485 m, 285097 m/sec, 5039541 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d0m36-CTLFireability-03: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d0m36-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 10/276 11/32 SieveSingleMsgMbox-PT-d0m36-CTLFireability-05 2596858 m, 234274 m/sec, 9479605 t fired, .

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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d0m36-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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SieveSingleMsgMbox-PT-d0m36-CTLFireability-07: CTL false CTL model checker
SieveSingleMsgMbox-PT-d0m36-CTLFireability-14: CTL false CTL model checker

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SieveSingleMsgMbox-PT-d0m36-CTLFireability-12: EFAG 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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52 AGEF EXCL 15/867 32/32 SieveSingleMsgMbox-PT-d0m36-CTLFireability-12 8291803 m, 514202 m/sec, 13340648 t fired, .

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SieveSingleMsgMbox-PT-d0m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 5/3450 5/32 SieveSingleMsgMbox-PT-d0m36-CTLFireability-10 1058155 m, 211631 m/sec, 4862043 t fired, .

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SieveSingleMsgMbox-PT-d0m36-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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36 CTL EXCL 10/3450 9/32 SieveSingleMsgMbox-PT-d0m36-CTLFireability-10 2097332 m, 207835 m/sec, 9727083 t fired, .

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36 CTL EXCL 15/3450 14/32 SieveSingleMsgMbox-PT-d0m36-CTLFireability-10 3207811 m, 222095 m/sec, 14998725 t fired, .

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SieveSingleMsgMbox-PT-d0m36-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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36 CTL EXCL 20/3450 18/32 SieveSingleMsgMbox-PT-d0m36-CTLFireability-10 4307147 m, 219867 m/sec, 20197061 t fired, .

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SieveSingleMsgMbox-PT-d0m36-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 25/3450 23/32 SieveSingleMsgMbox-PT-d0m36-CTLFireability-10 5360781 m, 210726 m/sec, 25211222 t fired, .

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SieveSingleMsgMbox-PT-d0m36-CTLFireability-03: CONJ true CONJ
SieveSingleMsgMbox-PT-d0m36-CTLFireability-07: CTL false CTL model checker
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SieveSingleMsgMbox-PT-d0m36-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d0m36-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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36 CTL EXCL 30/3450 27/32 SieveSingleMsgMbox-PT-d0m36-CTLFireability-10 6386944 m, 205232 m/sec, 30111129 t fired, .

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SieveSingleMsgMbox-PT-d0m36-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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36 CTL EXCL 35/3450 32/32 SieveSingleMsgMbox-PT-d0m36-CTLFireability-10 7452838 m, 213178 m/sec, 35230836 t fired, .

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d0m36-CTLFireability-00: CTL false CTL model checker
SieveSingleMsgMbox-PT-d0m36-CTLFireability-01: CTL unknown AGGR
SieveSingleMsgMbox-PT-d0m36-CTLFireability-02: CTL true CTL model checker
SieveSingleMsgMbox-PT-d0m36-CTLFireability-03: CONJ true CONJ
SieveSingleMsgMbox-PT-d0m36-CTLFireability-04: CTL unknown AGGR
SieveSingleMsgMbox-PT-d0m36-CTLFireability-05: CTL unknown AGGR
SieveSingleMsgMbox-PT-d0m36-CTLFireability-07: CTL false CTL model checker
SieveSingleMsgMbox-PT-d0m36-CTLFireability-08: CTL false CTL model checker
SieveSingleMsgMbox-PT-d0m36-CTLFireability-09: CTL unknown AGGR
SieveSingleMsgMbox-PT-d0m36-CTLFireability-10: CTL unknown AGGR
SieveSingleMsgMbox-PT-d0m36-CTLFireability-12: EFAG unknown AGGR
SieveSingleMsgMbox-PT-d0m36-CTLFireability-13: CTL false CTL model checker
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SieveSingleMsgMbox-PT-d0m36-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SieveSingleMsgMbox-PT-d0m36"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SieveSingleMsgMbox-PT-d0m36, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-tajo-167905976600378"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SieveSingleMsgMbox-PT-d0m36.tgz
mv SieveSingleMsgMbox-PT-d0m36 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;